diff options
| -rw-r--r-- | board/samsung/smdk5250/Makefile | 4 | ||||
| -rw-r--r-- | board/samsung/smdk5250/exynos5-dt.c | 423 | ||||
| -rw-r--r-- | board/samsung/smdk5250/smdk5250.c | 219 | ||||
| -rw-r--r-- | drivers/video/exynos_fb.c | 4 | ||||
| -rw-r--r-- | include/configs/exynos5250-dt.h | 8 | 
5 files changed, 491 insertions, 167 deletions
| diff --git a/board/samsung/smdk5250/Makefile b/board/samsung/smdk5250/Makefile index d079f4ce7..f2c32ee4c 100644 --- a/board/samsung/smdk5250/Makefile +++ b/board/samsung/smdk5250/Makefile @@ -31,8 +31,12 @@ COBJS	+= dmc_common.o dmc_init_ddr3.o  COBJS	+= smdk5250_spl.o  ifndef CONFIG_SPL_BUILD +ifdef CONFIG_OF_CONTROL +COBJS	+= exynos5-dt.o +else  COBJS	+= smdk5250.o  endif +endif  ifdef CONFIG_SPL_BUILD  COBJS	+= spl_boot.o diff --git a/board/samsung/smdk5250/exynos5-dt.c b/board/samsung/smdk5250/exynos5-dt.c new file mode 100644 index 000000000..813150586 --- /dev/null +++ b/board/samsung/smdk5250/exynos5-dt.c @@ -0,0 +1,423 @@ +/* + * Copyright (C) 2012 Samsung Electronics + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <fdtdec.h> +#include <asm/io.h> +#include <errno.h> +#include <i2c.h> +#include <netdev.h> +#include <spi.h> +#include <asm/arch/cpu.h> +#include <asm/arch/dwmmc.h> +#include <asm/arch/gpio.h> +#include <asm/arch/mmc.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/power.h> +#include <asm/arch/sromc.h> +#include <power/pmic.h> +#include <power/max77686_pmic.h> +#include <tmu.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if defined CONFIG_EXYNOS_TMU +/* + * Boot Time Thermal Analysis for SoC temperature threshold breach + */ +static void boot_temp_check(void) +{ +	int temp; + +	switch (tmu_monitor(&temp)) { +	/* Status TRIPPED ans WARNING means corresponding threshold breach */ +	case TMU_STATUS_TRIPPED: +		puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); +		set_ps_hold_ctrl(); +		hang(); +		break; +	case TMU_STATUS_WARNING: +		puts("EXYNOS_TMU: WARNING! Temperature very high\n"); +		break; +	/* +	 * TMU_STATUS_INIT means something is wrong with temperature sensing +	 * and TMU status was changed back from NORMAL to INIT. +	 */ +	case TMU_STATUS_INIT: +	default: +		debug("EXYNOS_TMU: Unknown TMU state\n"); +	} +} +#endif + +#ifdef CONFIG_USB_EHCI_EXYNOS +int board_usb_vbus_init(void) +{ +	struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) +						samsung_get_base_gpio_part1(); + +	/* Enable VBUS power switch */ +	s5p_gpio_direction_output(&gpio1->x2, 6, 1); + +	/* VBUS turn ON time */ +	mdelay(3); + +	return 0; +} +#endif + +#ifdef CONFIG_SOUND_MAX98095 +static void  board_enable_audio_codec(void) +{ +	struct exynos5_gpio_part1 *gpio1 = (struct exynos5_gpio_part1 *) +						samsung_get_base_gpio_part1(); + +	/* Enable MAX98095 Codec */ +	s5p_gpio_direction_output(&gpio1->x1, 7, 1); +	s5p_gpio_set_pull(&gpio1->x1, 7, GPIO_PULL_NONE); +} +#endif + +int board_init(void) +{ +	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); + +#if defined CONFIG_EXYNOS_TMU +	if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { +		debug("%s: Failed to init TMU\n", __func__); +		return -1; +	} +	boot_temp_check(); +#endif + +#ifdef CONFIG_EXYNOS_SPI +	spi_init(); +#endif +#ifdef CONFIG_USB_EHCI_EXYNOS +	board_usb_vbus_init(); +#endif +#ifdef CONFIG_SOUND_MAX98095 +	board_enable_audio_codec(); +#endif +	return 0; +} + +int dram_init(void) +{ +	int i; +	u32 addr; + +	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { +		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); +		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); +	} +	return 0; +} + +#if defined(CONFIG_POWER) +static int pmic_reg_update(struct pmic *p, int reg, uint regval) +{ +	u32 val; +	int ret = 0; + +	ret = pmic_reg_read(p, reg, &val); +	if (ret) { +		debug("%s: PMIC %d register read failed\n", __func__, reg); +		return -1; +	} +	val |= regval; +	ret = pmic_reg_write(p, reg, val); +	if (ret) { +		debug("%s: PMIC %d register write failed\n", __func__, reg); +		return -1; +	} +	return 0; +} + +int power_init_board(void) +{ +	struct pmic *p; + +	set_ps_hold_ctrl(); + +	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); + +	if (pmic_init(I2C_PMIC)) +		return -1; + +	p = pmic_get("MAX77686_PMIC"); +	if (!p) +		return -ENODEV; + +	if (pmic_probe(p)) +		return -1; + +	if (pmic_reg_update(p, MAX77686_REG_PMIC_32KHZ, MAX77686_32KHCP_EN)) +		return -1; + +	if (pmic_reg_update(p, MAX77686_REG_PMIC_BBAT, +			    MAX77686_BBCHOSTEN | MAX77686_BBCVS_3_5V)) +		return -1; + +	/* VDD_MIF */ +	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK1OUT, +			   MAX77686_BUCK1OUT_1V)) { +		debug("%s: PMIC %d register write failed\n", __func__, +		      MAX77686_REG_PMIC_BUCK1OUT); +		return -1; +	} + +	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK1CRTL, +			    MAX77686_BUCK1CTRL_EN)) +		return -1; + +	/* VDD_ARM */ +	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK2DVS1, +			   MAX77686_BUCK2DVS1_1_3V)) { +		debug("%s: PMIC %d register write failed\n", __func__, +		      MAX77686_REG_PMIC_BUCK2DVS1); +		return -1; +	} + +	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK2CTRL1, +			    MAX77686_BUCK2CTRL_ON)) +		return -1; + +	/* VDD_INT */ +	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK3DVS1, +			   MAX77686_BUCK3DVS1_1_0125V)) { +		debug("%s: PMIC %d register write failed\n", __func__, +		      MAX77686_REG_PMIC_BUCK3DVS1); +		return -1; +	} + +	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK3CTRL, +			    MAX77686_BUCK3CTRL_ON)) +		return -1; + +	/* VDD_G3D */ +	if (pmic_reg_write(p, MAX77686_REG_PMIC_BUCK4DVS1, +			   MAX77686_BUCK4DVS1_1_2V)) { +		debug("%s: PMIC %d register write failed\n", __func__, +		      MAX77686_REG_PMIC_BUCK4DVS1); +		return -1; +	} + +	if (pmic_reg_update(p, MAX77686_REG_PMIC_BUCK4CTRL1, +			    MAX77686_BUCK3CTRL_ON)) +		return -1; + +	/* VDD_LDO2 */ +	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO2CTRL1, +			    MAX77686_LD02CTRL1_1_5V | EN_LDO)) +		return -1; + +	/* VDD_LDO3 */ +	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO3CTRL1, +			    MAX77686_LD03CTRL1_1_8V | EN_LDO)) +		return -1; + +	/* VDD_LDO5 */ +	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO5CTRL1, +			    MAX77686_LD05CTRL1_1_8V | EN_LDO)) +		return -1; + +	/* VDD_LDO10 */ +	if (pmic_reg_update(p, MAX77686_REG_PMIC_LDO10CTRL1, +			    MAX77686_LD10CTRL1_1_8V | EN_LDO)) +		return -1; + +	return 0; +} +#endif + +void dram_init_banksize(void) +{ +	int i; +	u32 addr, size; + +	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { +		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); +		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); + +		gd->bd->bi_dram[i].start = addr; +		gd->bd->bi_dram[i].size = size; +	} +} + +static int decode_sromc(const void *blob, struct fdt_sromc *config) +{ +	int err; +	int node; + +	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); +	if (node < 0) { +		debug("Could not find SROMC node\n"); +		return node; +	} + +	config->bank = fdtdec_get_int(blob, node, "bank", 0); +	config->width = fdtdec_get_int(blob, node, "width", 2); + +	err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, +			FDT_SROM_TIMING_COUNT); +	if (err < 0) { +		debug("Could not decode SROMC configuration Error: %s\n", +		      fdt_strerror(err)); +		return -FDT_ERR_NOTFOUND; +	} +	return 0; +} + +int board_eth_init(bd_t *bis) +{ +#ifdef CONFIG_SMC911X +	u32 smc_bw_conf, smc_bc_conf; +	struct fdt_sromc config; +	fdt_addr_t base_addr; +	int node; + +	node = decode_sromc(gd->fdt_blob, &config); +	if (node < 0) { +		debug("%s: Could not find sromc configuration\n", __func__); +		return 0; +	} +	node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); +	if (node < 0) { +		debug("%s: Could not find lan9215 configuration\n", __func__); +		return 0; +	} + +	/* We now have a node, so any problems from now on are errors */ +	base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); +	if (base_addr == FDT_ADDR_T_NONE) { +		debug("%s: Could not find lan9215 address\n", __func__); +		return -1; +	} + +	/* Ethernet needs data bus width of 16 bits */ +	if (config.width != 2) { +		debug("%s: Unsupported bus width %d\n", __func__, +		      config.width); +		return -1; +	} +	smc_bw_conf = SROMC_DATA16_WIDTH(config.bank) +			| SROMC_BYTE_ENABLE(config.bank); + +	smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS])   | +			SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) | +			SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) | +			SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) | +			SROMC_BC_TAH(config.timing[FDT_SROM_TAH])   | +			SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) | +			SROMC_BC_PMC(config.timing[FDT_SROM_PMC]); + +	/* Select and configure the SROMC bank */ +	exynos_pinmux_config(PERIPH_ID_SROMC, config.bank); +	s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf); +	return smc911x_initialize(0, base_addr); +#endif +	return 0; +} + +#ifdef CONFIG_DISPLAY_BOARDINFO +int checkboard(void) +{ +	const char *board_name; + +	board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); +	if (board_name == NULL) +		printf("\nUnknown Board\n"); +	else +		printf("\nBoard: %s\n", board_name); + +	return 0; +} +#endif + +#ifdef CONFIG_GENERIC_MMC +int board_mmc_init(bd_t *bis) +{ +	int ret; +	/* dwmmc initializattion for available channels */ +	ret = exynos_dwmmc_init(gd->fdt_blob); +	if (ret) +		debug("dwmmc init failed\n"); + +	return ret; +} +#endif + +static int board_uart_init(void) +{ +	int err, uart_id, ret = 0; + +	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { +		err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); +		if (err) { +			debug("UART%d not configured\n", +			      (uart_id - PERIPH_ID_UART0)); +			ret |= err; +		} +	} +	return ret; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ +	int err; +	err = board_uart_init(); +	if (err) { +		debug("UART init failed\n"); +		return err; +	} +#ifdef CONFIG_SYS_I2C_INIT_BOARD +	board_i2c_init(gd->fdt_blob); +#endif +	return err; +} +#endif + +#ifdef CONFIG_LCD +void exynos_cfg_lcd_gpio(void) +{ +	struct exynos5_gpio_part1 *gpio1 = +		(struct exynos5_gpio_part1 *)samsung_get_base_gpio_part1(); + +	/* For Backlight */ +	s5p_gpio_cfg_pin(&gpio1->b2, 0, GPIO_OUTPUT); +	s5p_gpio_set_value(&gpio1->b2, 0, 1); + +	/* LCD power on */ +	s5p_gpio_cfg_pin(&gpio1->x1, 5, GPIO_OUTPUT); +	s5p_gpio_set_value(&gpio1->x1, 5, 1); + +	/* Set Hotplug detect for DP */ +	s5p_gpio_cfg_pin(&gpio1->x0, 7, GPIO_FUNC(0x3)); +} + +void exynos_set_dp_phy(unsigned int onoff) +{ +	set_dp_phy_ctrl(onoff); +} +#endif diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c index 8b09e1de4..276fd4132 100644 --- a/board/samsung/smdk5250/smdk5250.c +++ b/board/samsung/smdk5250/smdk5250.c @@ -29,6 +29,7 @@  #include <netdev.h>  #include <spi.h>  #include <asm/arch/cpu.h> +#include <asm/arch/dwmmc.h>  #include <asm/arch/gpio.h>  #include <asm/arch/mmc.h>  #include <asm/arch/pinmux.h> @@ -37,39 +38,9 @@  #include <asm/arch/dp_info.h>  #include <power/pmic.h>  #include <power/max77686_pmic.h> -#include <tmu.h>  DECLARE_GLOBAL_DATA_PTR; -#if defined CONFIG_EXYNOS_TMU -/* - * Boot Time Thermal Analysis for SoC temperature threshold breach - */ -static void boot_temp_check(void) -{ -	int temp; - -	switch (tmu_monitor(&temp)) { -	/* Status TRIPPED ans WARNING means corresponding threshold breach */ -	case TMU_STATUS_TRIPPED: -		puts("EXYNOS_TMU: TRIPPING! Device power going down ...\n"); -		set_ps_hold_ctrl(); -		hang(); -		break; -	case TMU_STATUS_WARNING: -		puts("EXYNOS_TMU: WARNING! Temperature very high\n"); -		break; -	/* -	 * TMU_STATUS_INIT means something is wrong with temperature sensing -	 * and TMU status was changed back from NORMAL to INIT. -	 */ -	case TMU_STATUS_INIT: -	default: -		debug("EXYNOS_TMU: Unknown TMU state\n"); -	} -} -#endif -  #ifdef CONFIG_USB_EHCI_EXYNOS  int board_usb_vbus_init(void)  { @@ -102,14 +73,6 @@ int board_init(void)  {  	gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL); -#if defined CONFIG_EXYNOS_TMU -	if (tmu_init(gd->fdt_blob) != TMU_STATUS_NORMAL) { -		debug("%s: Failed to init TMU\n", __func__); -		return -1; -	} -	boot_temp_check(); -#endif -  #ifdef CONFIG_EXYNOS_SPI  	spi_init();  #endif @@ -124,14 +87,13 @@ int board_init(void)  int dram_init(void)  { -	gd->ram_size	= get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_3, PHYS_SDRAM_3_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_4, PHYS_SDRAM_4_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_5, PHYS_SDRAM_7_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_6, PHYS_SDRAM_7_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_7, PHYS_SDRAM_7_SIZE) -			+ get_ram_size((long *)PHYS_SDRAM_8, PHYS_SDRAM_8_SIZE); +	int i; +	u32 addr; + +	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { +		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); +		gd->ram_size += get_ram_size((long *)addr, SDRAM_BANK_SIZE); +	}  	return 0;  } @@ -254,57 +216,15 @@ int power_init_board(void)  void dram_init_banksize(void)  { -	gd->bd->bi_dram[0].start = PHYS_SDRAM_1; -	gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, -							PHYS_SDRAM_1_SIZE); -	gd->bd->bi_dram[1].start = PHYS_SDRAM_2; -	gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, -							PHYS_SDRAM_2_SIZE); -	gd->bd->bi_dram[2].start = PHYS_SDRAM_3; -	gd->bd->bi_dram[2].size = get_ram_size((long *)PHYS_SDRAM_3, -							PHYS_SDRAM_3_SIZE); -	gd->bd->bi_dram[3].start = PHYS_SDRAM_4; -	gd->bd->bi_dram[3].size = get_ram_size((long *)PHYS_SDRAM_4, -							PHYS_SDRAM_4_SIZE); -	gd->bd->bi_dram[4].start = PHYS_SDRAM_5; -	gd->bd->bi_dram[4].size = get_ram_size((long *)PHYS_SDRAM_5, -							PHYS_SDRAM_5_SIZE); -	gd->bd->bi_dram[5].start = PHYS_SDRAM_6; -	gd->bd->bi_dram[5].size = get_ram_size((long *)PHYS_SDRAM_6, -							PHYS_SDRAM_6_SIZE); -	gd->bd->bi_dram[6].start = PHYS_SDRAM_7; -	gd->bd->bi_dram[6].size = get_ram_size((long *)PHYS_SDRAM_7, -							PHYS_SDRAM_7_SIZE); -	gd->bd->bi_dram[7].start = PHYS_SDRAM_8; -	gd->bd->bi_dram[7].size = get_ram_size((long *)PHYS_SDRAM_8, -							PHYS_SDRAM_8_SIZE); -} - -#ifdef CONFIG_OF_CONTROL -static int decode_sromc(const void *blob, struct fdt_sromc *config) -{ -	int err; -	int node; - -	node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC); -	if (node < 0) { -		debug("Could not find SROMC node\n"); -		return node; -	} - -	config->bank = fdtdec_get_int(blob, node, "bank", 0); -	config->width = fdtdec_get_int(blob, node, "width", 2); - -	err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing, -			FDT_SROM_TIMING_COUNT); -	if (err < 0) { -		debug("Could not decode SROMC configuration\n"); -		return -FDT_ERR_NOTFOUND; +	int i; +	u32 addr, size; +	for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { +		addr = CONFIG_SYS_SDRAM_BASE + (i * SDRAM_BANK_SIZE); +		size = get_ram_size((long *)addr, SDRAM_BANK_SIZE); +		gd->bd->bi_dram[i].start = addr; +		gd->bd->bi_dram[i].size = size;  	} - -	return 0;  } -#endif  int board_eth_init(bd_t *bis)  { @@ -313,27 +233,6 @@ int board_eth_init(bd_t *bis)  	struct fdt_sromc config;  	fdt_addr_t base_addr; -#ifdef CONFIG_OF_CONTROL -	int node; - -	node = decode_sromc(gd->fdt_blob, &config); -	if (node < 0) { -		debug("%s: Could not find sromc configuration\n", __func__); -		return 0; -	} -	node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215); -	if (node < 0) { -		debug("%s: Could not find lan9215 configuration\n", __func__); -		return 0; -	} - -	/* We now have a node, so any problems from now on are errors */ -	base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg"); -	if (base_addr == FDT_ADDR_T_NONE) { -		debug("%s: Could not find lan9215 address\n", __func__); -		return -1; -	} -#else  	/* Non-FDT configuration - bank number and timing parameters*/  	config.bank = CONFIG_ENV_SROM_BANK;  	config.width = 2; @@ -346,7 +245,6 @@ int board_eth_init(bd_t *bis)  	config.timing[FDT_SROM_TACP] = 0x09;  	config.timing[FDT_SROM_PMC] = 0x01;  	base_addr = CONFIG_SMC911X_BASE; -#endif  	/* Ethernet needs data bus width of 16 bits */  	if (config.width != 2) { @@ -376,17 +274,7 @@ int board_eth_init(bd_t *bis)  #ifdef CONFIG_DISPLAY_BOARDINFO  int checkboard(void)  { -#ifdef CONFIG_OF_CONTROL -	const char *board_name; - -	board_name = fdt_getprop(gd->fdt_blob, 0, "model", NULL); -	if (board_name == NULL) -		printf("\nUnknown Board\n"); -	else -		printf("\nBoard: %s\n", board_name); -#else  	printf("\nBoard: SMDK5250\n"); -#endif  	return 0;  }  #endif @@ -394,48 +282,54 @@ int checkboard(void)  #ifdef CONFIG_GENERIC_MMC  int board_mmc_init(bd_t *bis)  { -	int err; +	int err, ret = 0, index, bus_width; +	u32 base;  	err = exynos_pinmux_config(PERIPH_ID_SDMMC0, PINMUX_FLAG_8BIT_MODE); -	if (err) { +	if (err)  		debug("SDMMC0 not configured\n"); -		return err; -	} +	ret |= err; -	err = s5p_mmc_init(0, 8); -	return err; +	/*EMMC: dwmmc Channel-0 with 8 bit bus width */ +	index = 0; +	base =  samsung_get_base_mmc() + (0x10000 * index); +	bus_width = 8; +	err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL); +	if (err) +		debug("dwmmc Channel-0 init failed\n"); +	ret |= err; + +	err = exynos_pinmux_config(PERIPH_ID_SDMMC2, PINMUX_FLAG_NONE); +	if (err) +		debug("SDMMC2 not configured\n"); +	ret |= err; + +	/*SD: dwmmc Channel-2 with 4 bit bus width */ +	index = 2; +	base = samsung_get_base_mmc() + (0x10000 * index); +	bus_width = 4; +	err = exynos_dwmci_add_port(index, base, bus_width, (u32)NULL); +	if (err) +		debug("dwmmc Channel-2 init failed\n"); +	ret |= err; + +	return ret;  }  #endif  static int board_uart_init(void)  { -	int err; +	int err, uart_id, ret = 0; -	err = exynos_pinmux_config(PERIPH_ID_UART0, PINMUX_FLAG_NONE); -	if (err) { -		debug("UART0 not configured\n"); -		return err; +	for (uart_id = PERIPH_ID_UART0; uart_id <= PERIPH_ID_UART3; uart_id++) { +		err = exynos_pinmux_config(uart_id, PINMUX_FLAG_NONE); +		if (err) { +			debug("UART%d not configured\n", +			      (uart_id - PERIPH_ID_UART0)); +			ret |= err; +		}  	} - -	err = exynos_pinmux_config(PERIPH_ID_UART1, PINMUX_FLAG_NONE); -	if (err) { -		debug("UART1 not configured\n"); -		return err; -	} - -	err = exynos_pinmux_config(PERIPH_ID_UART2, PINMUX_FLAG_NONE); -	if (err) { -		debug("UART2 not configured\n"); -		return err; -	} - -	err = exynos_pinmux_config(PERIPH_ID_UART3, PINMUX_FLAG_NONE); -	if (err) { -		debug("UART3 not configured\n"); -		return err; -	} - -	return 0; +	return ret;  }  #ifdef CONFIG_BOARD_EARLY_INIT_F @@ -448,7 +342,7 @@ int board_early_init_f(void)  		return err;  	}  #ifdef CONFIG_SYS_I2C_INIT_BOARD -	board_i2c_init(gd->fdt_blob); +	board_i2c_init(NULL);  #endif  	return err;  } @@ -477,7 +371,6 @@ void exynos_set_dp_phy(unsigned int onoff)  	set_dp_phy_ctrl(onoff);  } -#ifndef CONFIG_OF_CONTROL  vidinfo_t panel_info = {  	.vl_freq	= 60,  	.vl_col		= 2560, @@ -543,13 +436,9 @@ static struct exynos_dp_platform_data dp_platform_data = {  	.edp_dev_info	= &edp_info,  }; -#endif  void init_panel_info(vidinfo_t *vid)  { -#ifndef CONFIG_OF_CONTROL -	vid->rgb_mode   = MODE_RGB_P, - +	vid->rgb_mode   = MODE_RGB_P;  	exynos_set_dp_platform_data(&dp_platform_data); -#endif  }  #endif diff --git a/drivers/video/exynos_fb.c b/drivers/video/exynos_fb.c index ed0823bf9..c3606d5b0 100644 --- a/drivers/video/exynos_fb.c +++ b/drivers/video/exynos_fb.c @@ -319,10 +319,10 @@ void lcd_ctrl_init(void *lcdbase)  #ifdef CONFIG_OF_CONTROL  	if (exynos_fimd_parse_dt(gd->fdt_blob))  		debug("Can't get proper panel info\n"); -#endif +#else  	/* initialize parameters which is specific to panel. */  	init_panel_info(&panel_info); - +#endif  	panel_width = panel_info.vl_width;  	panel_height = panel_info.vl_height; diff --git a/include/configs/exynos5250-dt.h b/include/configs/exynos5250-dt.h index 62b83d4c5..9b97d4fb0 100644 --- a/include/configs/exynos5250-dt.h +++ b/include/configs/exynos5250-dt.h @@ -98,6 +98,10 @@  #define CONFIG_MMC  #define CONFIG_SDHCI  #define CONFIG_S5P_SDHCI +#define CONFIG_DWMMC +#define CONFIG_EXYNOS_DWMMC +#define CONFIG_SUPPORT_EMMC_BOOT +  #define CONFIG_BOARD_EARLY_INIT_F @@ -230,6 +234,10 @@  #define SPI_FLASH_UBOOT_POS		(CONFIG_SEC_FW_SIZE + CONFIG_BL1_SIZE)  #define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_PART +#define CONFIG_PARTITION_UUIDS +  #define CONFIG_IRAM_STACK	0x02050000 |