diff options
71 files changed, 318 insertions, 861 deletions
| @@ -24,7 +24,7 @@  VERSION = 2010  PATCHLEVEL = 09  SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION =  ifneq "$(SUBLEVEL)" ""  U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)  else @@ -126,13 +126,17 @@ the string "u_boot" or on "U_BOOT". Example:  Versioning:  =========== -U-Boot uses a 3 level version number containing a version, a -sub-version, and a patchlevel: "U-Boot-2.34.5" means version "2", -sub-version "34", and patchlevel "4". +Starting with the release in October 2008, the names of the releases +were changed from numerical release numbers without deeper meaning +into a time stamp based numbering. Regular releases are identified by +names consisting of the calendar year and month of the release date. +Additional fields (if present) indicate release candidates or bug fix +releases in "stable" maintenance trees. -The patchlevel is used to indicate certain stages of development -between released versions, i. e. officially released versions of -U-Boot will always have a patchlevel of "0". +Examples: +	U-Boot v2009.11     - Release November 2009 +	U-Boot v2009.11.1   - Release 1 in version November 2009 stable tree +	U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release  Directory Hierarchy: diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 195be6eea..8c1f3953e 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -30,6 +30,7 @@  #include <common.h>  #include <asm/arch/cpu.h>  #include <asm/arch/sys_proto.h> +#include <asm/sizes.h>  /*   * Routine: s_init @@ -66,6 +67,33 @@ void watchdog_init(void)  	writel(WD_UNLOCK2, &wd2_base->wspr);  } + +/* + * This function finds the SDRAM size available in the system + * based on DMM section configurations + * This is needed because the size of memory installed may be + * different on different versions of the board + */ +u32 sdram_size(void) +{ +	u32 section, i, total_size = 0, size, addr; +	for (i = 0; i < 4; i++) { +		section	= __raw_readl(DMM_LISA_MAP_BASE + i*4); +		addr = section & DMM_LISA_MAP_SYS_ADDR_MASK; +		/* See if the address is valid */ +		if ((addr >= OMAP44XX_DRAM_ADDR_SPACE_START) && +		    (addr < OMAP44XX_DRAM_ADDR_SPACE_END)) { +			size	= ((section & DMM_LISA_MAP_SYS_SIZE_MASK) >> +				    DMM_LISA_MAP_SYS_SIZE_SHIFT); +			size	= 1 << size; +			size	*= SZ_16M; +			total_size += size; +		} +	} +	return total_size; +} + +  /*   * Routine: dram_init   * Description: sets uboots idea of sdram size @@ -75,7 +103,7 @@ int dram_init(void)  	DECLARE_GLOBAL_DATA_PTR;  	gd->bd->bi_dram[0].start = 0x80000000; -	gd->bd->bi_dram[0].size = 512 << 20; +	gd->bd->bi_dram[0].size = sdram_size();  	return 0;  } diff --git a/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgr.c b/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgr.c index f5a4c5f50..a9ea8bc10 100644 --- a/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgr.c +++ b/arch/arm/cpu/ixp/npe/IxNpeDlNpeMgr.c @@ -51,11 +51,6 @@  /*   * Put the user defined include files required.   */ - - -/* - * Put the user defined include files required. - */  #include "IxOsal.h"  #include "IxNpeDl.h"  #include "IxNpeDlNpeMgr_p.h" diff --git a/arch/arm/include/asm/arch-omap4/omap4.h b/arch/arm/include/asm/arch-omap4/omap4.h index d0c808d12..a30bb332e 100644 --- a/arch/arm/include/asm/arch-omap4/omap4.h +++ b/arch/arm/include/asm/arch-omap4/omap4.h @@ -42,6 +42,10 @@  #define OMAP44XX_L4_WKUP_BASE	0x4A300000  #define OMAP44XX_L4_PER_BASE	0x48000000 +#define OMAP44XX_DRAM_ADDR_SPACE_START	0x80000000 +#define OMAP44XX_DRAM_ADDR_SPACE_END	0xD0000000 + +  /* CONTROL */  #define CTRL_BASE		(OMAP44XX_L4_CORE_BASE + 0x2000)  #define CONTROL_PADCONF_CORE	(OMAP44XX_L4_CORE_BASE + 0x100000) @@ -66,6 +70,12 @@  /* GPMC */  #define OMAP44XX_GPMC_BASE	0x50000000 +/* DMM */ +#define OMAP44XX_DMM_BASE		0x4E000000 +#define DMM_LISA_MAP_BASE		(OMAP44XX_DMM_BASE + 0x40) +#define DMM_LISA_MAP_SYS_SIZE_MASK	(7 << 20) +#define DMM_LISA_MAP_SYS_SIZE_SHIFT	20 +#define DMM_LISA_MAP_SYS_ADDR_MASK	(0xFF << 24)  /*   * Hardware Register Details   */ diff --git a/arch/blackfin/include/asm/config-pre.h b/arch/blackfin/include/asm/config-pre.h index 4531519d9..4ce67d4cd 100644 --- a/arch/blackfin/include/asm/config-pre.h +++ b/arch/blackfin/include/asm/config-pre.h @@ -71,6 +71,9 @@ static inline const char *get_bfin_boot_mode(int bfin_boot)  # define BFIN_BOOT_SPI_SSEL 1  #endif +/* Define to get a GPIO CS with the Blackfin SPI controller */ +#define MAX_CTRL_CS 8 +  /* There is no Blackfin/NetBSD port */  #undef CONFIG_BOOTM_NETBSD diff --git a/arch/blackfin/lib/Makefile b/arch/blackfin/lib/Makefile index 3bdba754d..a18bbd63e 100644 --- a/arch/blackfin/lib/Makefile +++ b/arch/blackfin/lib/Makefile @@ -46,7 +46,7 @@ COBJS-y	+= clocks.o  COBJS-$(CONFIG_CMD_CACHE_DUMP) += cmd_cache_dump.o  COBJS-$(CONFIG_CMD_KGDB) += kgdb.o  COBJS-y	+= muldi3.o -COBJS-$(CONFIG_POST) += post.o tests.o +COBJS-$(CONFIG_POST_ALT_LIST) += tests.o  COBJS-y	+= string.o  SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) diff --git a/arch/blackfin/lib/board.c b/arch/blackfin/lib/board.c index 46e36c890..7643250da 100644 --- a/arch/blackfin/lib/board.c +++ b/arch/blackfin/lib/board.c @@ -322,7 +322,6 @@ void board_init_r(gd_t * id, ulong dest_addr)  #if defined(CONFIG_POST)  	post_output_backlog(); -	post_reloc();  #endif  	/* initialize malloc() area */ diff --git a/arch/blackfin/lib/post.c b/arch/blackfin/lib/post.c deleted file mode 100644 index bd6aaf5d4..000000000 --- a/arch/blackfin/lib/post.c +++ /dev/null @@ -1,421 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <stdio_dev.h> -#include <watchdog.h> -#include <post.h> - -#ifdef CONFIG_LOGBUFFER -#include <logbuff.h> -#endif - -DECLARE_GLOBAL_DATA_PTR; - -#define POST_MAX_NUMBER		32 - -#define BOOTMODE_MAGIC	0xDEAD0000 - -int post_init_f(void) -{ -	int res = 0; -	unsigned int i; - -	for (i = 0; i < post_list_size; i++) { -		struct post_test *test = post_list + i; - -		if (test->init_f && test->init_f()) { -			res = -1; -		} -	} - -	gd->post_init_f_time = post_time_ms(0); -	if (!gd->post_init_f_time) { -		printf -		    ("post/post.c: post_time_ms seems not to be implemented\n"); -	} - -	return res; -} - -void post_bootmode_init(void) -{ -	int bootmode = post_bootmode_get(0); -	int newword; - -	if (post_hotkeys_pressed() && !(bootmode & POST_POWERTEST)) { -		newword = BOOTMODE_MAGIC | POST_SLOWTEST; -	} else if (bootmode == 0) { -		newword = BOOTMODE_MAGIC | POST_POWERON; -	} else if (bootmode == POST_POWERON || bootmode == POST_SLOWTEST) { -		newword = BOOTMODE_MAGIC | POST_NORMAL; -	} else { -		/* Use old value */ -		newword = post_word_load() & ~POST_COLDBOOT; -	} - -	if (bootmode == 0) { -		/* We are booting after power-on */ -		newword |= POST_COLDBOOT; -	} - -	post_word_store(newword); - -	/* Reset activity record */ -	gd->post_log_word = 0; -} - -int post_bootmode_get(unsigned int *last_test) -{ -	unsigned long word = post_word_load(); -	int bootmode; - -	if ((word & 0xFFFF0000) != BOOTMODE_MAGIC) { -		return 0; -	} - -	bootmode = word & 0x7F; - -	if (last_test && (bootmode & POST_POWERTEST)) { -		*last_test = (word >> 8) & 0xFF; -	} - -	return bootmode; -} - -/* POST tests run before relocation only mark status bits .... */ -static void post_log_mark_start(unsigned long testid) -{ -	gd->post_log_word |= (testid) << 16; -} - -static void post_log_mark_succ(unsigned long testid) -{ -	gd->post_log_word |= testid; -} - -/* ... and the messages are output once we are relocated */ -void post_output_backlog(void) -{ -	int j; - -	for (j = 0; j < post_list_size; j++) { -		if (gd->post_log_word & (post_list[j].testid << 16)) { -			post_log("POST %s ", post_list[j].cmd); -			if (gd->post_log_word & post_list[j].testid) -				post_log("PASSED\n"); -			else { -				post_log("FAILED\n"); -				show_boot_progress (-31); -			} -		} -	} -} - -static void post_bootmode_test_on(unsigned int last_test) -{ -	unsigned long word = post_word_load(); - -	word |= POST_POWERTEST; - -	word |= (last_test & 0xFF) << 8; - -	post_word_store(word); -} - -static void post_bootmode_test_off(void) -{ -	unsigned long word = post_word_load(); - -	word &= ~POST_POWERTEST; - -	post_word_store(word); -} - -static void post_get_flags(int *test_flags) -{ -	int flag[] = { POST_POWERON, POST_NORMAL, POST_SLOWTEST }; -	char *var[] = { "post_poweron", "post_normal", "post_slowtest" }; -	int varnum = sizeof(var) / sizeof(var[0]); -	char list[128];		/* long enough for POST list */ -	char *name; -	char *s; -	int last; -	int i, j; - -	for (j = 0; j < post_list_size; j++) { -		test_flags[j] = post_list[j].flags; -	} - -	for (i = 0; i < varnum; i++) { -		if (getenv_f(var[i], list, sizeof(list)) <= 0) -			continue; - -		for (j = 0; j < post_list_size; j++) { -			test_flags[j] &= ~flag[i]; -		} - -		last = 0; -		name = list; -		while (!last) { -			while (*name && *name == ' ') -				name++; -			if (*name == 0) -				break; -			s = name + 1; -			while (*s && *s != ' ') -				s++; -			if (*s == 0) -				last = 1; -			else -				*s = 0; - -			for (j = 0; j < post_list_size; j++) { -				if (strcmp(post_list[j].cmd, name) == 0) { -					test_flags[j] |= flag[i]; -					break; -				} -			} - -			if (j == post_list_size) { -				printf("No such test: %s\n", name); -			} - -			name = s + 1; -		} -	} - -	for (j = 0; j < post_list_size; j++) { -		if (test_flags[j] & POST_POWERON) { -			test_flags[j] |= POST_SLOWTEST; -		} -	} -} - -static int post_run_single(struct post_test *test, -			   int test_flags, int flags, unsigned int i) -{ -	if ((flags & test_flags & POST_ALWAYS) && -	    (flags & test_flags & POST_MEM)) { -		WATCHDOG_RESET(); - -		if (!(flags & POST_REBOOT)) { -			if ((test_flags & POST_REBOOT) -			    && !(flags & POST_MANUAL)) { -				post_bootmode_test_on(i); -			} - -			if (test_flags & POST_PREREL) -				post_log_mark_start(test->testid); -			else -				post_log("POST %s ", test->cmd); -		} - -		if (test_flags & POST_PREREL) { -			if ((*test->test) (flags) == 0) -				post_log_mark_succ(test->testid); -		} else { -			if ((*test->test) (flags) != 0) { -				post_log("FAILED\n"); -				show_boot_progress (-32); -			} else -				post_log("PASSED\n"); -		} - -		if ((test_flags & POST_REBOOT) && !(flags & POST_MANUAL)) { -			post_bootmode_test_off(); -		} - -		return 0; -	} else { -		return -1; -	} -} - -int post_run(char *name, int flags) -{ -	unsigned int i; -	int test_flags[POST_MAX_NUMBER]; - -	post_get_flags(test_flags); - -	if (name == NULL) { -		unsigned int last; - -		if (post_bootmode_get(&last) & POST_POWERTEST) { -			if (last < post_list_size && -			    (flags & test_flags[last] & POST_ALWAYS) && -			    (flags & test_flags[last] & POST_MEM)) { - -				post_run_single(post_list + last, -						test_flags[last], -						flags | POST_REBOOT, last); - -				for (i = last + 1; i < post_list_size; i++) { -					post_run_single(post_list + i, -							test_flags[i], -							flags, i); -				} -			} -		} else { -			for (i = 0; i < post_list_size; i++) { -				post_run_single(post_list + i, -						test_flags[i], flags, i); -			} -		} - -		return 0; -	} else { -		for (i = 0; i < post_list_size; i++) { -			if (strcmp(post_list[i].cmd, name) == 0) -				break; -		} - -		if (i < post_list_size) { -			return post_run_single(post_list + i, -					       test_flags[i], flags, i); -		} else { -			return -1; -		} -	} -} - -static int post_info_single(struct post_test *test, int full) -{ -	if (test->flags & POST_MANUAL) { -		if (full) -			printf("%s - %s\n" -			       "  %s\n", test->cmd, test->name, test->desc); -		else -			printf("  %-15s - %s\n", test->cmd, test->name); - -		return 0; -	} else { -		return -1; -	} -} - -int post_info(char *name) -{ -	unsigned int i; - -	if (name == NULL) { -		for (i = 0; i < post_list_size; i++) { -			post_info_single(post_list + i, 0); -		} - -		return 0; -	} else { -		for (i = 0; i < post_list_size; i++) { -			if (strcmp(post_list[i].cmd, name) == 0) -				break; -		} - -		if (i < post_list_size) { -			return post_info_single(post_list + i, 1); -		} else { -			return -1; -		} -	} -} - -int post_log(char *format, ...) -{ -	va_list args; -	uint i; -	char printbuffer[CONFIG_SYS_PBSIZE]; - -	va_start(args, format); - -	/* For this to work, printbuffer must be larger than -	 * anything we ever want to print. -	 */ -	i = vsprintf(printbuffer, format, args); -	va_end(args); - -#ifdef CONFIG_LOGBUFFER -	/* Send to the logbuffer */ -	logbuff_log(printbuffer); -#else -	/* Send to the stdout file */ -	puts(printbuffer); -#endif - -	return 0; -} - -void post_reloc(void) -{ -	unsigned int i; - -	/* -	 * We have to relocate the test table manually -	 */ -	for (i = 0; i < post_list_size; i++) { -		ulong addr; -		struct post_test *test = post_list + i; - -		if (test->name) { -			addr = (ulong) (test->name) + gd->reloc_off; -			test->name = (char *)addr; -		} - -		if (test->cmd) { -			addr = (ulong) (test->cmd) + gd->reloc_off; -			test->cmd = (char *)addr; -		} - -		if (test->desc) { -			addr = (ulong) (test->desc) + gd->reloc_off; -			test->desc = (char *)addr; -		} - -		if (test->test) { -			addr = (ulong) (test->test) + gd->reloc_off; -			test->test = (int (*)(int flags))addr; -		} - -		if (test->init_f) { -			addr = (ulong) (test->init_f) + gd->reloc_off; -			test->init_f = (int (*)(void))addr; -		} - -		if (test->reloc) { -			addr = (ulong) (test->reloc) + gd->reloc_off; -			test->reloc = (void (*)(void))addr; - -			test->reloc(); -		} -	} -} - -/* - * Some tests (e.g. SYSMON) need the time when post_init_f started, - * but we cannot use get_timer() at this point. - * - * On PowerPC we implement it using the timebase register. - */ -unsigned long post_time_ms(unsigned long base) -{ -	return (unsigned long)get_ticks() / (get_tbclk() / CONFIG_SYS_HZ) - base; -} diff --git a/arch/powerpc/cpu/mpc512x/Makefile b/arch/powerpc/cpu/mpc512x/Makefile index d1b6946be..37b06f346 100644 --- a/arch/powerpc/cpu/mpc512x/Makefile +++ b/arch/powerpc/cpu/mpc512x/Makefile @@ -29,7 +29,6 @@ LIB	= $(obj)lib$(CPU).a  START	= start.o  COBJS-y	:= cpu.o  COBJS-y	+= traps.o -COBJS-y += common.o  COBJS-y += cpu_init.o  COBJS-y += fixed_sdram.o  COBJS-y += i2c.o diff --git a/arch/powerpc/cpu/mpc512x/common.c b/arch/powerpc/cpu/mpc512x/common.c deleted file mode 100644 index 180d323cf..000000000 --- a/arch/powerpc/cpu/mpc512x/common.c +++ /dev/null @@ -1,25 +0,0 @@ -#include <common.h> -#include <asm/io.h> - -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -#if defined(CONFIG_SYS_POST_WORD_ADDR) -# define _POST_ADDR	(CONFIG_SYS_POST_WORD_ADDR) -#else -#error echo "No POST word address defined" -#endif - -void post_word_store(ulong a) -{ -	volatile void *save_addr = (volatile void *)(_POST_ADDR); - -	out_be32(save_addr, a); -} - -ulong post_word_load(void) -{ -	volatile void *save_addr = (volatile void *)(_POST_ADDR); - -	return in_be32(save_addr); -} -#endif  /* CONFIG_POST || CONFIG_LOGBUFFER */ diff --git a/arch/powerpc/cpu/mpc8260/commproc.c b/arch/powerpc/cpu/mpc8260/commproc.c index c522bc5c0..082957ee0 100644 --- a/arch/powerpc/cpu/mpc8260/commproc.c +++ b/arch/powerpc/cpu/mpc8260/commproc.c @@ -175,23 +175,3 @@ m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)  	else  		*bp |= CPM_BRG_EXTC_CLK5_15;  } - -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -void post_word_store (ulong a) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); - -	*save_addr = a; -} - -ulong post_word_load (void) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); - -	return *save_addr; -} - -#endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/ diff --git a/arch/powerpc/cpu/mpc85xx/commproc.c b/arch/powerpc/cpu/mpc85xx/commproc.c index f0fd1cbc3..292b723dc 100644 --- a/arch/powerpc/cpu/mpc85xx/commproc.c +++ b/arch/powerpc/cpu/mpc85xx/commproc.c @@ -183,23 +183,3 @@ m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)  	else  		*bp |= CPM_BRG_EXTC_CLK5_15;  } - -#ifdef CONFIG_POST - -void post_word_store (ulong a) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); - -	*save_addr = a; -} - -ulong post_word_load (void) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); - -	return *save_addr; -} - -#endif	/* CONFIG_POST */ diff --git a/arch/powerpc/cpu/mpc8xx/commproc.c b/arch/powerpc/cpu/mpc8xx/commproc.c index 2c8537776..5fe01fffa 100644 --- a/arch/powerpc/cpu/mpc8xx/commproc.c +++ b/arch/powerpc/cpu/mpc8xx/commproc.c @@ -83,23 +83,3 @@ uint dpram_base_align (uint align)  	return (gd->dp_alloc_base + mask) & ~mask;  }  #endif	/* CONFIG_SYS_ALLOC_DPRAM */ - -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -void post_word_store (ulong a) -{ -	volatile void *save_addr = -		((immap_t *) CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR; - -	*(volatile ulong *) save_addr = a; -} - -ulong post_word_load (void) -{ -	volatile void *save_addr = -		((immap_t *) CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR; - -	return *(volatile ulong *) save_addr; -} - -#endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/ diff --git a/arch/powerpc/cpu/ppc4xx/Makefile b/arch/powerpc/cpu/ppc4xx/Makefile index c9c1a331f..fa8d10c62 100644 --- a/arch/powerpc/cpu/ppc4xx/Makefile +++ b/arch/powerpc/cpu/ppc4xx/Makefile @@ -45,7 +45,6 @@ COBJS	+= bedbug_405.o  ifdef CONFIG_CMD_CHIP_CONFIG  COBJS	+= cmd_chip_config.o  endif -COBJS	+= commproc.o  COBJS	+= cpu.o  COBJS	+= cpu_init.o  COBJS	+= denali_data_eye.o diff --git a/arch/powerpc/cpu/ppc4xx/commproc.c b/arch/powerpc/cpu/ppc4xx/commproc.c deleted file mode 100644 index 6bf95e67b..000000000 --- a/arch/powerpc/cpu/ppc4xx/commproc.c +++ /dev/null @@ -1,53 +0,0 @@ -/* - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - * - * Atapted for ppc4XX by Denis Peter - */ - -#include <common.h> -#include <commproc.h> -#include <asm/io.h> - -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -#if defined(CONFIG_SYS_POST_WORD_ADDR) -# define _POST_ADDR	((CONFIG_SYS_OCM_DATA_ADDR) + (CONFIG_SYS_POST_WORD_ADDR)) -#elif defined(CONFIG_SYS_POST_ALT_WORD_ADDR) -# define _POST_ADDR	(CONFIG_SYS_POST_ALT_WORD_ADDR) -#endif - -void post_word_store (ulong a) -{ -	volatile void *save_addr = (volatile void *)(_POST_ADDR); - -	out_be32(save_addr, a); -} - -ulong post_word_load (void) -{ -	volatile void *save_addr = (volatile void *)(_POST_ADDR); - -	return in_be32(save_addr); -} - -#endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/ diff --git a/arch/powerpc/cpu/ppc4xx/fdt.c b/arch/powerpc/cpu/ppc4xx/fdt.c index 90c7e1905..5ddb88024 100644 --- a/arch/powerpc/cpu/ppc4xx/fdt.c +++ b/arch/powerpc/cpu/ppc4xx/fdt.c @@ -59,14 +59,14 @@ void __ft_board_setup(void *blob, bd_t *bd)  			*p++ = 0;  			*p++ = bxcr & EBC_BXCR_BAS_MASK;  			*p++ = EBC_BXCR_BANK_SIZE(bxcr); +		} +	} +  #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE -			/* Try to update reg property in nor flash node too */ -			fdt_fixup_nor_flash_size(blob, i, -						 EBC_BXCR_BANK_SIZE(bxcr)); +	/* Update reg property in all nor flash nodes too */ +	fdt_fixup_nor_flash_size(blob);  #endif -		} -	}  	/* Some 405 PPC's have EBC as direct PLB child in the dts */  	if (fdt_path_offset(blob, ebc_path) < 0) diff --git a/board/amcc/ebony/flash.c b/board/amcc/ebony/flash.c index 94eeee2e4..df7716cd7 100644 --- a/board/amcc/ebony/flash.c +++ b/board/amcc/ebony/flash.c @@ -34,6 +34,7 @@  #include <common.h>  #include <asm/ppc4xx.h>  #include <asm/processor.h> +#include <asm/io.h>  #undef DEBUG  #ifdef DEBUG @@ -71,6 +72,36 @@ static unsigned long flash_addr_table[8][CONFIG_SYS_MAX_FLASH_BANKS] = {   */  static ulong flash_get_size(vu_long * addr, flash_info_t * info); +/* + * Override the weak default mapping function with a board specific one + */ +u32 flash_get_bank_size(int cs, int idx) +{ +	u8 reg = in_8((void *)CONFIG_SYS_FPGA_BASE); + +	if ((reg & BOOT_SMALL_FLASH) && !(reg & FLASH_ONBD_N)) { +		/* +		 * cs0: small flash (512KiB) +		 * cs2: 2 * big flash (2 * 2MiB) +		 */ +		if (cs == 0) +			return flash_info[2].size; +		if (cs == 2) +			return flash_info[0].size + flash_info[1].size; +	} else { +		/* +		 * cs0: 2 * big flash (2 * 2MiB) +		 * cs2: small flash (512KiB) +		 */ +		if (cs == 0) +			return flash_info[0].size + flash_info[1].size; +		if (cs == 2) +			return flash_info[2].size; +	} + +	return 0; +} +  unsigned long flash_init(void)  {  	unsigned long total_b = 0; diff --git a/board/barco/barco.c b/board/barco/barco.c index 6ce348078..263a2885c 100644 --- a/board/barco/barco.c +++ b/board/barco/barco.c @@ -342,12 +342,3 @@ int serial_tstc (void)  {  	return 0;  } - -unsigned long post_word_load (void) -{ -	return 0l; -} -void post_word_store (unsigned long val) -{ -	return; -} diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c index 3117b5fbf..97fb5a478 100644 --- a/board/bc3450/bc3450.c +++ b/board/bc3450/bc3450.c @@ -290,26 +290,6 @@ int post_hotkeys_pressed(void)  }  #endif -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -void post_word_store (ulong a) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); - -	*save_addr = a; -} - -ulong post_word_load (void) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); - -	return *save_addr; -} -#endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/ - -  #ifdef CONFIG_BOARD_EARLY_INIT_R  int board_early_init_r (void)  { diff --git a/board/bf527-ad7160-eval/config.mk b/board/bf527-ad7160-eval/config.mk index f85bef5e2..3f9d41f37 100644 --- a/board/bf527-ad7160-eval/config.mk +++ b/board/bf527-ad7160-eval/config.mk @@ -26,8 +26,8 @@  # This is not actually used for Blackfin boards so do not change it  #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2  # Set some default LDR flags based on boot mode.  LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile index 4f8985b2a..47bf90539 100644 --- a/board/bf537-stamp/Makefile +++ b/board/bf537-stamp/Makefile @@ -31,7 +31,7 @@ LIB	= $(obj)lib$(BOARD).a  COBJS-y	:= $(BOARD).o  COBJS-$(CONFIG_BFIN_IDE)   += ide-cf.o -COBJS-$(CONFIG_POST)       += post.o post-memory.o +COBJS-$(CONFIG_HAS_POST)   += post.o post-memory.o  SRCS	:= $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)  OBJS	:= $(addprefix $(obj),$(COBJS-y)) diff --git a/board/bf537-stamp/post.c b/board/bf537-stamp/post.c index 4e844ba43..c546ab6cb 100644 --- a/board/bf537-stamp/post.c +++ b/board/bf537-stamp/post.c @@ -13,8 +13,6 @@  #include <command.h>  #include <asm/blackfin.h> -#define POST_WORD_ADDR 0xFF903FFC -  /* Using sw10-PF5 as the hotkey */  int post_hotkeys_pressed(void)  { @@ -47,18 +45,6 @@ int post_hotkeys_pressed(void)  	}  } -void post_word_store(ulong a) -{ -	volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR; -	*save_addr = a; -} - -ulong post_word_load(void) -{ -	volatile ulong *save_addr = (volatile ulong *)POST_WORD_ADDR; -	return *save_addr; -} -  int uart_post_test(int flags)  {  	return 0; diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c index 4039145e4..5ba6c09d1 100644 --- a/board/bmw/bmw.c +++ b/board/bmw/bmw.c @@ -22,7 +22,6 @@   */  #include <common.h> -#include <common.h>  #include <watchdog.h>  #include <command.h>  #include <malloc.h> diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c index 5ebcd66c6..b25887bca 100644 --- a/board/cm5200/cm5200.c +++ b/board/cm5200/cm5200.c @@ -323,22 +323,6 @@ int board_early_init_r(void)  } -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) -void post_word_store(ulong a) -{ -	vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); -	*save_addr = a; -} - - -ulong post_word_load(void) -{ -	vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); -	return *save_addr; -} -#endif /* CONFIG_POST || CONFIG_LOGBUFFER */ - -  #ifdef CONFIG_MISC_INIT_R  int misc_init_r(void)  { diff --git a/board/ip04/config.mk b/board/ip04/config.mk index bc1425748..576682911 100644 --- a/board/ip04/config.mk +++ b/board/ip04/config.mk @@ -26,8 +26,8 @@  # This is not actually used for Blackfin boards so do not change it  #TEXT_BASE = do-not-use-me -CFLAGS_lib_generic += -O2 -CFLAGS_lzma += -O2 +CFLAGS_lib += -O2 +CFLAGS_lib/lzma += -O2  # Set some default LDR flags based on boot mode.  LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 diff --git a/board/ti/beagle/beagle.h b/board/ti/beagle/beagle.h index d86033772..ec0da6d74 100644 --- a/board/ti/beagle/beagle.h +++ b/board/ti/beagle/beagle.h @@ -386,6 +386,10 @@ const omap3_sysinfo sysinfo = {  	MUX_VAL(CP(UART2_TX),		(IDIS | PTD | DIS | M0)) /*UART2_TX*/  #define MUX_BEAGLE_XM() \ +	MUX_VAL(CP(GPMC_NCS5),		(IDIS | PTD | EN  | M4)) /*GPIO_56*/\ +	MUX_VAL(CP(GPMC_WAIT0),		(IDIS | PTU | EN  | M4)) /*GPIO_63*/\ +	MUX_VAL(CP(MMC1_DAT7),		(IDIS | PTU | EN  | M4)) /*GPIO_129*/\ +	MUX_VAL(CP(HDQ_SIO),		(IDIS | PTU | EN  | M4)) /*GPIO_170*/\  	MUX_VAL(CP(MCBSP3_DX),		(IEN  | PTD | DIS | M4)) /*GPIO_140*/\  	MUX_VAL(CP(MCBSP3_DR),		(IEN  | PTD | DIS | M4)) /*GPIO_142*/\  	MUX_VAL(CP(MCBSP3_CLKX),	(IEN  | PTD | DIS | M4)) /*GPIO_141*/\ diff --git a/board/ti/panda/panda.h b/board/ti/panda/panda.h index eb1f021da..e3d090e56 100644 --- a/board/ti/panda/panda.h +++ b/board/ti/panda/panda.h @@ -53,7 +53,7 @@ const struct pad_conf_entry core_padconf_array[] = {  	{GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row7 */  	{GPMC_A20, (IEN | M3)},						/* gpio_44 */  	{GPMC_A21, (M3)},						/* gpio_45 */ -	{GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col6 */ +	{GPMC_A22, (M3)},						/* gpio_46 */  	{GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col7 */  	{GPMC_A24, (PTD | M3)},						/* gpio_48 */  	{GPMC_A25, (PTD | M3)},						/* gpio_49 */ @@ -69,9 +69,9 @@ const struct pad_conf_entry core_padconf_array[] = {  	{GPMC_NBE0_CLE, (M3)},						/* gpio_59 */  	{GPMC_NBE1, (PTD | M3)},					/* gpio_60 */  	{GPMC_WAIT0, (PTU | IEN | M3)},					/* gpio_61 */ -	{GPMC_WAIT1, (IEN | M3)},					/* gpio_62 */ +	{GPMC_WAIT1,  (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)},	/* gpio_62 */  	{C2C_DATA11, (PTD | M3)},					/* gpio_100 */ -	{C2C_DATA12, (M1)},						/* dsi1_te0 */ +	{C2C_DATA12, (PTU | IEN | M3)},					/* gpio_101 */  	{C2C_DATA13, (PTD | M3)},					/* gpio_102 */  	{C2C_DATA14, (M1)},						/* dsi2_te0 */  	{C2C_DATA15, (PTD | M3)},					/* gpio_104 */ @@ -189,12 +189,12 @@ const struct pad_conf_entry core_padconf_array[] = {  	{USBB2_ULPITLL_DAT7, (IEN | M5)},				/* dispc2_data11 */  	{USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_169 */  	{USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)},		/* gpio_170 */ -	{UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col0 */ +	{UNIPRO_TX0, (PTD | IEN | M3)},					/* gpio_171 */  	{UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col1 */  	{UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col2 */  	{UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)},			/* kpd_col3 */ -	{UNIPRO_TX2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* gpio_0 */ -	{UNIPRO_TY2, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)},	/* gpio_1 */ +	{UNIPRO_TX2, (PTU | IEN | M3)},					/* gpio_0 */ +	{UNIPRO_TY2, (PTU | IEN | M3)},					/* gpio_1 */  	{UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row0 */  	{UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row1 */  	{UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)},	/* kpd_row2 */ @@ -205,7 +205,7 @@ const struct pad_conf_entry core_padconf_array[] = {  	{USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dp */  	{USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)},		/* usba0_otg_dm */  	{FREF_CLK1_OUT, (M0)},						/* fref_clk1_out */ -	{FREF_CLK2_OUT, (M0)},						/* fref_clk2_out */ +	{FREF_CLK2_OUT, (PTU | IEN | M3)},				/* gpio_182 */  	{SYS_NIRQ1, (PTU | IEN | M0)},					/* sys_nirq1 */  	{SYS_NIRQ2, (PTU | IEN | M0)},					/* sys_nirq2 */  	{SYS_BOOT0, (PTU | IEN | M3)},					/* gpio_184 */ @@ -230,7 +230,7 @@ const struct pad_conf_entry core_padconf_array[] = {  	{DPM_EMU13, (IEN | M5)},					/* dispc2_data6 */  	{DPM_EMU14, (IEN | M5)},					/* dispc2_data5 */  	{DPM_EMU15, (IEN | M5)},					/* dispc2_data4 */ -	{DPM_EMU16, (IEN | M5)},					/* dispc2_data3 */ +	{DPM_EMU16, (M3)},						/* gpio_27 */  	{DPM_EMU17, (IEN | M5)},					/* dispc2_data2 */  	{DPM_EMU18, (IEN | M5)},					/* dispc2_data1 */  	{DPM_EMU19, (IEN | M5)},					/* dispc2_data0 */ @@ -248,7 +248,7 @@ const struct pad_conf_entry wkup_padconf_array[] = {  	{PAD0_FREF_SLICER_IN, (M0)},					/* fref_slicer_in */  	{PAD1_FREF_CLK_IOREQ, (M0)},					/* fref_clk_ioreq */  	{PAD0_FREF_CLK0_OUT, (M2)},					/* sys_drm_msecure */ -	{PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)},				/* # */ +	{PAD1_FREF_CLK3_REQ, (M3)},					/* gpio_wk30 */  	{PAD0_FREF_CLK3_OUT, (M0)},					/* fref_clk3_out */  	{PAD1_FREF_CLK4_REQ, (PTU | OFF_EN | OFF_OUT_PTU | M3)},	/* led status_1 */  	{PAD0_FREF_CLK4_OUT, (PTU | OFF_EN | OFF_OUT_PTU | M3)},	/* led status_2 */ diff --git a/board/tqc/tqm5200/tqm5200.c b/board/tqc/tqm5200/tqm5200.c index d90bae8cc..263a2af9b 100644 --- a/board/tqc/tqm5200/tqm5200.c +++ b/board/tqc/tqm5200/tqm5200.c @@ -375,25 +375,6 @@ int post_hotkeys_pressed(void)  }  #endif -#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) - -void post_word_store (ulong a) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); - -	*save_addr = a; -} - -ulong post_word_load (void) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE); - -	return *save_addr; -} -#endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/ -  #ifdef CONFIG_BOARD_EARLY_INIT_R  int board_early_init_r (void)  { diff --git a/board/xes/xpedite1000/xpedite1000.c b/board/xes/xpedite1000/xpedite1000.c index b4cbb2fce..a3534d2d7 100644 --- a/board/xes/xpedite1000/xpedite1000.c +++ b/board/xes/xpedite1000/xpedite1000.c @@ -196,20 +196,4 @@ int post_hotkeys_pressed(void)  {  	return ctrlc();  } - -void post_word_store(ulong a) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(CONFIG_SYS_POST_WORD_ADDR); - -	*save_addr = a; -} - -ulong post_word_load(void) -{ -	volatile ulong *save_addr = -		(volatile ulong *)(CONFIG_SYS_POST_WORD_ADDR); - -	return *save_addr; -}  #endif diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c index 4e7bcdf82..4323f76b3 100644 --- a/common/cmd_mmc.c +++ b/common/cmd_mmc.c @@ -178,8 +178,7 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])  	case 0:  	case 1:  	case 4: -		printf("Usage:\n%s\n", cmdtp->usage); -		return 1; +		return cmd_usage(cmdtp);  	case 2:  		if (!strcmp(argv[1], "list")) { @@ -234,10 +233,8 @@ int do_mmcops(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])  			printf("%d blocks written: %s\n",  				n, (n == cnt) ? "OK" : "ERROR");  			return (n == cnt) ? 0 : 1; -		} else { -			printf("Usage:\n%s\n", cmdtp->usage); -			rc = 1; -		} +		} else +			rc = cmd_usage(cmdtp);  		return rc;  	} diff --git a/common/fdt_support.c b/common/fdt_support.c index aef4fe23e..6f32e3f68 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -591,11 +591,30 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) {  #ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE  /* + * Provide a weak default function to return the flash bank size. + * There might be multiple non-identical flash chips connected to one + * chip-select, so we need to pass an index as well. + */ +u32 __flash_get_bank_size(int cs, int idx) +{ +	extern flash_info_t flash_info[]; + +	/* +	 * As default, a simple 1:1 mapping is provided. Boards with +	 * a different mapping need to supply a board specific mapping +	 * routine. +	 */ +	return flash_info[cs].size; +} +u32 flash_get_bank_size(int cs, int idx) +	__attribute__((weak, alias("__flash_get_bank_size"))); + +/*   * This function can be used to update the size in the "reg" property - * of the NOR FLASH device nodes. This is necessary for boards with + * of all NOR FLASH device nodes. This is necessary for boards with   * non-fixed NOR FLASH sizes.   */ -int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size) +int fdt_fixup_nor_flash_size(void *blob)  {  	char compat[][16] = { "cfi-flash", "jedec-flash" };  	int off; @@ -607,19 +626,31 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size)  	for (i = 0; i < 2; i++) {  		off = fdt_node_offset_by_compatible(blob, -1, compat[i]);  		while (off != -FDT_ERR_NOTFOUND) { +			int idx; +  			/* -			 * Found one compatible node, now check if this one -			 * has the correct CS +			 * Found one compatible node, so fixup the size +			 * int its reg properties  			 */  			prop = fdt_get_property_w(blob, off, "reg", &len);  			if (prop) { +				int tuple_size = 3 * sizeof(reg); + +				/* +				 * There might be multiple reg-tuples, +				 * so loop through them all +				 */ +				len /= tuple_size;  				reg = (u32 *)&prop->data[0]; -				if (reg[0] == cs) { -					reg[2] = size; +				for (idx = 0; idx < len; idx++) { +					/* +					 * Update size in reg property +					 */ +					reg[2] = flash_get_bank_size(reg[0], +								     idx);  					fdt_setprop(blob, off, "reg", reg, -						    3 * sizeof(u32)); - -					return 0; +						    tuple_size); +					reg += tuple_size;  				}  			} @@ -629,7 +660,7 @@ int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size)  		}  	} -	return -1; +	return 0;  }  #endif diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index 354e80b52..3ea0e6c8d 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c @@ -1045,6 +1045,7 @@ out_version:  out_class:  	class_destroy(ubi_class);  out: +	mtd_devs = 0;  	ubi_err("UBI error: cannot initialize UBI, error %d", err);  	return err;  } diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c index e0ad0298d..556b97a64 100644 --- a/drivers/spi/bfin_spi.c +++ b/drivers/spi/bfin_spi.c @@ -35,8 +35,6 @@ MAKE_SPI_FUNC(SPI_BAUD, 0x14)  #define to_bfin_spi_slave(s) container_of(s, struct bfin_spi_slave, slave) -#define MAX_CTRL_CS 7 -  #define gpio_cs(cs) ((cs) - MAX_CTRL_CS)  #ifdef CONFIG_BFIN_SPI_GPIO_CS  # define is_gpio_cs(cs) ((cs) > MAX_CTRL_CS) diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index 268bacf23..dd849c2dc 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -230,8 +230,8 @@ CONFIG_VIDEO_HW_CURSOR:	     - Uses the hardware cursor capability of the  #error	only one of CONFIG_CONSOLE_CURSOR,CONFIG_VIDEO_SW_CURSOR,CONFIG_VIDEO_HW_CURSOR can be defined  #endif  void	console_cursor (int state); -#define CURSOR_ON  console_cursor(1); -#define CURSOR_OFF console_cursor(0); +#define CURSOR_ON  console_cursor(1) +#define CURSOR_OFF console_cursor(0)  #define CURSOR_SET  #ifndef CONFIG_I8042_KBD  #warning Cursor drawing on/off needs timer function s.a. drivers/input/i8042.c @@ -248,8 +248,8 @@ void	console_cursor (int state);  #endif  #define CURSOR_ON  #define CURSOR_OFF video_putchar(console_col * VIDEO_FONT_WIDTH,\ -				 console_row * VIDEO_FONT_HEIGHT, ' '); -#define CURSOR_SET video_set_cursor(); +				 console_row * VIDEO_FONT_HEIGHT, ' ') +#define CURSOR_SET video_set_cursor()  #endif /* CONFIG_VIDEO_SW_CURSOR */ @@ -260,7 +260,7 @@ void	console_cursor (int state);  #define CURSOR_ON  #define CURSOR_OFF  #define CURSOR_SET video_set_hw_cursor(console_col * VIDEO_FONT_WIDTH, \ -		  (console_row * VIDEO_FONT_HEIGHT) + video_logo_height); +		  (console_row * VIDEO_FONT_HEIGHT) + video_logo_height)  #endif	/* CONFIG_VIDEO_HW_CURSOR */  #ifdef	CONFIG_VIDEO_LOGO @@ -651,7 +651,8 @@ static void console_scrollup (void)  static void console_back (void)  { -	CURSOR_OFF console_col--; +	CURSOR_OFF; +	console_col--;  	if (console_col < 0) {  		console_col = CONSOLE_COLS - 1; @@ -674,7 +675,7 @@ static void console_newline (void)  	   is >= CONSOLE_COLS  	 */  	if (console_col < CONSOLE_COLS) -		CURSOR_OFF +		CURSOR_OFF;  	console_row++;  	console_col = 0; @@ -690,7 +691,8 @@ static void console_newline (void)  static void console_cr (void)  { -	CURSOR_OFF console_col = 0; +	CURSOR_OFF; +	console_col = 0;  }  /*****************************************************************************/ @@ -711,7 +713,8 @@ void video_putc (const char c)  		break;  	case 9:		/* tab 8 */ -		CURSOR_OFF console_col |= 0x0008; +		CURSOR_OFF; +		console_col |= 0x0008;  		console_col &= ~0x0007;  		if (console_col >= CONSOLE_COLS) @@ -734,7 +737,8 @@ void video_putc (const char c)  			nl = 0;  		}  	} -CURSOR_SET} +	CURSOR_SET; +}  /*****************************************************************************/ diff --git a/include/common.h b/include/common.h index 0a64c71b4..0686a173d 100644 --- a/include/common.h +++ b/include/common.h @@ -584,8 +584,6 @@ uint	dpram_base(void);  uint	dpram_base_align(uint align);  uint	dpram_alloc(uint size);  uint	dpram_alloc_align(uint size,uint align); -void	post_word_store (ulong); -ulong	post_word_load (void);  void	bootcount_store (ulong);  ulong	bootcount_load (void);  #define BOOTCOUNT_MAGIC		0xB001C041 @@ -730,6 +728,9 @@ int cpu_release(int nr, int argc, char * const argv[]);  #ifdef CONFIG_POST  #define CONFIG_HAS_POST +#ifndef CONFIG_POST_ALT_LIST +#define CONFIG_POST_STD_LIST +#endif  #endif  #ifdef CONFIG_INIT_CRITICAL diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index 550c462b8..764f71be3 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -109,6 +109,7 @@  #define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/ +#define CONFIG_PPC4xx_EMAC  #undef CONFIG_EXT_PHY  #define CONFIG_NET_MULTI	1 @@ -402,6 +403,7 @@   * I2C EEPROM (CAT24WC16) for environment   */  #define CONFIG_HARD_I2C			/* I2c with hardware support */ +#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/  #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */  #define CONFIG_SYS_I2C_SLAVE		0x7F @@ -414,16 +416,6 @@  					/* last 4 bits of the address	*/  #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10   /* and takes up to 10 msec */ -/*----------------------------------------------------------------------- - * Cache Configuration - */ -#define CONFIG_SYS_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's	*/ -					/* have only 8kB, 16kB is save here	*/ -#define CONFIG_SYS_CACHELINE_SIZE	32	/* ...			*/ -#if defined(CONFIG_CMD_KGDB) -#define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/ -#endif -  /*   * Init Memory Controller:   * @@ -574,17 +566,6 @@  #define		DIMM_READ_ADDR 0xAB  #define		DIMM_WRITE_ADDR 0xAA -#define CPC0_PLLMR0  (CNTRL_DCR_BASE+0x0)  /* PLL mode 0 register		*/ -#define CPC0_BOOT    (CNTRL_DCR_BASE+0x1)  /* Chip Clock Status register	*/ -#define CPC0_CR1     (CNTRL_DCR_BASE+0x2)  /* Chip Control 1 register		*/ -#define CPC0_EPRCSR  (CNTRL_DCR_BASE+0x3)  /* EMAC PHY Rcv Clk Src register	*/ -#define CPC0_PLLMR1  (CNTRL_DCR_BASE+0x4)  /* PLL mode 1 register		*/ -#define CPC0_UCR     (CNTRL_DCR_BASE+0x5)  /* UART Control register		*/ -#define CPC0_SRR     (CNTRL_DCR_BASE+0x6)  /* Soft Reset register		*/ -#define CPC0_JTAGID  (CNTRL_DCR_BASE+0x7)  /* JTAG ID register			*/ -#define CPC0_SPARE   (CNTRL_DCR_BASE+0x8)  /* Spare DCR				*/ -#define CPC0_PCI     (CNTRL_DCR_BASE+0x9)  /* PCI Control register		*/ -  /* Defines for CPC0_PLLMR1 Register fields */  #define PLL_ACTIVE		0x80000000  #define CPC0_PLLMR1_SSCS	0x80000000 diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h index a44d8fabb..94cc31756 100644 --- a/include/configs/KAREF.h +++ b/include/configs/KAREF.h @@ -81,8 +81,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE     128	     /* num bytes initial data	*/  #define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET    CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_SYS_MONITOR_LEN	      (256 * 1024)   /* Rsrv 256kB for Mon	*/  #define CONFIG_SYS_MALLOC_LEN	      (128 * 1024)   /* Rsrv 128kB for malloc	*/ diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h index d805a245d..2e63306d9 100644 --- a/include/configs/METROBOX.h +++ b/include/configs/METROBOX.h @@ -143,8 +143,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE     128	     /* num bytes initial data	*/  #define CONFIG_SYS_GBL_DATA_OFFSET   (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET    CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET    (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_SYS_MONITOR_LEN	      (256 * 1024)   /* Rsrv 256kB for Mon	*/  #define CONFIG_SYS_MALLOC_LEN	      (128 * 1024)   /* Rsrv 128kB for malloc	*/ diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index e833e6d19..bfff7504f 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -311,10 +311,6 @@  /* reserve some memory for POST and BOOT limit info */  #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 32) -#ifdef  CONFIG_POST		/* reserve one word for POST Info */ -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 4) -#endif -  #ifdef CONFIG_BOOTCOUNT_LIMIT /* reserve 2 word for bootcount limit */  #define CONFIG_SYS_BOOTCOUNT_ADDR (CONFIG_SYS_GBL_DATA_OFFSET - 12)  #endif diff --git a/include/configs/PMC440.h b/include/configs/PMC440.h index fd2e9a9f9..bf2247dbd 100644 --- a/include/configs/PMC440.h +++ b/include/configs/PMC440.h @@ -87,7 +87,7 @@  #define CONFIG_SYS_INIT_RAM_END	(4 << 10)  #define CONFIG_SYS_GBL_DATA_SIZE	256	/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port @@ -374,7 +374,6 @@  				 CONFIG_SYS_POST_ETHER  |	\  				 CONFIG_SYS_POST_SPR) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_LOGBUFFER  #define CONFIG_SYS_POST_CACHE_ADDR	0x7fff0000	/* free virtual address     */ diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h index 6da18ebca..7a6602ce3 100644 --- a/include/configs/TB5200.h +++ b/include/configs/TB5200.h @@ -126,7 +126,7 @@  #endif  #ifdef CONFIG_POST -#define CONFIG__CMD_DIAG +#define CONFIG_CMD_DIAG  #endif diff --git a/include/configs/XPEDITE1000.h b/include/configs/XPEDITE1000.h index f76ede3ce..8b47862d2 100644 --- a/include/configs/XPEDITE1000.h +++ b/include/configs/XPEDITE1000.h @@ -102,8 +102,7 @@ extern void out32(unsigned int, unsigned long);  #define CONFIG_SYS_INIT_RAM_END		0x2000	/* End of used area in RAM */  #define CONFIG_SYS_GBL_DATA_SIZE	128	/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_SYS_MONITOR_LEN	(512 * 1024)	/* Reserve 512 KB for Mon */  #define CONFIG_SYS_MALLOC_LEN	(1024 * 1024)	/* Reserved for malloc */ diff --git a/include/configs/acadia.h b/include/configs/acadia.h index b6f909c11..39f85ae3b 100644 --- a/include/configs/acadia.h +++ b/include/configs/acadia.h @@ -121,7 +121,13 @@  #define CONFIG_SYS_FLASH_EMPTY_INFO		/* print 'E' for empty sector on flinfo */  #else -#define	CONFIG_SYS_NO_FLASH		1	/* No NOR on Acadia when NAND-booting	*/ +/* + * No NOR-flash on Acadia when NAND-booting. We need to undef the + * NOR device-tree fixup code as well, since flash_info is not defined + * in this case. + */ +#define	CONFIG_SYS_NO_FLASH		1 +#undef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE  #endif  #ifdef CONFIG_ENV_IS_IN_FLASH diff --git a/include/configs/alpr.h b/include/configs/alpr.h index 75106b427..70382914b 100644 --- a/include/configs/alpr.h +++ b/include/configs/alpr.h @@ -65,8 +65,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE   128		    /* num bytes initial data	*/  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_SYS_MONITOR_LEN	    (256 * 1024)    /* Reserve 256 kB for Mon	*/  #define CONFIG_SYS_MALLOC_LEN	    (128 * 1024)    /* Reserve 128 kB for malloc*/ diff --git a/include/configs/barco.h b/include/configs/barco.h index e00f84aab..b1af70117 100644 --- a/include/configs/barco.h +++ b/include/configs/barco.h @@ -136,6 +136,8 @@  #define CONFIG_LOGBUFFER  #ifdef	CONFIG_LOGBUFFER  #define CONFIG_SYS_STDOUT_ADDR		0x1FFC000 +#define CONFIG_SYS_POST_WORD_ADDR	\ +		(CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_MAX_RAM_SIZE - 4)  #else  #define CONFIG_SYS_STDOUT_ADDR		0x2B9000  #endif diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h index 96704d77b..fc9784e08 100644 --- a/include/configs/bf537-stamp.h +++ b/include/configs/bf537-stamp.h @@ -265,6 +265,7 @@  #define FLASH_START_POST_BLOCK	11	/* Should > = 11 */  #define FLASH_END_POST_BLOCK	71	/* Should < = 71 */  #endif +#define CONFIG_SYS_POST_WORD_ADDR	0xFF903FFC  /* These are for board tests */  #if 0 diff --git a/include/configs/bfin_adi_common.h b/include/configs/bfin_adi_common.h index 44762689c..91dcaccb4 100644 --- a/include/configs/bfin_adi_common.h +++ b/include/configs/bfin_adi_common.h @@ -50,6 +50,7 @@  # endif  # ifdef CONFIG_POST  #  define CONFIG_CMD_DIAG +#  define CONFIG_POST_ALT_LIST  # endif  # ifdef CONFIG_RTC_BFIN  #  define CONFIG_CMD_DATE diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h index 369b36894..26992e753 100644 --- a/include/configs/hcu4.h +++ b/include/configs/hcu4.h @@ -72,7 +72,7 @@  #define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE  #define CONFIG_SYS_GBL_DATA_SIZE	256		/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port @@ -192,7 +192,6 @@  				 CONFIG_SYS_POST_SPR)  #define CONFIG_SYS_POST_UART_TABLE	{UART0_BASE} -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #undef  CONFIG_LOGBUFFER  #define CONFIG_SYS_POST_CACHE_ADDR	0x00800000 /* free virtual address	*/  #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h index 10b1e0fee..f2ab50c75 100644 --- a/include/configs/hcu5.h +++ b/include/configs/hcu5.h @@ -83,7 +83,7 @@  #define CONFIG_SYS_INIT_RAM_END	(4 << 10)  #define CONFIG_SYS_GBL_DATA_SIZE	256		/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port @@ -207,9 +207,8 @@  				 CONFIG_SYS_POST_FPU	   | \  				 CONFIG_SYS_POST_ETHER	   | \  				 CONFIG_SYS_POST_SPR) -#define CONFIG_SYS_POST_UART_TABLE	{UART0_BASE} -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) +#define CONFIG_SYS_POST_UART_TABLE	{UART0_BASE}  #define CONFIG_SYS_POST_CACHE_ADDR	0x7fff0000 /* free virtual address	*/  #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h index f9cdcbc3c..d40b7a9f5 100644 --- a/include/configs/hmi1001.h +++ b/include/configs/hmi1001.h @@ -190,14 +190,16 @@  /* Use ON-Chip SRAM until RAM will be available */  #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM -#ifdef CONFIG_POST +  /* preserve space for the post_word at end of on-chip SRAM */ +#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) + +#ifdef CONFIG_POST  #define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE  #else  #define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE  #endif -  #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)  #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/icon.h b/include/configs/icon.h index 779af25fa..ad0ca5d37 100644 --- a/include/configs/icon.h +++ b/include/configs/icon.h @@ -99,8 +99,7 @@  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \  					 CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*   * Serial Port diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index c5b1565e3..69365e60b 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -200,14 +200,16 @@  /* Use ON-Chip SRAM until RAM will be available */  #define CONFIG_SYS_INIT_RAM_ADDR	MPC5XXX_SRAM -#ifdef CONFIG_POST +  /* preserve space for the post_word at end of on-chip SRAM */ +#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4) + +#ifdef CONFIG_POST  #define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_POST_SIZE  #else  #define CONFIG_SYS_INIT_RAM_END	MPC5XXX_SRAM_SIZE  #endif -  #define CONFIG_SYS_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)  #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET diff --git a/include/configs/katmai.h b/include/configs/katmai.h index 884dd74a1..e4ccd7daf 100644 --- a/include/configs/katmai.h +++ b/include/configs/katmai.h @@ -98,8 +98,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE	128		/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port diff --git a/include/configs/kilauea.h b/include/configs/kilauea.h index 937d7c5e2..37eaf8f6b 100644 --- a/include/configs/kilauea.h +++ b/include/configs/kilauea.h @@ -102,11 +102,10 @@  #if defined(CONFIG_SYS_INIT_DCACHE_CS)  # define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET -# define CONFIG_SYS_POST_ALT_WORD_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) +# define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)  #else  # define CONFIG_SYS_INIT_EXTRA_SIZE	16  # define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_INIT_EXTRA_SIZE) -# define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 4)  # define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_INIT_RAM_ADDR  #endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */ diff --git a/include/configs/korat.h b/include/configs/korat.h index 0107a7b94..55ef4f033 100644 --- a/include/configs/korat.h +++ b/include/configs/korat.h @@ -85,7 +85,7 @@  #define CONFIG_SYS_INIT_RAM_END	(4 << 10)  #define CONFIG_SYS_GBL_DATA_SIZE	256	/* num bytes initial data	*/  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*   * Serial Port @@ -306,7 +306,6 @@  				 CONFIG_SYS_POST_SPR	| \  				 CONFIG_SYS_POST_UART) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_LOGBUFFER  #define CONFIG_SYS_POST_CACHE_ADDR	0xC8000000	/* free virtual address     */ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 9df6fc77f..72e02f87d 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -81,7 +81,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE	256		/* num bytes initial data*/  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)  #define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET -#define CONFIG_SYS_POST_ALT_WORD_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) +#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)  						/* unused GPT0 COMP reg	*/  #define CONFIG_SYS_MEM_TOP_HIDE	(4 << 10) /* don't use last 4kbytes	*/  					/* 440EPx errata CHIP 11	*/ diff --git a/include/configs/makalu.h b/include/configs/makalu.h index 83a2d4a65..905c71910 100644 --- a/include/configs/makalu.h +++ b/include/configs/makalu.h @@ -100,11 +100,10 @@  #if defined(CONFIG_SYS_INIT_DCACHE_CS)  # define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_GBL_DATA_OFFSET -# define CONFIG_SYS_POST_ALT_WORD_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6) +# define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_PERIPHERAL_BASE + GPT0_COMP6)  #else  # define CONFIG_SYS_INIT_EXTRA_SIZE	16  # define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - CONFIG_SYS_INIT_EXTRA_SIZE) -# define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 4)  # define CONFIG_SYS_OCM_DATA_ADDR	CONFIG_SYS_INIT_RAM_ADDR  #endif /* defined(CONFIG_SYS_INIT_DCACHE_CS) */ diff --git a/include/configs/mcu25.h b/include/configs/mcu25.h index 604298675..3e04cfe73 100644 --- a/include/configs/mcu25.h +++ b/include/configs/mcu25.h @@ -72,7 +72,7 @@  #define CONFIG_SYS_INIT_RAM_END	CONFIG_SYS_OCM_DATA_SIZE  #define CONFIG_SYS_GBL_DATA_SIZE	256		/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port @@ -193,7 +193,6 @@  				 CONFIG_SYS_POST_SPR)  #define CONFIG_SYS_POST_UART_TABLE	{UART0_BASE} -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #undef  CONFIG_LOGBUFFER  #define CONFIG_SYS_POST_CACHE_ADDR	0x00800000 /* free virtual address	*/  #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */ diff --git a/include/configs/mpc5121-common.h b/include/configs/mpc5121-common.h index 96fab2093..afae1ab6d 100644 --- a/include/configs/mpc5121-common.h +++ b/include/configs/mpc5121-common.h @@ -30,8 +30,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE	0x100	/* num bytes of initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - \  					 CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */  #define CONFIG_SYS_MEMTEST_END		0x00400000 diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h index 4f59cc6bd..d11d218c0 100644 --- a/include/configs/ocotea.h +++ b/include/configs/ocotea.h @@ -74,8 +74,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE   128		    /* num bytes initial data	*/  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port diff --git a/include/configs/redwood.h b/include/configs/redwood.h index 913db9480..3c1e882b0 100644 --- a/include/configs/redwood.h +++ b/include/configs/redwood.h @@ -91,8 +91,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE	128		/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * DDR SDRAM diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 900d1dbdc..988d41ff4 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -97,7 +97,7 @@  #define CONFIG_SYS_INIT_RAM_END	(4 << 10)  #define CONFIG_SYS_GBL_DATA_SIZE	256	/* num bytes initial data	*/  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*   * Serial Port @@ -353,7 +353,6 @@  				 CONFIG_SYS_POST_SPR	   | \  				 CONFIG_SYS_POST_UART) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  #define CONFIG_LOGBUFFER  #define CONFIG_SYS_POST_CACHE_ADDR	0x7fff0000	/* free virtual address     */ diff --git a/include/configs/taishan.h b/include/configs/taishan.h index ce4a61225..faf9e20bd 100644 --- a/include/configs/taishan.h +++ b/include/configs/taishan.h @@ -70,8 +70,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE	128		/* num bytes initial data*/  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port diff --git a/include/configs/yucca.h b/include/configs/yucca.h index a54035518..4e64eec59 100644 --- a/include/configs/yucca.h +++ b/include/configs/yucca.h @@ -99,8 +99,7 @@  #define CONFIG_SYS_GBL_DATA_SIZE	128		/* num bytes initial data */  #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE) -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4) -#define CONFIG_SYS_INIT_SP_OFFSET	CONFIG_SYS_POST_WORD_ADDR +#define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 0x4)  /*-----------------------------------------------------------------------   * Serial Port diff --git a/include/configs/zeus.h b/include/configs/zeus.h index 6fbf38a32..aa250cc2d 100644 --- a/include/configs/zeus.h +++ b/include/configs/zeus.h @@ -259,9 +259,10 @@  #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_GBL_DATA_OFFSET - 16)  /* extra data in OCM */ -#define CONFIG_SYS_POST_WORD_ADDR	(CONFIG_SYS_GBL_DATA_OFFSET - 4) -#define CONFIG_SYS_POST_MAGIC		(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8) -#define CONFIG_SYS_POST_VAL		(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12) +#define CONFIG_SYS_POST_MAGIC		\ +		(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 8) +#define CONFIG_SYS_POST_VAL		\ +		(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 12)  /*-----------------------------------------------------------------------   * External Bus Controller (EBC) Setup diff --git a/include/fdt_support.h b/include/fdt_support.h index 871ef4524..fd94929ce 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -79,7 +79,7 @@ void ft_pci_setup(void *blob, bd_t *bd);  void set_working_fdt_addr(void *addr);  int fdt_resize(void *blob); -int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size); +int fdt_fixup_nor_flash_size(void *blob);  void fdt_fixup_mtdparts(void *fdt, void *node_info, int node_info_size);  void fdt_del_node_and_alias(void *blob, const char *alias); diff --git a/include/post.h b/include/post.h index 3da959d9a..625da5593 100644 --- a/include/post.h +++ b/include/post.h @@ -2,6 +2,10 @@   * (C) Copyright 2002   * Wolfgang Denk, DENX Software Engineering, wd@denx.de.   * + * (C) Copyright 2010 + * Michael Zaidman, Kodak, michael.zaidman@kodak.com + * post_word_{load|store} cleanup. + *   * See file CREDITS for list of people who contributed to this   * project.   * @@ -25,7 +29,58 @@  #ifndef	__ASSEMBLY__  #include <common.h> +#include <asm/io.h> + +#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) + +#ifdef CONFIG_SYS_POST_WORD_ADDR +#define _POST_WORD_ADDR	CONFIG_SYS_POST_WORD_ADDR +#else + +#ifdef CONFIG_MPC5xxx +#define _POST_WORD_ADDR	(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE) + +#elif defined(CONFIG_MPC512X) +#define _POST_WORD_ADDR \ +	(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET - 0x4) + +#elif defined(CONFIG_8xx) +#define _POST_WORD_ADDR \ +	(((immap_t *)CONFIG_SYS_IMMR)->im_cpm.cp_dpmem + CPM_POST_WORD_ADDR) + +#elif defined(CONFIG_MPC8260) +#include <asm/cpm_8260.h> +#define _POST_WORD_ADDR	(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) + +#elif defined(CONFIG_MPC8360) +#include <asm/immap_qe.h> +#define _POST_WORD_ADDR	(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) + +#elif defined (CONFIG_MPC85xx) +#include <asm/cpm_85xx.h> +#define _POST_WORD_ADDR	(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR) + +#elif defined (CONFIG_4xx) +#define _POST_WORD_ADDR \ +	(CONFIG_SYS_OCM_DATA_ADDR + CONFIG_SYS_GBL_DATA_OFFSET - 0x4) +#endif + +#ifndef _POST_WORD_ADDR +#error "_POST_WORD_ADDR currently not implemented for this platform!"  #endif +#endif /* CONFIG_SYS_POST_WORD_ADDR */ + +static inline ulong post_word_load (void) +{ +	return in_le32((volatile void *)(_POST_WORD_ADDR)); +} + +static inline void post_word_store (ulong value) +{ +	out_le32((volatile void *)(_POST_WORD_ADDR), value); +} +#endif /* defined (CONFIG_POST) || defined(CONFIG_LOGBUFFER) */ +#endif /* __ASSEMBLY__ */  #ifdef CONFIG_POST @@ -40,7 +95,7 @@  #define POST_RAM		0x0200	/* test runs in RAM */  #define POST_MANUAL		0x0400	/* test runs on diag command */  #define POST_REBOOT		0x0800	/* test may cause rebooting */ -#define POST_PREREL             0x1000  /* test runs before relocation */ +#define POST_PREREL		0x1000  /* test runs before relocation */  #define POST_CRITICAL		0x2000	/* Use failbootcmd if test failed */  #define POST_STOP		0x4000	/* Interrupt POST sequence on fail */ diff --git a/post/Makefile b/post/Makefile index 769e9c639..169d12632 100644 --- a/post/Makefile +++ b/post/Makefile @@ -26,7 +26,8 @@ include $(OBJTREE)/include/autoconf.mk  LIB				= libpost.a  GPLIB-$(CONFIG_HAS_POST)	+= libgenpost.a -COBJS-$(CONFIG_HAS_POST)	+= post.o tests.o +COBJS-$(CONFIG_HAS_POST)	+= post.o +COBJS-$(CONFIG_POST_STD_LIST)	+= tests.o  SPLIB-$(CONFIG_HAS_POST) = drivers/libpostdrivers.a  SPLIB-$(CONFIG_HAS_POST) += $(shell if [ -d lib_$(ARCH) ]; then echo \ diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c index be217fcf8..6b61cc191 100644 --- a/post/cpu/ppc4xx/uart.c +++ b/post/cpu/ppc4xx/uart.c @@ -4,6 +4,8 @@   *   * Author: Igor Lisitsin <igor@emcraft.com>   * + * Copyright 2010, Stefan Roese, DENX Software Engineering, sr@denx.de + *   * See file CREDITS for list of people who contributed to this   * project.   * @@ -24,6 +26,9 @@   */  #include <common.h> +#include <ppc4xx.h> +#include <ns16550.h> +#include <asm/io.h>  /*   * UART test @@ -119,32 +124,23 @@  #define UDIV_MAX        32  #endif -#define UART_RBR    0x00 -#define UART_THR    0x00 -#define UART_IER    0x01 -#define UART_IIR    0x02 -#define UART_FCR    0x02 -#define UART_LCR    0x03 -#define UART_MCR    0x04 -#define UART_LSR    0x05 -#define UART_MSR    0x06 -#define UART_SCR    0x07 -#define UART_DLL    0x00 -#define UART_DLM    0x01 +DECLARE_GLOBAL_DATA_PTR; -/* - * Line Status Register. - */ -#define asyncLSRDataReady1            0x01 -#define asyncLSROverrunError1         0x02 -#define asyncLSRParityError1          0x04 -#define asyncLSRFramingError1         0x08 -#define asyncLSRBreakInterrupt1       0x10 -#define asyncLSRTxHoldEmpty1          0x20 -#define asyncLSRTxShiftEmpty1         0x40 -#define asyncLSRRxFifoError1          0x80 +static void uart_post_init_common(struct NS16550 *com_port, unsigned short bdiv) +{ +	volatile char val; -DECLARE_GLOBAL_DATA_PTR; +	out_8(&com_port->lcr, 0x80);	/* set DLAB bit */ +	out_8(&com_port->dll, bdiv);	/* set baudrate divisor */ +	out_8(&com_port->dlm, bdiv >> 8); /* set baudrate divisor */ +	out_8(&com_port->lcr, 0x03);	/* clear DLAB; set 8 bits, no parity */ +	out_8(&com_port->fcr, 0x00);	/* disable FIFO */ +	out_8(&com_port->mcr, 0x10);	/* enable loopback mode */ +	val = in_8(&com_port->lsr);	/* clear line status */ +	val = in_8(&com_port->rbr);	/* read receive buffer */ +	out_8(&com_port->scr, 0x00);	/* set scratchpad */ +	out_8(&com_port->ier, 0x00);	/* set interrupt enable reg */ +}  #if defined(CONFIG_440) || defined(CONFIG_405EX)  #if !defined(CONFIG_SYS_EXT_SERIAL_CLOCK) @@ -190,19 +186,18 @@ static void serial_divs (int baudrate, unsigned long *pudiv,  }  #endif -static int uart_post_init (unsigned long dev_base) +static int uart_post_init (struct NS16550 *com_port)  {  	unsigned long reg = 0;  	unsigned long udiv;  	unsigned short bdiv; -	volatile char val;  #ifdef CONFIG_SYS_EXT_SERIAL_CLOCK  	unsigned long tmp;  #endif  	int i;  	for (i = 0; i < 3500; i++) { -		if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1) +		if (in_8(&com_port->lsr) & UART_LSR_THRE)  			break;  		udelay (100);  	} @@ -239,34 +234,24 @@ static int uart_post_init (unsigned long dev_base)  	MTREG(UART3_SDR, reg);  #endif -	out8(dev_base + UART_LCR, 0x80);	/* set DLAB bit */ -	out8(dev_base + UART_DLL, bdiv);	/* set baudrate divisor */ -	out8(dev_base + UART_DLM, bdiv >> 8);	/* set baudrate divisor */ -	out8(dev_base + UART_LCR, 0x03);	/* clear DLAB; set 8 bits, no parity */ -	out8(dev_base + UART_FCR, 0x00);	/* disable FIFO */ -	out8(dev_base + UART_MCR, 0x10);	/* enable loopback mode */ -	val = in8(dev_base + UART_LSR);		/* clear line status */ -	val = in8(dev_base + UART_RBR);		/* read receive buffer */ -	out8(dev_base + UART_SCR, 0x00);	/* set scratchpad */ -	out8(dev_base + UART_IER, 0x00);	/* set interrupt enable reg */ +	uart_post_init_common(com_port, bdiv);  	return 0;  }  #else /* CONFIG_440 */ -static int uart_post_init (unsigned long dev_base) +static int uart_post_init (struct NS16550 *com_port)  {  	unsigned long reg;  	unsigned long tmp;  	unsigned long clk;  	unsigned long udiv;  	unsigned short bdiv; -	volatile char val;  	int i;  	for (i = 0; i < 3500; i++) { -		if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1) +		if (in_8(&com_port->lsr) & UART_LSR_THRE)  			break;  		udelay (100);  	} @@ -309,59 +294,51 @@ static int uart_post_init (unsigned long dev_base)  	bdiv = (clk + tmp / 2) / tmp;  #endif /* CONFIG_405EZ */ -	out8(dev_base + UART_LCR, 0x80);	/* set DLAB bit */ -	out8(dev_base + UART_DLL, bdiv);	/* set baudrate divisor */ -	out8(dev_base + UART_DLM, bdiv >> 8);	/* set baudrate divisor */ -	out8(dev_base + UART_LCR, 0x03);	/* clear DLAB; set 8 bits, no parity */ -	out8(dev_base + UART_FCR, 0x00);	/* disable FIFO */ -	out8(dev_base + UART_MCR, 0x10);	/* enable loopback mode */ -	val = in8(dev_base + UART_LSR);	/* clear line status */ -	val = in8(dev_base + UART_RBR);	/* read receive buffer */ -	out8(dev_base + UART_SCR, 0x00);	/* set scratchpad */ -	out8(dev_base + UART_IER, 0x00);	/* set interrupt enable reg */ +	uart_post_init_common(com_port, bdiv); -	return (0); +	return 0;  }  #endif /* CONFIG_440 */ -static void uart_post_putc (unsigned long dev_base, char c) +static void uart_post_putc (struct NS16550 *com_port, char c)  {  	int i; -	out8 (dev_base + UART_THR, c);	/* put character out */ +	out_8(&com_port->thr, c);	/* put character out */  	/* Wait for transfer completion */  	for (i = 0; i < 3500; i++) { -		if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1) +		if (in_8(&com_port->lsr) & UART_LSR_THRE)  			break;  		udelay (100);  	}  } -static int uart_post_getc (unsigned long dev_base) +static int uart_post_getc (struct NS16550 *com_port)  {  	int i;  	/* Wait for character available */  	for (i = 0; i < 3500; i++) { -		if (in8 (dev_base + UART_LSR) & asyncLSRDataReady1) +		if (in_8(&com_port->lsr) & UART_LSR_DR)  			break;  		udelay (100);  	} -	return 0xff & in8 (dev_base + UART_RBR); + +	return 0xff & in_8(&com_port->rbr);  } -static int test_ctlr (unsigned long dev_base, int index) +static int test_ctlr (struct NS16550 *com_port, int index)  {  	int res = -1;  	char test_str[] = "*** UART Test String ***\r\n";  	int i; -	uart_post_init (dev_base); +	uart_post_init (com_port);  	for (i = 0; i < sizeof (test_str) - 1; i++) { -		uart_post_putc (dev_base, test_str[i]); -		if (uart_post_getc (dev_base) != test_str[i]) +		uart_post_putc (com_port, test_str[i]); +		if (uart_post_getc (com_port) != test_str[i])  			goto done;  	}  	res = 0; @@ -377,8 +354,8 @@ int uart_post_test (int flags)  	int i, res = 0;  	static unsigned long base[] = CONFIG_SYS_POST_UART_TABLE; -	for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) { -		if (test_ctlr (base[i], i)) +	for (i = 0; i < ARRAY_SIZE(base); i++) { +		if (test_ctlr((struct NS16550 *)base[i], i))  			res = -1;  	}  	serial_reinit_all (); diff --git a/tools/setlocalversion b/tools/setlocalversion index b3f5f2824..e11f54f55 100755 --- a/tools/setlocalversion +++ b/tools/setlocalversion @@ -13,7 +13,8 @@ if head=`git rev-parse --verify HEAD 2>/dev/null`; then  	# Do we have an untagged version?  	if git name-rev --tags HEAD | \  	   grep -E '^HEAD[[:space:]]+(.*~[0-9]*|undefined)$' > /dev/null; then -	        git describe | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}' +	        (git describe || git describe --tags || git describe --all --long) \ +				2>/dev/null | awk -F- '{printf("-%05d-%s", $(NF-1),$(NF))}'  	fi  	# Are there uncommitted changes? |