diff options
| -rw-r--r-- | MAINTAINERS | 1 | ||||
| -rw-r--r-- | board/compal/paz00/Makefile | 41 | ||||
| -rw-r--r-- | board/compal/paz00/paz00.c | 81 | ||||
| -rw-r--r-- | boards.cfg | 1 | ||||
| -rw-r--r-- | include/configs/paz00.h | 51 |
5 files changed, 175 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 8c4fe2df8..353f23d53 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -899,6 +899,7 @@ Tom Warren <twarren@nvidia.com> Stephen Warren <swarren@nvidia.com> ventana Tegra2 (ARM7 & A9 Dual Core) + paz00 Tegra2 (ARM7 & A9 Dual Core) Thomas Weber <weber@corscience.de> diff --git a/board/compal/paz00/Makefile b/board/compal/paz00/Makefile new file mode 100644 index 000000000..488e38101 --- /dev/null +++ b/board/compal/paz00/Makefile @@ -0,0 +1,41 @@ +# +# Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms and conditions of the GNU General Public License, +# version 2, as published by the Free Software Foundation. +# +# This program is distributed in the hope it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# + +include $(TOPDIR)/config.mk + +ifneq ($(OBJTREE),$(SRCTREE)) +$(shell mkdir -p $(obj)../../nvidia/common) +endif + +LIB = $(obj)lib$(BOARD).o + +COBJS := $(BOARD).o +COBJS += ../../nvidia/common/board.o + +SRCS := $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) + +$(LIB): $(obj).depend $(OBJS) + $(call cmd_link_o_target, $(OBJS)) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/compal/paz00/paz00.c b/board/compal/paz00/paz00.c new file mode 100644 index 000000000..3b4891743 --- /dev/null +++ b/board/compal/paz00/paz00.c @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/tegra2.h> +#include <asm/arch/pinmux.h> +#include <asm/arch/mmc.h> +#include <asm/gpio.h> +#ifdef CONFIG_TEGRA2_MMC +#include <mmc.h> +#endif + +/* + * Routine: gpio_config_uart + * Description: Does nothing on Paz00 - no conflict w/SPI. + */ +void gpio_config_uart(void) +{ +} + +#ifdef CONFIG_TEGRA2_MMC +/* + * Routine: pin_mux_mmc + * Description: setup the pin muxes/tristate values for the SDMMC(s) + */ +static void pin_mux_mmc(void) +{ + /* SDMMC4: config 3, x8 on 2nd set of pins */ + pinmux_set_func(PINGRP_ATB, PMUX_FUNC_SDIO4); + pinmux_set_func(PINGRP_GMA, PMUX_FUNC_SDIO4); + pinmux_set_func(PINGRP_GME, PMUX_FUNC_SDIO4); + + pinmux_tristate_disable(PINGRP_ATB); + pinmux_tristate_disable(PINGRP_GMA); + pinmux_tristate_disable(PINGRP_GME); + + /* SDMMC1: SDIO1_CLK, SDIO1_CMD, SDIO1_DAT[3:0] */ + pinmux_set_func(PINGRP_SDMMC1, PMUX_FUNC_SDIO1); + + pinmux_tristate_disable(PINGRP_SDMMC1); + + /* For power GPIO PV1 */ + pinmux_tristate_disable(PINGRP_UAC); + /* For CD GPIO PI5 */ + pinmux_tristate_disable(PINGRP_ATC); +} + +/* this is a weak define that we are overriding */ +int board_mmc_init(bd_t *bd) +{ + debug("board_mmc_init called\n"); + + /* Enable muxes, etc. for SDMMC controllers */ + pin_mux_mmc(); + + debug("board_mmc_init: init eMMC\n"); + /* init dev 0, eMMC chip, with 4-bit bus */ + /* The board has an 8-bit bus, but 8-bit doesn't work yet */ + tegra2_mmc_init(0, 4, -1, -1); + + debug("board_mmc_init: init SD slot\n"); + /* init dev 3, SD slot, with 4-bit bus */ + tegra2_mmc_init(3, 4, GPIO_PV1, GPIO_PI5); + + return 0; +} +#endif diff --git a/boards.cfg b/boards.cfg index 2f90dbf92..7e065bf96 100644 --- a/boards.cfg +++ b/boards.cfg @@ -250,6 +250,7 @@ colibri_pxa270 arm pxa - toradex jornada arm sa1100 plutux arm armv7 plutux avionic-design tegra2 medcom arm armv7 medcom avionic-design tegra2 +paz00 arm armv7 paz00 compal tegra2 atngw100 avr32 at32ap - atmel at32ap700x atstk1002 avr32 at32ap atstk1000 atmel at32ap700x atstk1003 avr32 at32ap atstk1000 atmel at32ap700x diff --git a/include/configs/paz00.h b/include/configs/paz00.h new file mode 100644 index 000000000..f53f20eb9 --- /dev/null +++ b/include/configs/paz00.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010,2011, NVIDIA CORPORATION. All rights reserved. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#include <asm/sizes.h> +#include "tegra2-common.h" + +/* High-level configuration options */ +#define TEGRA2_SYSMEM "mem=512M@0M" +#define V_PROMPT "Tegra2 (Paz00) MOD # " +#define CONFIG_TEGRA2_BOARD_STRING "Compal Paz00" + +/* Board-specific serial config */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_TEGRA2_ENABLE_UARTA +#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTA_BASE + +#define CONFIG_MACH_TYPE MACH_TYPE_PAZ00 +#define CONFIG_SYS_BOARD_ODMDATA 0x800c0085 /* lp1, 512MB */ + +#define CONFIG_BOARD_EARLY_INIT_F + +/* SD/MMC */ +#define CONFIG_MMC +#define CONFIG_GENERIC_MMC +#define CONFIG_TEGRA2_MMC +#define CONFIG_CMD_MMC + +#define CONFIG_DOS_PARTITION +#define CONFIG_EFI_PARTITION +#define CONFIG_CMD_EXT2 +#define CONFIG_CMD_FAT + +/* Environment not stored */ +#define CONFIG_ENV_IS_NOWHERE +#endif /* __CONFIG_H */ |