diff options
35 files changed, 10 insertions, 2023 deletions
diff --git a/arch/arm/config.mk b/arch/arm/config.mk index 21c1e33e6..4e165bfda 100644 --- a/arch/arm/config.mk +++ b/arch/arm/config.mk @@ -33,9 +33,6 @@ STANDALONE_LOAD_ADDR = 0xc100000 endif endif -ifdef CONFIG_SYS_ARM_WITHOUT_RELOC -PLATFORM_CPPFLAGS += -DCONFIG_SYS_ARM_WITHOUT_RELOC -endif PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__ # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: @@ -68,9 +65,7 @@ endif endif LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds -ifndef CONFIG_SYS_ARM_WITHOUT_RELOC # needed for relocation ifndef CONFIG_NAND_SPL PLATFORM_LDFLAGS += -pie endif -endif diff --git a/arch/arm/cpu/arm1136/start.S b/arch/arm/cpu/arm1136/start.S index d70ca1d51..9f172b625 100644 --- a/arch/arm/cpu/arm1136/start.S +++ b/arch/arm/cpu/arm1136/start.S @@ -132,14 +132,11 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: .word 0x0badc0de -#endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* * the actual reset code */ @@ -318,112 +315,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#ifdef CONFIG_OMAP2420H4 - /* Copy vectors to mask ROM indirect addr */ - adr r0, _start /* r0 <- current position of code */ - add r0, r0, #4 /* skip reset vector */ - mov r2, #64 /* r2 <- size to copy */ - add r2, r0, r2 /* r2 <- source end address */ - mov r1, #SRAM_OFFSET0 /* build vect addr */ - mov r3, #SRAM_OFFSET1 - add r1, r1, r3 - mov r3, #SRAM_OFFSET2 - add r1, r1, r3 -next: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - bne next /* loop until equal */ - bl cpy_clk_code /* put dpll adjust code behind vectors */ -#endif - /* the mask ROM code should have PLL and others stable */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ -#ifndef CONFIG_PRELOADER - beq stack_setup -#endif /* CONFIG_PRELOADER */ - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ -#ifdef CONFIG_PRELOADER - sub sp, r0, #128 /* leave 32 words for abort-stack */ -#else - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ -#endif /* CONFIG_PRELOADER */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - adr r2, _start - ldr r0, _bss_start_ofs /* find start of bss segment */ - add r0, r0, r2 - ldr r1, _bss_end_ofs /* stop here */ - add r1, r1, r2 - mov r2, #0x00000000 /* clear */ - -#ifndef CONFIG_PRELOADER -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - bne clbss_l -#endif - - ldr r0, _start_armboot_ofs - adr r1, _start - add r0, r0, r1 - ldr pc, r0 - -_start_armboot_ofs: -#ifdef CONFIG_NAND_SPL - .word nand_boot - _start -#else -#ifdef CONFIG_ONENAND_IPL - .word start_oneboot - _start -#else - .word start_armboot - _start -#endif /* CONFIG_ONENAND_IPL */ -#endif /* CONFIG_NAND_SPL */ - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -508,13 +399,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack -#else - adr r2, _start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -545,13 +430,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode) -#else - adr r13, _start @ setup our mode stack (enter in banked mode) - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr @@ -567,13 +446,7 @@ cpu_init_crit: .macro get_bad_stack_swi sub r13, r13, #4 @ space on current stack for scratch reg. str r0, [r13] @ save R0's value. -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) ldr r0, IRQ_STACK_START_IN @ get data regions start -#else - ldr r0, _armboot_start @ get data regions start - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack -#endif str lr, [r0] @ save caller lr in position 0 of saved stack mrs r0, spsr @ get the spsr str lr, [r0, #4] @ save spsr in position 1 of saved stack diff --git a/arch/arm/cpu/arm1176/start.S b/arch/arm/cpu/arm1176/start.S index 7f32db787..1a2e5aa37 100644 --- a/arch/arm/cpu/arm1176/start.S +++ b/arch/arm/cpu/arm1176/start.S @@ -108,12 +108,6 @@ _TEXT_BASE: _TEXT_PHY_BASE: .word CONFIG_SYS_PHY_UBOOT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. * Subtracting _start from them lets the linker put their @@ -157,7 +151,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -419,188 +412,6 @@ _board_init_r_ofs: .word board_init_r - _start #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x3f - orr r0, r0, #0xd3 - msr cpsr, r0 - -/* - ************************************************************************* - * - * CPU_init_critical registers - * - * setup important registers - * setup memory timing - * - ************************************************************************* - */ - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -cpu_init_crit: - /* - * When booting from NAND - it has definitely been a reset, so, no need - * to flush caches and disable the MMU - */ -#ifndef CONFIG_NAND_SPL - /* - * flush v4 I/D caches - */ - mov r0, #0 - mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */ - mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */ - - /* - * disable MMU stuff and caches - */ - mrc p15, 0, r0, c1, c0, 0 - bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS) - bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM) - orr r0, r0, #0x00000002 @ set bit 2 (A) Align - orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache - - /* Prepare to disable the MMU */ - adr r2, mmu_disable_phys - sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE) - b mmu_disable - - .align 5 - /* Run in a single cache-line */ -mmu_disable: - mcr p15, 0, r0, c1, c0, 0 - nop - nop - mov pc, r2 -mmu_disable_phys: - -#ifdef CONFIG_DISABLE_TCM - /* - * Disable the TCMs - */ - mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */ - cmp r0, #0 - beq skip_tcmdisable - mov r1, #0 - mov r2, #1 - tst r0, r2 - mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/ - tst r0, r2, LSL #16 - mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/ -skip_tcmdisable: -#endif -#endif - -#ifdef CONFIG_PERIPORT_REMAP - /* Peri port setup */ - ldr r0, =CONFIG_PERIPORT_BASE - orr r0, r0, #CONFIG_PERIPORT_SIZE - mcr p15,0,r0,c15,c2,4 -#endif - - /* - * Go setup Memory and board specific bits prior to relocation. - */ - bl lowlevel_init /* go setup pll,mux,memory */ - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - -#ifdef CONFIG_ENABLE_MMU -enable_mmu: - /* enable domain access */ - ldr r5, =0x0000ffff - mcr p15, 0, r5, c3, c0, 0 /* load domain access register */ - - /* Set the TTB register */ - ldr r0, _mmu_table_base - ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE - ldr r2, =0xfff00000 - bic r0, r0, r2 - orr r1, r0, r1 - mcr p15, 0, r1, c2, c0, 0 - - /* Enable the MMU */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #1 /* Set CR_M to enable MMU */ - - /* Prepare to enable the MMU */ - adr r1, skip_hw_init - and r1, r1, #0x3fc - ldr r2, _TEXT_BASE - ldr r3, =0xfff00000 - and r2, r2, r3 - orr r2, r2, r1 - b mmu_enable - - .align 5 - /* Run in a single cache-line */ -mmu_enable: - - mcr p15, 0, r0, c1, c0, 0 - nop - nop - mov pc, r2 -skip_hw_init: -#endif - - /* Set up the stack */ -stack_setup: - ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0 /* clear */ - -clbss_l: - str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - -#ifndef CONFIG_NAND_SPL - ldr pc, _start_armboot - -_start_armboot: - .word start_armboot -#else - b nand_boot -/* .word nand_boot*/ -#endif - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - #ifdef CONFIG_ENABLE_MMU _mmu_table_base: .word mmu_table @@ -687,14 +498,7 @@ phy_last_jump: /* Save user registers (now in svc mode) r0-r12 */ stmia sp, {r0 - r12} -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - /* set base 2 words into abort stack */ - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) -#else ldr r2, IRQ_STACK_START_IN -#endif /* get values for "aborted" pc and cpsr (into parm regs) */ ldmia r2, {r2 - r3} /* grab pointer to old stack */ @@ -709,16 +513,7 @@ phy_last_jump: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - /* setup our mode stack (enter in banked mode) */ - ldr r13, _armboot_start - /* move past malloc pool */ - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) - /* move to reserved a couple spots for abort stack */ - sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif /* save caller lr in position 0 of saved stack */ str lr, [r13] @@ -743,16 +538,7 @@ phy_last_jump: sub r13, r13, #4 /* save R0's value. */ str r0, [r13] -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - /* get data regions start */ - ldr r0, _armboot_start - /* move past malloc pool */ - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) - /* move past gbl and a couple spots for abort stack */ - sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif /* save caller lr in position 0 of saved stack */ str lr, [r0] /* get the spsr */ diff --git a/arch/arm/cpu/arm720t/start.S b/arch/arm/cpu/arm720t/start.S index 41c1519ef..b94ecb435 100644 --- a/arch/arm/cpu/arm720t/start.S +++ b/arch/arm/cpu/arm720t/start.S @@ -79,12 +79,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -108,7 +102,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -264,92 +257,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifdef CONFIG_LPC2292 - bl lowlevel_init -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - -#if CONFIG_SYS_TEXT_BASE -#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */ - ldr r2, =0x0 /* Relocate the exception vectors */ - cmp r1, r2 /* and associated data to address */ - ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */ - stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */ - ldmneia r0, {r3-r9} - stmneia r2, {r3-r9} - adrne r0, _start /* restore r0 */ -#endif /* !CONFIG_LPC2292 */ -#endif - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -606,13 +513,7 @@ lock_loop: stmia sp, {r0 - r12} @ Calling r0-r12 add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -643,13 +544,7 @@ lock_loop: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/arm920t/start.S b/arch/arm/cpu/arm920t/start.S index f0274b1f8..08d4e7bc3 100644 --- a/arch/arm/cpu/arm920t/start.S +++ b/arch/arm/cpu/arm920t/start.S @@ -75,12 +75,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -104,7 +98,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -316,127 +309,6 @@ _nand_boot: .word nand_boot _board_init_r: .word board_init_r #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual start code - */ - -start_code: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x1f - orr r0, r0, #0xd3 - msr cpsr, r0 - - bl coloured_LED_init - bl red_LED_on - -#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) - /* - * relocate exception table - */ - ldr r0, =_start - ldr r1, =0x0 - mov r2, #16 -copyex: - subs r2, r2, #1 - ldr r3, [r0], #4 - str r3, [r1], #4 - bne copyex -#endif - -#ifdef CONFIG_S3C24X0 - /* turn off the watchdog */ - -# if defined(CONFIG_S3C2400) -# define pWTCON 0x15300000 -# define INTMSK 0x14400008 /* Interupt-Controller base addresses */ -# define CLKDIVN 0x14800014 /* clock divisor register */ -#else -# define pWTCON 0x53000000 -# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ -# define INTSUBMSK 0x4A00001C -# define CLKDIVN 0x4C000014 /* clock divisor register */ -# endif - - ldr r0, =pWTCON - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =INTMSK - str r1, [r0] -# if defined(CONFIG_S3C2410) - ldr r1, =0x3ff - ldr r0, =INTSUBMSK - str r1, [r0] -# endif - - /* FCLK:HCLK:PCLK = 1:2:4 */ - /* default FCLK is 120 MHz ! */ - ldr r0, =CLKDIVN - mov r1, #3 - str r1, [r0] -#endif /* CONFIG_S3C24X0 */ - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -525,15 +397,7 @@ cpu_init_crit: .macro bad_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE) - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - /* set base 2 words into abort stack */ - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r3} @ get pc, cpsr add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -565,15 +429,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE) - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) - /* reserve a couple spots in abort stack */ - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/arm925t/start.S b/arch/arm/cpu/arm925t/start.S index 2ad2df847..6792a22af 100644 --- a/arch/arm/cpu/arm925t/start.S +++ b/arch/arm/cpu/arm925t/start.S @@ -85,12 +85,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -114,7 +108,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -305,108 +298,6 @@ _nand_boot: .word nand_boot _board_init_r: .word board_init_r #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * Set up 925T mode - */ - mov r1, #0x81 /* Set ARM925T configuration. */ - mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */ - - /* - * turn off the watchdog, unlock/diable sequence - */ - mov r1, #0xF5 - ldr r0, =WDTIM_MODE - strh r1, [r0] - mov r1, #0xA0 - strh r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTMR - default - */ - mov r1, #0xffffffff - ldr r0, =REG_IHL1_MIR - str r1, [r0] - ldr r0, =REG_IHL2_MIR - str r1, [r0] - - /* - * wait for dpll to lock - */ - ldr r0, =CK_DPLL1 - mov r1, #0x10 - strh r1, [r0] -poll1: - ldrh r1, [r0] - ands r1, r1, #0x01 - beq poll1 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -489,13 +380,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -526,13 +411,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/arm926ejs/orion5x/dram.c b/arch/arm/cpu/arm926ejs/orion5x/dram.c index c5c8ab7e4..b74928209 100644 --- a/arch/arm/cpu/arm926ejs/orion5x/dram.c +++ b/arch/arm/cpu/arm926ejs/orion5x/dram.c @@ -49,20 +49,6 @@ u32 orion5x_sdram_bar(enum memory_bank bank) result = winregs[bank].base; return result; } -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - gd->bd->bi_dram[i].start = orion5x_sdram_bar(i); - gd->bd->bi_dram[i].size = get_ram_size( - (volatile long *) (gd->bd->bi_dram[i].start), - CONFIG_MAX_RAM_BANK_SIZE); - } - return 0; -} -#else int dram_init (void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -83,4 +69,3 @@ void dram_init_banksize (void) CONFIG_MAX_RAM_BANK_SIZE); } } -#endif diff --git a/arch/arm/cpu/arm926ejs/start.S b/arch/arm/cpu/arm926ejs/start.S index 7397882b5..4f689c1ef 100644 --- a/arch/arm/cpu/arm926ejs/start.S +++ b/arch/arm/cpu/arm926ejs/start.S @@ -145,7 +145,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -307,89 +306,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */ - add r2, r0, r3 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub sp, r0, #128 /* leave 32 words for abort-stack */ -#ifndef CONFIG_PRELOADER - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif -#endif /* CONFIG_PRELOADER */ - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - adr r2, _start - ldr r0, _bss_start_ofs /* find start of bss segment */ - add r0, r0, r2 - ldr r1, _bss_end_ofs /* stop here */ - add r1, r1, r2 - mov r2, #0x00000000 /* clear */ - -#ifndef CONFIG_PRELOADER -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - bl coloured_LED_init - bl red_LED_on -#endif /* CONFIG_PRELOADER */ - - ldr r0, _start_armboot_ofs - adr r1, _start - add r0, r0, r1 - ldr pc, r0 - -_start_armboot_ofs: -#ifdef CONFIG_NAND_SPL - .word nand_boot - _start -#else - .word start_armboot - _start -#endif /* CONFIG_NAND_SPL */ -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -474,13 +390,7 @@ cpu_init_crit: @ carve out a frame on current user stack sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - adr r2, _start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -512,13 +422,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - adr r13, _start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/arm946es/start.S b/arch/arm/cpu/arm946es/start.S index 22af2fae9..7378edc41 100644 --- a/arch/arm/cpu/arm946es/start.S +++ b/arch/arm/cpu/arm946es/start.S @@ -89,12 +89,6 @@ _fiq: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -118,7 +112,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -273,72 +266,6 @@ _nand_boot: .word nand_boot _board_init_r: .word board_init_r #endif -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - bne clbss_l - - ldr pc, _start_armboot - -_start_armboot: - .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -424,13 +351,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -462,13 +383,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/arm_intcm/start.S b/arch/arm/cpu/arm_intcm/start.S index a420f44ff..2240f3a52 100644 --- a/arch/arm/cpu/arm_intcm/start.S +++ b/arch/arm/cpu/arm_intcm/start.S @@ -87,12 +87,6 @@ _fiq: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -116,7 +110,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -268,74 +261,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ -.globl reset -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* pc relative address of label */ - ldr r1, _TEXT_BASE /* linked image address of label */ - cmp r0, r1 /* test if we run from flash or RAM */ - beq stack_setup /* ifeq we are in the RAM copy */ - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: - .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -400,13 +325,7 @@ cpu_init_crit: sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif @ get values for "aborted" pc and cpsr (into parm regs) ldmia r2, {r2 - r3} add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -438,13 +357,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr in position 0 of saved stack mrs lr, spsr @ get the spsr diff --git a/arch/arm/cpu/armv7/omap3/emif4.c b/arch/arm/cpu/armv7/omap3/emif4.c index da2cd9001..0870857ed 100644 --- a/arch/arm/cpu/armv7/omap3/emif4.c +++ b/arch/arm/cpu/armv7/omap3/emif4.c @@ -136,29 +136,6 @@ void do_emif4_init(void) * dram_init - * - Sets uboots idea of sdram size */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - unsigned int size0 = 0, size1 = 0; - - size0 = get_sdr_cs_size(CS0); - /* - * If a second bank of DDR is attached to CS1 this is - * where it can be started. Early init code will init - * memory on CS0. - */ - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) - size1 = get_sdr_cs_size(CS1); - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = size0; - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); - gd->bd->bi_dram[1].size = size1; - - return 0; -} -#else int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -190,7 +167,6 @@ void dram_init_banksize (void) gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); gd->bd->bi_dram[1].size = size1; } -#endif /* * mem_init() - diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c index 6c419f5b9..c75aa1d11 100644 --- a/arch/arm/cpu/armv7/omap3/sdrc.c +++ b/arch/arm/cpu/armv7/omap3/sdrc.c @@ -163,33 +163,6 @@ void do_sdrc_init(u32 cs, u32 early) * dram_init - * - Sets uboots idea of sdram size */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - DECLARE_GLOBAL_DATA_PTR; - unsigned int size0 = 0, size1 = 0; - - size0 = get_sdr_cs_size(CS0); - /* - * If a second bank of DDR is attached to CS1 this is - * where it can be started. Early init code will init - * memory on CS0. - */ - if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) { - do_sdrc_init(CS1, NOT_EARLY); - make_cs1_contiguous(); - - size1 = get_sdr_cs_size(CS1); - } - - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = size0; - gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); - gd->bd->bi_dram[1].size = size1; - - return 0; -} -#else int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; @@ -225,7 +198,6 @@ void dram_init_banksize (void) gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1); gd->bd->bi_dram[1].size = size1; } -#endif /* * mem_init - diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c index 24a66f5b9..e7651d2dd 100644 --- a/arch/arm/cpu/armv7/omap4/board.c +++ b/arch/arm/cpu/armv7/omap4/board.c @@ -102,12 +102,7 @@ int dram_init(void) { DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - gd->bd->bi_dram[0].start = 0x80000000; - gd->bd->bi_dram[0].size = sdram_size(); -#else gd->ram_size = sdram_size(); -#endif return 0; } diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index bdf2fad38..4a0710c96 100644 --- a/arch/arm/cpu/armv7/start.S +++ b/arch/arm/cpu/armv7/start.S @@ -70,12 +70,6 @@ _end_vect: _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -99,7 +93,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -295,94 +288,6 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0, cpsr - bic r0, r0, #0x1f - orr r0, r0, #0xd3 - msr cpsr,r0 - -#if (CONFIG_OMAP34XX) - /* Copy vectors to mask ROM indirect addr */ - adr r0, _start @ r0 <- current position of code - add r0, r0, #4 @ skip reset vector - mov r2, #64 @ r2 <- size to copy - add r2, r0, r2 @ r2 <- source end address - mov r1, #SRAM_OFFSET0 @ build vect addr - mov r3, #SRAM_OFFSET1 - add r1, r1, r3 - mov r3, #SRAM_OFFSET2 - add r1, r1, r3 -next: - ldmia r0!, {r3 - r10} @ copy from source address [r0] - stmia r1!, {r3 - r10} @ copy to target address [r1] - cmp r0, r2 @ until source end address [r2] - bne next @ loop until equal */ -#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT) - /* No need to copy/exec the clock code - DPLL adjust already done - * in NAND/oneNAND Boot. - */ - bl cpy_clk_code @ put dpll adjust code behind vectors -#endif /* NAND Boot */ -#endif - /* the mask ROM code should have PLL and others stable */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: @ relocate U-Boot to RAM - adr r0, _start @ r0 <- current position of code - ldr r1, _TEXT_BASE @ test if we run from flash or RAM - cmp r0, r1 @ don't reloc during debug - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 @ r2 <- size of armboot - add r2, r0, r2 @ r2 <- source end address - -copy_loop: @ copy 32 bytes at a time - ldmia r0!, {r3 - r10} @ copy from source address [r0] - stmia r1!, {r3 - r10} @ copy to target address [r1] - cmp r0, r2 @ until source end address [r2] - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE @ upper 128 KiB: relocated uboot - sub r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area - sub r0, r0, #GENERATED_GBL_DATA_SIZE @ bdinfo -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 @ leave 3 words for abort-stack - bic sp, sp, #7 @ 8-byte alignment for ABI compliance - - /* Clear BSS (if any). Is below tx (watch load addr - need space) */ -clear_bss: - ldr r0, _bss_start @ find start of bss segment - ldr r1, _bss_end @ stop here - mov r2, #0x00000000 @ clear value -clbss_l: - str r2, [r0] @ clear BSS location - cmp r0, r1 @ are we at the end yet - add r0, r0, #4 @ increment clear index pointer - bne clbss_l @ keep clearing till at end - - ldr pc, _start_armboot @ jump to C code - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /************************************************************************* * * CPU_init_critical registers @@ -464,14 +369,8 @@ cpu_init_crit: @ user stack stmia sp, {r0 - r12} @ Save user registers (now in @ svc mode) r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE + 8) @ set base 2 words into abort -#else ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort @ stack -#endif ldmia r2, {r2 - r3} @ get values for "aborted" pc @ and cpsr (into parm regs) add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack @@ -507,14 +406,8 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack (enter - sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) @ move to reserved a couple -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter @ in banked mode) -#endif str lr, [r13] @ save caller lr in position 0 @ of saved stack @@ -535,14 +428,8 @@ cpu_init_crit: sub r13, r13, #4 @ space on current stack for @ scratch reg. str r0, [r13] @ save R0's value. -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r0, _armboot_start @ get data regions start - sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool - sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) @ move past gbl and a couple -#else ldr r0, IRQ_STACK_START_IN @ get data regions start @ spots for abort stack -#endif str lr, [r0] @ save caller lr in position 0 @ of saved stack mrs r0, spsr @ get the spsr diff --git a/arch/arm/cpu/ixp/start.S b/arch/arm/cpu/ixp/start.S index a2560d4c2..0269207bb 100644 --- a/arch/arm/cpu/ixp/start.S +++ b/arch/arm/cpu/ixp/start.S @@ -98,12 +98,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -127,7 +121,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -394,190 +387,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/****************************************************************************/ -/* */ -/* the actual reset code */ -/* */ -/****************************************************************************/ - -reset: - /* disable mmu, set big-endian */ - mov r0, #0xf8 - mcr p15, 0, r0, c1, c0, 0 - CPWAIT r0 - - /* invalidate I & D caches & BTB */ - mcr p15, 0, r0, c7, c7, 0 - CPWAIT r0 - - /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 - CPWAIT r0 - - /* drain write and fill buffers */ - mcr p15, 0, r0, c7, c10, 4 - CPWAIT r0 - - /* disable write buffer coalescing */ - mrc p15, 0, r0, c1, c0, 1 - orr r0, r0, #1 - mcr p15, 0, r0, c1, c0, 1 - CPWAIT r0 - - /* set EXP CS0 to the optimum timing */ - ldr r1, =CONFIG_SYS_EXP_CS0 - ldr r2, =IXP425_EXP_CS0 - str r1, [r2] - - /* make sure flash is visible at 0 */ -#if 0 - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - orr r1, r1, #0x80000000 - str r1, [r2] -#endif - mov r1, #CONFIG_SYS_SDR_CONFIG - ldr r2, =IXP425_SDR_CONFIG - str r1, [r2] - - /* disable refresh cycles */ - mov r1, #0 - ldr r3, =IXP425_SDR_REFRESH - str r1, [r3] - - /* send nop command */ - mov r1, #3 - ldr r4, =IXP425_SDR_IR - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* set SDRAM internal refresh val */ - ldr r1, =CONFIG_SYS_SDRAM_REFRESH_CNT - str r1, [r3] - DELAY_FOR 0x4000, r0 - - /* send precharge-all command to close all open banks */ - mov r1, #2 - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* provide 8 auto-refresh cycles */ - mov r1, #4 - mov r5, #8 -111: str r1, [r4] - DELAY_FOR 0x100, r0 - subs r5, r5, #1 - bne 111b - - /* set mode register in sdram */ - mov r1, #CONFIG_SYS_SDR_MODE_CONFIG - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* send normal operation command */ - mov r1, #6 - str r1, [r4] - DELAY_FOR 0x4000, r0 - - /* copy */ - mov r0, #0 - mov r4, r0 - add r2, r0, #CONFIG_SYS_MONITOR_LEN - mov r1, #0x10000000 - mov r5, r1 - - 30: - ldr r3, [r0], #4 - str r3, [r1], #4 - cmp r0, r2 - bne 30b - - /* invalidate I & D caches & BTB */ - mcr p15, 0, r0, c7, c7, 0 - CPWAIT r0 - - /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 - CPWAIT r0 - - /* drain write and fill buffers */ - mcr p15, 0, r0, c7, c10, 4 - CPWAIT r0 - - /* move flash to 0x50000000 */ - ldr r2, =IXP425_EXP_CFG0 - ldr r1, [r2] - bic r1, r1, #0x80000000 - str r1, [r2] - - nop - nop - nop - nop - nop - nop - - /* invalidate I & Data TLB */ - mcr p15, 0, r0, c8, c7, 0 - CPWAIT r0 - - /* enable I cache */ - mrc p15, 0, r0, c1, c0, 0 - orr r0, r0, #MMU_Control_I - mcr p15, 0, r0, c1, c0, 0 - CPWAIT r0 - - mrs r0,cpsr /* set the cpu to SVC32 mode */ - bic r0,r0,#0x1f /* (superviser mode, M=10011) */ - orr r0,r0,#0x13 - msr cpsr,r0 - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /****************************************************************************/ /* */ @@ -618,13 +427,7 @@ _start_armboot: .word start_armboot stmia sp, {r0 - r12} /* Calling r0-r12 */ add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */ add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */ @@ -659,13 +462,7 @@ _start_armboot: .word start_armboot .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/lh7a40x/start.S b/arch/arm/cpu/lh7a40x/start.S index 239ad47a4..080d29d20 100644 --- a/arch/arm/cpu/lh7a40x/start.S +++ b/arch/arm/cpu/lh7a40x/start.S @@ -75,12 +75,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -104,7 +98,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -278,100 +271,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0xd3 - msr cpsr,r0 - -#define pWDTCTL 0x80001400 /* Watchdog Timer control register */ -#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */ -#define pCLKSET 0x80000420 /* clock divisor register */ - - /* disable watchdog, set watchdog control register to - * all zeros (default reset) - */ - ldr r0, =pWDTCTL - mov r1, #0x0 - str r1, [r0] - - /* - * mask all IRQs by setting all bits in the INTENC register (default) - */ - mov r1, #0xffffffff - ldr r0, =pINTENC - str r1, [r0] - - /* FCLK:HCLK:PCLK = 1:2:2 */ - /* default FCLK is 200 MHz, using 14.7456 MHz fin */ - ldr r0, =pCLKSET - ldr r1, =0x0004ee39 -@ ldr r1, =0x0005ee39 @ 1: 2: 4 - str r1, [r0] - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - @add r0, r0, #4 /* start at first byte of bss */ - /* why inc. 4 bytes past then? */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -460,13 +359,7 @@ cpu_init_crit: .macro bad_save_user_regs sub sp, sp, #S_FRAME_SIZE stmia sp, {r0 - r12} @ Calling r0-r12 -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r3} @ get pc, cpsr add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -497,13 +390,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/cpu/pxa/start.S b/arch/arm/cpu/pxa/start.S index bf8510eb7..03cf4dec3 100644 --- a/arch/arm/cpu/pxa/start.S +++ b/arch/arm/cpu/pxa/start.S @@ -299,7 +299,7 @@ fixnext: add r2, r2, #8 /* each rel.dyn entry is 8 bytes */ cmp r2, r3 blo fixloop -#endif +#endif /* #ifndef CONFIG_PRELOADER */ #endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */ clear_bss: @@ -316,7 +316,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 bne clbss_l -#endif +#endif /* #ifndef CONFIG_PRELOADER */ /* * We are done. Do not return, instead branch to second part of board @@ -343,7 +343,7 @@ _start_oneboot_ofs _board_init_r_ofs: .word board_init_r - _start -#endif +#endif /* CONFIG_ONENAND_IPL */ _rel_dyn_start_ofs: .word __rel_dyn_start - _start @@ -352,7 +352,7 @@ _rel_dyn_end_ofs: _dynsym_start_ofs: .word __dynsym_start - _start -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ +#else /* CONFIG_PRELOADER */ /****************************************************************************/ /* */ @@ -377,7 +377,7 @@ reset: /* Start OneNAND IPL */ ldr pc, =start_oneboot -#endif /* #if !defined(CONFIG_ONENAND_IPL) */ +#endif /* CONFIG_PRELOADER */ #ifndef CONFIG_PRELOADER /****************************************************************************/ @@ -419,13 +419,7 @@ reset: stmia sp, {r0 - r12} /* Calling r0-r12 */ add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */ add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */ @@ -460,13 +454,7 @@ reset: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr @@ -485,7 +473,7 @@ reset: .macro get_fiq_stack @ setup FIQ stack ldr sp, FIQ_STACK_START .endm -#endif /* CONFIG_PRELOADER */ +#endif /* CONFIG_PRELOADER /****************************************************************************/ @@ -499,7 +487,7 @@ reset: do_hang: ldr sp, _TEXT_BASE /* use 32 words abort stack */ bl hang /* hang and never return */ -#else /* !CONFIG_PRELOADER */ +#else .align 5 undefined_instruction: get_bad_stack @@ -618,4 +606,4 @@ mmu_table: .word (__base << 20) | 0xc12 .set __base, __base + 1 .endr -#endif +#endif /* CONFIG_PRELOADER */ diff --git a/arch/arm/cpu/s3c44b0/start.S b/arch/arm/cpu/s3c44b0/start.S index c58da9879..ca95dea55 100644 --- a/arch/arm/cpu/s3c44b0/start.S +++ b/arch/arm/cpu/s3c44b0/start.S @@ -66,12 +66,6 @@ _start: b reset _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -95,7 +89,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -265,84 +258,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ - -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit - /* - * before relocating, we have to setup RAM timing - * because memory timing is board-dependend, you will - * find a lowlevel_init.S in your board directory. - */ - bl lowlevel_init -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop - -/* - now copy to sram the interrupt vector -*/ - adr r0, real_vectors - add r2, r0, #1024 - ldr r1, =0x0c000000 - add r1, r1, #0x08 -vector_copy_loop: - ldmia r0!, {r3-r10} - stmia r1!, {r3-r10} - cmp r0, r2 - blo vector_copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * diff --git a/arch/arm/cpu/sa1100/start.S b/arch/arm/cpu/sa1100/start.S index e6afe0f86..ab6e2f219 100644 --- a/arch/arm/cpu/sa1100/start.S +++ b/arch/arm/cpu/sa1100/start.S @@ -76,12 +76,6 @@ _fiq: .word fiq _TEXT_BASE: .word CONFIG_SYS_TEXT_BASE -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -.globl _armboot_start -_armboot_start: - .word _start -#endif - /* * These are defined in the board-specific linker script. */ @@ -105,7 +99,6 @@ FIQ_STACK_START: .word 0x0badc0de #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) /* IRQ stack memory (calculated at run-time) + 8 bytes */ .globl IRQ_STACK_START_IN IRQ_STACK_START_IN: @@ -254,75 +247,6 @@ clbss_l:str r2, [r0] /* clear loop... */ _board_init_r: .word board_init_r -#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - -/* - * the actual reset code - */ - -reset: - /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 - - /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ -#ifndef CONFIG_SKIP_LOWLEVEL_INIT - bl cpu_init_crit -#endif - -#ifndef CONFIG_SKIP_RELOCATE_UBOOT -relocate: /* relocate U-Boot to RAM */ - adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ - cmp r0, r1 /* don't reloc during debug */ - beq stack_setup - - ldr r2, _armboot_start - ldr r3, _bss_start - sub r2, r3, r2 /* r2 <- size of armboot */ - add r2, r0, r2 /* r2 <- source end address */ - -copy_loop: - ldmia r0!, {r3-r10} /* copy from source address [r0] */ - stmia r1!, {r3-r10} /* copy to target address [r1] */ - cmp r0, r2 /* until source end address [r2] */ - blo copy_loop -#endif /* CONFIG_SKIP_RELOCATE_UBOOT */ - - /* Set up the stack */ -stack_setup: - ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ - sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */ - sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */ -#ifdef CONFIG_USE_IRQ - sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) -#endif - sub sp, r0, #12 /* leave 3 words for abort-stack */ - bic sp, sp, #7 /* 8-byte alignment for ABI compliance */ - -clear_bss: - ldr r0, _bss_start /* find start of bss segment */ - ldr r1, _bss_end /* stop here */ - mov r2, #0x00000000 /* clear */ - -clbss_l:str r2, [r0] /* clear loop... */ - add r0, r0, #4 - cmp r0, r1 - blo clbss_l - - ldr pc, _start_armboot - -_start_armboot: .word start_armboot - -#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - /* ************************************************************************* * @@ -441,13 +365,7 @@ cpu_init_crit: stmia sp, {r0 - r12} @ Calling r0-r12 add r8, sp, #S_PC -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r2, _armboot_start - sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack -#else ldr r2, IRQ_STACK_START_IN -#endif ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0 add r0, sp, #S_FRAME_SIZE @ restore sp_SVC @@ -478,13 +396,7 @@ cpu_init_crit: .endm .macro get_bad_stack -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) - ldr r13, _armboot_start @ setup our mode stack - sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) - sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack -#else ldr r13, IRQ_STACK_START_IN @ setup our mode stack -#endif str lr, [r13] @ save caller lr / spsr mrs lr, spsr diff --git a/arch/arm/include/asm/global_data.h b/arch/arm/include/asm/global_data.h index 5438ebc5f..ada3fbb64 100644 --- a/arch/arm/include/asm/global_data.h +++ b/arch/arm/include/asm/global_data.h @@ -61,7 +61,6 @@ typedef struct global_data { unsigned long tbu; unsigned long long timer_reset_value; #endif -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) unsigned long relocaddr; /* Start address of U-Boot in RAM */ phys_size_t ram_size; /* RAM size */ unsigned long mon_len; /* monitor len */ @@ -71,7 +70,6 @@ typedef struct global_data { #if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE)) unsigned long tlb_addr; #endif -#endif void **jt; /* jump table */ char env_buf[32]; /* buffer for getenv() before reloc. */ } gd_t; diff --git a/arch/arm/include/asm/u-boot-arm.h b/arch/arm/include/asm/u-boot-arm.h index 4ac4f612e..33973a32e 100644 --- a/arch/arm/include/asm/u-boot-arm.h +++ b/arch/arm/include/asm/u-boot-arm.h @@ -34,16 +34,12 @@ extern ulong _bss_start_ofs; /* BSS start relative to _start */ extern ulong _bss_end_ofs; /* BSS end relative to _start */ extern ulong IRQ_STACK_START; /* top of IRQ stack */ extern ulong FIQ_STACK_START; /* top of FIQ stack */ -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -extern ulong _armboot_start_ofs; /* code start */ -#else extern ulong _TEXT_BASE; /* code start */ extern ulong _datarel_start_ofs; extern ulong _datarelrolocal_start_ofs; extern ulong _datarellocal_start_ofs; extern ulong _datarelro_start_ofs; extern ulong IRQ_STACK_START_IN; /* 8 bytes in IRQ stack */ -#endif /* cpu/.../cpu.c */ int cpu_init(void); @@ -56,9 +52,7 @@ int arch_misc_init(void); /* board/.../... */ int board_init(void); int dram_init (void); -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) void dram_init_banksize (void); -#endif void setup_serial_tag (struct tag **params); void setup_revision_tag (struct tag **params); diff --git a/arch/arm/lib/board.c b/arch/arm/lib/board.c index 33b369496..1fd5f8362 100644 --- a/arch/arm/lib/board.c +++ b/arch/arm/lib/board.c @@ -127,11 +127,7 @@ static int init_baudrate (void) char tmp[64]; /* long enough for environment variables */ int i = getenv_f("baudrate", tmp, sizeof (tmp)); -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) gd->baudrate = (i > 0) -#else - gd->bd->bi_baudrate = gd->baudrate = (i > 0) -#endif ? (int) simple_strtoul (tmp, NULL, 10) : CONFIG_BAUDRATE; @@ -142,11 +138,7 @@ static int display_banner (void) { printf ("\n\n%s\n\n", version_string); debug ("U-Boot code: %08lX -> %08lX BSS: -> %08lX\n", -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) _TEXT_BASE, -#else - _armboot_start, -#endif _bss_start_ofs+_TEXT_BASE, _bss_end_ofs+_TEXT_BASE); #ifdef CONFIG_MODEM_SUPPORT debug ("Modem Support enabled\n"); @@ -190,16 +182,6 @@ static int display_dram_config (void) return (0); } -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -#ifndef CONFIG_SYS_NO_FLASH -static void display_flash_config (ulong size) -{ - puts ("Flash: "); - print_size (size, "\n"); -} -#endif /* CONFIG_SYS_NO_FLASH */ -#endif - #if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) static int init_func_i2c (void) { @@ -246,214 +228,6 @@ typedef int (init_fnc_t) (void); int print_cpuinfo (void); -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -init_fnc_t *init_sequence[] = { -#if defined(CONFIG_ARCH_CPU_INIT) - arch_cpu_init, /* basic arch cpu dependent setup */ -#endif - board_init, /* basic board dependent setup */ -#if defined(CONFIG_USE_IRQ) - interrupt_init, /* set up exceptions */ -#endif - timer_init, /* initialize timer */ -#ifdef CONFIG_FSL_ESDHC - get_clocks, -#endif - env_init, /* initialize environment */ - init_baudrate, /* initialze baudrate settings */ - serial_init, /* serial communications setup */ - console_init_f, /* stage 1 init of console */ - display_banner, /* say that we are here */ -#if defined(CONFIG_DISPLAY_CPUINFO) - print_cpuinfo, /* display cpu info (and speed) */ -#endif -#if defined(CONFIG_DISPLAY_BOARDINFO) - checkboard, /* display board info */ -#endif -#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) - init_func_i2c, -#endif - dram_init, /* configure available RAM banks */ -#if defined(CONFIG_CMD_PCI) || defined (CONFIG_PCI) - arm_pci_init, -#endif - display_dram_config, - NULL, -}; - -void start_armboot (void) -{ - init_fnc_t **init_fnc_ptr; - char *s; -#if defined(CONFIG_VFD) || defined(CONFIG_LCD) - unsigned long addr; -#endif - - /* Pointer is writable since we allocated a register for it */ - gd = (gd_t*)(_armboot_start - CONFIG_SYS_MALLOC_LEN - sizeof(gd_t)); - /* compiler optimization barrier needed for GCC >= 3.4 */ - __asm__ __volatile__("": : :"memory"); - - memset ((void*)gd, 0, sizeof (gd_t)); - gd->bd = (bd_t*)((char*)gd - sizeof(bd_t)); - memset (gd->bd, 0, sizeof (bd_t)); - - gd->flags |= GD_FLG_RELOC; - - monitor_flash_len = _bss_start - _armboot_start; - - for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) { - if ((*init_fnc_ptr)() != 0) { - hang (); - } - } - - /* armboot_start is defined in the board-specific linker script */ - mem_malloc_init (_armboot_start - CONFIG_SYS_MALLOC_LEN, - CONFIG_SYS_MALLOC_LEN); - -#ifndef CONFIG_SYS_NO_FLASH - /* configure available FLASH banks */ - display_flash_config (flash_init ()); -#endif /* CONFIG_SYS_NO_FLASH */ - -#ifdef CONFIG_VFD -# ifndef PAGE_SIZE -# define PAGE_SIZE 4096 -# endif - /* - * reserve memory for VFD display (always full pages) - */ - /* bss_end is defined in the board-specific linker script */ - addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1); - vfd_setmem (addr); - gd->fb_base = addr; -#endif /* CONFIG_VFD */ - -#ifdef CONFIG_LCD - /* board init may have inited fb_base */ - if (!gd->fb_base) { -# ifndef PAGE_SIZE -# define PAGE_SIZE 4096 -# endif - /* - * reserve memory for LCD display (always full pages) - */ - /* bss_end is defined in the board-specific linker script */ - addr = (_bss_end + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1); - lcd_setmem (addr); - gd->fb_base = addr; - } -#endif /* CONFIG_LCD */ - -#if defined(CONFIG_CMD_NAND) - puts ("NAND: "); - nand_init(); /* go init the NAND */ -#endif - -#if defined(CONFIG_CMD_ONENAND) - onenand_init(); -#endif - -#ifdef CONFIG_HAS_DATAFLASH - AT91F_DataflashInit(); - dataflash_print_info(); -#endif - -#ifdef CONFIG_GENERIC_MMC -/* - * MMC initialization is called before relocating env. - * Thus It is required that operations like pin multiplexer - * be put in board_init. - */ - puts ("MMC: "); - mmc_initialize (gd->bd); -#endif - - /* initialize environment */ - env_relocate (); - -#ifdef CONFIG_VFD - /* must do this after the framebuffer is allocated */ - drv_vfd_init(); -#endif /* CONFIG_VFD */ - -#ifdef CONFIG_SERIAL_MULTI - serial_initialize(); -#endif - - /* IP Address */ - gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr"); - - stdio_init (); /* get the devices list going. */ - - jumptable_init (); - -#if defined(CONFIG_API) - /* Initialize API */ - api_init (); -#endif - - console_init_r (); /* fully init console as a device */ - -#if defined(CONFIG_ARCH_MISC_INIT) - /* miscellaneous arch dependent initialisations */ - arch_misc_init (); -#endif -#if defined(CONFIG_MISC_INIT_R) - /* miscellaneous platform dependent initialisations */ - misc_init_r (); -#endif - - /* enable exceptions */ - enable_interrupts (); - - /* Perform network card initialisation if necessary */ - -#if defined(CONFIG_DRIVER_SMC91111) || defined (CONFIG_DRIVER_LAN91C96) - /* XXX: this needs to be moved to board init */ - if (getenv ("ethaddr")) { - uchar enetaddr[6]; - eth_getenv_enetaddr("ethaddr", enetaddr); - smc_set_mac_addr(enetaddr); - } -#endif /* CONFIG_DRIVER_SMC91111 || CONFIG_DRIVER_LAN91C96 */ - - /* Initialize from environment */ - if ((s = getenv ("loadaddr")) != NULL) { - load_addr = simple_strtoul (s, NULL, 16); - } -#if defined(CONFIG_CMD_NET) - if ((s = getenv ("bootfile")) != NULL) { - copy_filename (BootFile, s, sizeof (BootFile)); - } -#endif - -#ifdef BOARD_LATE_INIT - board_late_init (); -#endif - -#ifdef CONFIG_BITBANGMII - bb_miiphy_init(); -#endif -#if defined(CONFIG_CMD_NET) -#if defined(CONFIG_NET_MULTI) - puts ("Net: "); -#endif - eth_initialize(gd->bd); -#if defined(CONFIG_RESET_PHY_R) - debug ("Reset Ethernet PHY\n"); - reset_phy(); -#endif -#endif - /* main_loop() can return to retry autoboot, if so just run it again. */ - for (;;) { - main_loop (); - } - - /* NOTREACHED - no way out of command loop except booting */ -} -#else void __dram_init_banksize(void) { gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; @@ -868,8 +642,6 @@ void board_init_r (gd_t *id, ulong dest_addr) /* NOTREACHED - no way out of command loop except booting */ } -#endif /* defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */ - void hang (void) { puts ("### ERROR ### Please RESET the board ###\n"); diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c index fe6d45987..d9175f058 100644 --- a/arch/arm/lib/cache-cp15.c +++ b/arch/arm/lib/cache-cp15.c @@ -44,7 +44,6 @@ static void cp_delay (void) asm volatile("" : : : "memory"); } -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) static inline void dram_bank_mmu_setup(int bank) { u32 *page_table = (u32 *)gd->tlb_addr; @@ -58,18 +57,11 @@ static inline void dram_bank_mmu_setup(int bank) page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP; } } -#endif /* to activate the MMU we need to set up virtual memory: use 1M areas */ static inline void mmu_setup(void) { -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) u32 *page_table = (u32 *)gd->tlb_addr; -#else - static u32 __attribute__((aligned(16384))) page_table[4096]; - bd_t *bd = gd->bd; - int j; -#endif int i; u32 reg; @@ -77,20 +69,9 @@ static inline void mmu_setup(void) for (i = 0; i < 4096; i++) page_table[i] = i << 20 | (3 << 10) | 0x12; -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { dram_bank_mmu_setup(i); } -#else - /* Then, enable cacheable and bufferable for RAM only */ - for (j = 0; j < CONFIG_NR_DRAM_BANKS; j++) { - for (i = bd->bi_dram[j].start >> 20; - i < (bd->bi_dram[j].start + bd->bi_dram[j].size) >> 20; - i++) { - page_table[i] = i << 20 | (3 << 10) | CACHE_SETUP; - } - } -#endif /* Copy the page table address to cp15 */ asm volatile("mcr p15, 0, %0, c2, c0, 0" diff --git a/arch/arm/lib/interrupts.c b/arch/arm/lib/interrupts.c index 90aa04b87..74ff5ce1c 100644 --- a/arch/arm/lib/interrupts.c +++ b/arch/arm/lib/interrupts.c @@ -46,12 +46,8 @@ int interrupt_init (void) /* * setup up stacks if necessary */ -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) IRQ_STACK_START = gd->irq_sp - 4; IRQ_STACK_START_IN = gd->irq_sp + 8; -#else - IRQ_STACK_START = _armboot_start - CONFIG_SYS_MALLOC_LEN - GENERATED_GBL_DATA_SIZE - 4; -#endif FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ; return arch_interrupt_init(); @@ -86,7 +82,6 @@ int disable_interrupts (void) return (old & 0x80) == 0; } #else -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) int interrupt_init (void) { /* @@ -96,7 +91,6 @@ int interrupt_init (void) return 0; } -#endif void enable_interrupts (void) { diff --git a/board/davinci/common/misc.c b/board/davinci/common/misc.c index b60a46e96..fa9dd9fe4 100644 --- a/board/davinci/common/misc.c +++ b/board/davinci/common/misc.c @@ -33,15 +33,6 @@ DECLARE_GLOBAL_DATA_PTR; -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - - return(0); -} -#else int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -56,7 +47,6 @@ void dram_init_banksize(void) gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; gd->bd->bi_dram[0].size = gd->ram_size; } -#endif #ifdef CONFIG_DRIVER_TI_EMAC diff --git a/board/keymile/km_arm/km_arm.c b/board/keymile/km_arm/km_arm.c index 7c0b85888..ed5ed4482 100644 --- a/board/keymile/km_arm/km_arm.c +++ b/board/keymile/km_arm/km_arm.c @@ -225,20 +225,6 @@ U_BOOT_CMD( ); #endif -#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC) -int dram_init(void) -{ - int i; - - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) { - gd->bd->bi_dram[i].start = kw_sdram_bar(i); - gd->bd->bi_dram[i].size = get_ram_size((long *)kw_sdram_bar(i), - kw_sdram_bs(i)); - } - - return 0; -} -#else int dram_init(void) { /* dram_init must store complete ramsize in gd->ram_size */ @@ -259,7 +245,6 @@ void dram_init_banksize(void) kw_sdram_bs(i)); } } -#endif /* Configure and enable MV88E1118 PHY */ void reset_phy(void) diff --git a/board/ttcontrol/vision2/vision2.c b/board/ttcontrol/vision2/vision2.c index 071dad66c..f8ef4fc9c 100644 --- a/board/ttcontrol/vision2/vision2.c +++ b/board/ttcontrol/vision2/vision2.c @@ -160,19 +160,8 @@ u32 get_board_rev(void) int dram_init(void) { -#ifdef CONFIG_SYS_ARM_WITHOUT_RELOC - gd->bd->bi_dram[0].start = PHYS_SDRAM_1; - gd->bd->bi_dram[0].size = get_ram_size((long *)PHYS_SDRAM_1, - PHYS_SDRAM_1_SIZE); -#if (CONFIG_NR_DRAM_BANKS > 1) - gd->bd->bi_dram[1].start = PHYS_SDRAM_2; - gd->bd->bi_dram[1].size = get_ram_size((long *)PHYS_SDRAM_2, - PHYS_SDRAM_2_SIZE); -#endif -#else gd->ram_size = get_ram_size((long *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE); -#endif return 0; } @@ -682,9 +671,6 @@ void lcd_enable(void) int board_init(void) { -#ifdef CONFIG_SYS_ARM_WITHOUT_RELOC - board_early_init_f(); -#endif gd->bd->bi_arch_number = MACH_TYPE_TTC_VISION2; /* board id for linux */ /* address of boot parameters */ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100; diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index 51b75ffc5..bba737460 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -343,7 +343,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) printf ("ip_addr = %pI4\n", &bd->bi_ip_addr); #endif printf ("baudrate = %d bps\n", bd->bi_baudrate); -#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) #if !(defined(CONFIG_SYS_NO_ICACHE) && defined(CONFIG_SYS_NO_DCACHE)) print_num ("TLB addr", gd->tlb_addr); #endif @@ -352,7 +351,6 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_num ("irq_sp", gd->irq_sp); /* irq stack pointer */ print_num ("sp start ", gd->start_addr_sp); print_num ("FB base ", gd->fb_base); -#endif return 0; } diff --git a/doc/README.arm-relocation b/doc/README.arm-relocation index 2f91d0ac4..c0957c210 100644 --- a/doc/README.arm-relocation +++ b/doc/README.arm-relocation @@ -34,17 +34,10 @@ At lib level: Board.c code is adapted from ppc code -At config level: - - Undefine CONFIG_SYS_ARM_WITHOUT_RELOC - * WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING ** WARNING * Boards which are not fixed to support relocation will be REMOVED! -Eventually, CONFIG_SYS_ARM_WITHOUT_RELOC will disappear and boards -which have to migrated to relocation will disappear too. - ----------------------------------------------------------------------------- For boards which boot from nand_spl, it is possible to save one copy diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt index ffe261513..180ead5d8 100644 --- a/doc/feature-removal-schedule.txt +++ b/doc/feature-removal-schedule.txt @@ -6,33 +6,6 @@ from U-Boot, its corresponding entry should also be removed from this file. --------------------------- -What: CONFIG_SYS_ARM_WITHOUT_RELOC option -When: After Release 2011.03 - -Why: The implementation of U-Boot for the ARM architecture has - been reworked to support relocation. This allows to - efficiently use the same U-Boot binary image on systems with - different RAM sizes, and brings the implementation much more - in line with the code used for example on Power Architecture - systems (eventually allowing to merge into common code). This - seems especailly interesting now that ARM is getting Device - Tree support as well. - - All ARM boards need to be adapted to this new code, which - requires testing on the actual hardware, so this is a task - for the respective board maintainers or other users. - - Please see the commit message of commit f1d2b31 for details: - - http://git.denx.de/?p=u-boot.git;a=commit;h=f1d2b31 - - Support for CONFIG_SYS_ARM_WITHOUT_RELOC will be removed - after release v2011.03; all boards that have not been - converted by then, i. e. that are still broken then, are - considered unmaintained and without interest for the - community and will be removed as well. - ---------------------------- What: CONFIG_NET_MULTI option When: Release 2009-11 diff --git a/include/configs/imx31_litekit.h b/include/configs/imx31_litekit.h index db4ec3d80..502363807 100644 --- a/include/configs/imx31_litekit.h +++ b/include/configs/imx31_litekit.h @@ -146,7 +146,6 @@ #define PHYS_SDRAM_1 CSD0_BASE #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) -#undef CONFIG_SYS_ARM_WITHOUT_RELOC #define CONFIG_SYS_SDRAM_BASE CSD0_BASE #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE diff --git a/include/configs/jornada.h b/include/configs/jornada.h index 4cbbf242b..41b09aad9 100644 --- a/include/configs/jornada.h +++ b/include/configs/jornada.h @@ -28,7 +28,6 @@ #define CONFIG_SA1110 1 /* This is an SA110 CPU */ #define CONFIG_JORNADA700 1 /* on an HP Jornada 700 series */ #define CONFIG_SYS_FLASH_PROTECTION 1 -#define CONFIG_SYS_ARM_WITHOUT_RELOC 1 #define CONFIG_SYS_TEXT_BASE 0xC1F00000 diff --git a/include/configs/vision2.h b/include/configs/vision2.h index 1d971931b..67dca27f7 100644 --- a/include/configs/vision2.h +++ b/include/configs/vision2.h @@ -190,17 +190,12 @@ #define CONFIG_SYS_SDRAM_BASE 0x90000000 #define CONFIG_SYS_INIT_RAM_ADDR 0x1FFE8000 -#ifndef CONFIG_SYS_ARM_WITHOUT_RELOC #define CONFIG_SYS_INIT_RAM_SIZE (64 * 1024) #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_GBL_DATA_OFFSET) #undef CONFIG_SKIP_RELOCATE_UBOOT -#else -#define CONFIG_SKIP_RELOCATE_UBOOT -#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + 0x2000) -#endif #define CONFIG_BOARD_EARLY_INIT_F diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index ccd0af255..d6244183c 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -221,7 +221,7 @@ static int nand_load(struct mtd_info *mtd, unsigned int offs, return 0; } -#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) +#if defined(CONFIG_ARM) void board_init_f (ulong bootflag) { relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, diff --git a/nand_spl/nand_boot_fsl_nfc.c b/nand_spl/nand_boot_fsl_nfc.c index 21ed3fcff..a3f0f6ba5 100644 --- a/nand_spl/nand_boot_fsl_nfc.c +++ b/nand_spl/nand_boot_fsl_nfc.c @@ -263,7 +263,7 @@ static int nand_load(unsigned int from, unsigned int size, unsigned char *buf) return 0; } -#if defined(CONFIG_ARM) && !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) +#if defined(CONFIG_ARM) void board_init_f (ulong bootflag) { relocate_code (CONFIG_SYS_TEXT_BASE - TOTAL_MALLOC_LEN, NULL, |