diff options
| -rw-r--r-- | Makefile | 4 | ||||
| -rw-r--r-- | board/freescale/m54455evb/config.mk | 4 | ||||
| -rw-r--r-- | board/m5282evb/m5282evb.c | 1 | ||||
| -rw-r--r-- | cpu/mcf52x2/start.S | 6 | ||||
| -rw-r--r-- | cpu/mcf532x/start.S | 4 | ||||
| -rw-r--r-- | include/configs/M5253EVBE.h | 2 | ||||
| -rw-r--r-- | include/configs/M5282EVB.h | 2 | ||||
| -rw-r--r-- | include/configs/M5329EVB.h | 2 | ||||
| -rw-r--r-- | include/configs/M54455EVB.h | 36 | ||||
| -rw-r--r-- | lib_m68k/m68k_linux.c | 3 | 
10 files changed, 41 insertions, 23 deletions
| @@ -1733,9 +1733,13 @@ M54455EVB_i66_config :	unconfig  	>include/config.h ; \  	if [ "$${FLASH}" == "INTEL" ] ; then \  		echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ +		echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ +		cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \  		echo "... with INTEL boot..." ; \  	else \  		echo "#define CFG_ATMEL_BOOT"	>> $(obj)include/config.h ; \ +		echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ +		cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \  		echo "... with ATMEL boot..." ; \  	fi; \  	echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \ diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk index ce014edca..b42fcc94c 100644 --- a/board/freescale/m54455evb/config.mk +++ b/board/freescale/m54455evb/config.mk @@ -22,4 +22,6 @@  # MA 02111-1307 USA  # -TEXT_BASE = 0 +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c index 243d6a4d8..7d6d1d623 100644 --- a/board/m5282evb/m5282evb.c +++ b/board/m5282evb/m5282evb.c @@ -89,4 +89,5 @@ long int initdram (int board_type)  		/* Write to the SDRAM Mode Register */  		*(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696;  	} +	return dramsize;  } diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 686e2a533..260a09abf 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -58,7 +58,7 @@ _vectors:  .long	0x00000000		/* Flash offset is 0 until we setup CS0 */  #if defined(CONFIG_R5200)  .long	0x400 -#elif defined(CONFIG_M5282) +#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE)  .long	_start - TEXT_BASE  #else  .long	_START @@ -177,7 +177,11 @@ _after_flashbar_copy:  	 * therefore no VBR to set  	 */  #if !defined(CONFIG_MONITOR_IS_IN_RAM) +#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) +	move.l	#CFG_INT_FLASH_BASE, %d0 +#else  	move.l	#CFG_FLASH_BASE, %d0 +#endif  	movec	%d0, %VBR  #endif diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5cc1c87cd..61be2eac6 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -131,7 +131,7 @@ _start:  	movec	%d0, %VBR  	move.l	#(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 -	movec	%d0, %RAMBAR0 +	movec	%d0, %RAMBAR1  	/* invalidate and disable cache */  	move.l	#0x01000000, %d0		/* Invalidate cache cmd */ @@ -268,7 +268,7 @@ _int_handler:  icache_enable:  	move.l	#0x01000000, %d0		/* Invalidate cache cmd */  	movec	%d0, %CACR			/* Invalidate cache */ -	move.l	#(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0 +	move.l	#(CFG_SDRAM_BASE + 0x1c000), %d0  	movec	%d0, %ACR0			/* Enable cache */  	move.l	#0x80000200, %d0		/* Setup cache mask */ diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 48170e7a3..f5e1b646c 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -146,7 +146,7 @@   * Please note that CFG_SDRAM_BASE _must_ start at 0   */  #define CFG_SDRAM_BASE		0x00000000 -#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */ +#define CFG_SDRAM_SIZE		8	/* SDRAM size in MB */  #ifdef CONFIG_MONITOR_IS_IN_RAM  #define CFG_MONITOR_BASE	0x20000 diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1ea1..7bb9f60f7 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@   * Please note that CFG_SDRAM_BASE _must_ start at 0   */  #define CFG_SDRAM_BASE		0x00000000 -#define	CFG_SDRAM_SIZE		8	/* SDRAM size in MB */ +#define	CFG_SDRAM_SIZE		16	/* SDRAM size in MB */  #define CFG_FLASH_BASE		0xffe00000  #define	CFG_INT_FLASH_BASE	0xf0000000  #define CFG_INT_FLASH_ENABLE	0x21 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b160505..47d74a3c3 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@   * Please note that CFG_SDRAM_BASE _must_ start at 0   */  #define CFG_SDRAM_BASE		0x40000000 -#define CFG_SDRAM_SIZE		16	/* SDRAM size in MB */ +#define CFG_SDRAM_SIZE		32	/* SDRAM size in MB */  #define CFG_SDRAM_CFG1		0x53722730  #define CFG_SDRAM_CFG2		0x56670000  #define CFG_SDRAM_CTRL		0xE1092000 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 6f4859c23..ba050cb7e 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -27,8 +27,8 @@   * board/config.h - configuration options, board specific   */ -#ifndef _JAMICA54455_H -#define _JAMICA54455_H +#ifndef _M54455EVB_H +#define _M54455EVB_H  /*   * High Level Configuration Options @@ -75,7 +75,7 @@  #define CONFIG_CMD_MISC  #define CONFIG_CMD_MII  #define CONFIG_CMD_NET -#define CONFIG_CMD_PCI +#undef CONFIG_CMD_PCI  #define CONFIG_CMD_PING  #define CONFIG_CMD_REGINFO @@ -129,8 +129,8 @@  	"u-boot=u-boot.bin\0"			\  	"load=tftp ${loadaddr) ${u-boot}\0"	\  	"upd=run load; run prog\0"		\ -	"prog=prot off 0 2ffff;"		\ -	"era 0 2ffff;"				\ +	"prog=prot off 4000000 402ffff;"		\ +	"era 4000000 402ffff;"				\  	"cp.b ${loadaddr} 0 ${filesize};"	\  	"save\0"				\  	"" @@ -174,6 +174,7 @@  #define CFG_IMMR		CFG_MBAR  /* PCI */ +#ifdef CONFIG_CMD_PCI  #define CONFIG_PCI		1  #define CFG_PCI_MEM_BUS		0xA0000000 @@ -187,6 +188,7 @@  #define CFG_PCI_CFG_BUS		0xB0000000  #define CFG_PCI_CFG_PHYS	CFG_PCI_CFG_BUS  #define CFG_PCI_CFG_SIZE	0x01000000 +#endif  /* FPGA - Spartan 2 */  /* experiment @@ -268,8 +270,6 @@  /* Configuration for environment   * Environment is embedded in u-boot in the second sector of the flash   */ -#define CFG_ENV_OFFSET		0x4000 -#define CFG_ENV_SECT_SIZE	0x2000  #define CFG_ENV_IS_IN_FLASH	1  #define CONFIG_ENV_OVERWRITE	1  #undef CFG_ENV_IS_EMBEDDED @@ -278,13 +278,17 @@   * FLASH organization   */  #ifdef CFG_ATMEL_BOOT -#	define CFG_FLASH_BASE		0 +#	define CFG_FLASH_BASE		CFG_CS0_BASE	  #	define CFG_FLASH0_BASE		CFG_CS0_BASE  #	define CFG_FLASH1_BASE		CFG_CS1_BASE +#	define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x4000) +#	define CFG_ENV_SECT_SIZE	0x2000  #else  #	define CFG_FLASH_BASE		CFG_FLASH0_BASE  #	define CFG_FLASH0_BASE		CFG_CS1_BASE  #	define CFG_FLASH1_BASE		CFG_CS0_BASE +#	define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x60000) +#	define CFG_ENV_SECT_SIZE	0x20000  #endif  /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system @@ -328,9 +332,9 @@   * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.   */  #ifdef CFG_ATMEL_BOOT -#	define CONFIG_JFFS2_DEV		"nor0" +#	define CONFIG_JFFS2_DEV		"nor1"  #	define CONFIG_JFFS2_PART_SIZE	0x01000000 -#	define CONFIG_JFFS2_PART_OFFSET	CFG_FLASH1_BASE +#	define CONFIG_JFFS2_PART_OFFSET	(CFG_FLASH1_BASE + 0x500000)  #else  #	define CONFIG_JFFS2_DEV		"nor0"  #	define CONFIG_JFFS2_PART_SIZE	(0x01000000 - 0x500000) @@ -356,20 +360,20 @@  #ifdef CFG_ATMEL_BOOT   /* Atmel Flash */ -#define CFG_CS0_BASE		0 +#define CFG_CS0_BASE		0x04000000  #define CFG_CS0_MASK		0x00070001  #define CFG_CS0_CTRL		0x00001140  /* Intel Flash */ -#define CFG_CS1_BASE		0x04000000 +#define CFG_CS1_BASE		0x00000000  #define CFG_CS1_MASK		0x01FF0001 -#define CFG_CS1_CTRL		0x003F3D60 +#define CFG_CS1_CTRL		0x00000D60  #define CFG_ATMEL_BASE		CFG_CS0_BASE  #else  /* Intel Flash */ -#define CFG_CS0_BASE		0 +#define CFG_CS0_BASE		0x00000000  #define CFG_CS0_MASK		0x01FF0001 -#define CFG_CS0_CTRL		0x003F3D60 +#define CFG_CS0_CTRL		0x00000D60   /* Atmel Flash */  #define CFG_CS1_BASE		0x04000000  #define CFG_CS1_MASK		0x00070001 @@ -388,4 +392,4 @@  #define CFG_CS3_MASK		0x00070001  #define CFG_CS3_CTRL		0x00000020 -#endif				/* _JAMICA54455_H */ +#endif				/* _M54455EVB_H */ diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c index bea97441b..cc974c2d6 100644 --- a/lib_m68k/m68k_linux.c +++ b/lib_m68k/m68k_linux.c @@ -26,6 +26,7 @@  #include <image.h>  #include <zlib.h>  #include <bzlib.h> +#include <watchdog.h>  #include <environment.h>  #include <asm/byteorder.h> @@ -36,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR;  #define LINUX_MAX_ENVS		256  #define LINUX_MAX_ARGS		256 +#define CHUNKSZ			(64 * 1024) +  #ifdef CONFIG_SHOW_BOOT_PROGRESS  # include <status_led.h>  # define SHOW_BOOT_PROGRESS(arg)	show_boot_progress(arg) |