diff options
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/psc.c | 20 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 2 | 
2 files changed, 17 insertions, 5 deletions
| diff --git a/arch/arm/cpu/arm926ejs/davinci/psc.c b/arch/arm/cpu/arm926ejs/davinci/psc.c index 707fa47e3..3e925181e 100644 --- a/arch/arm/cpu/arm926ejs/davinci/psc.c +++ b/arch/arm/cpu/arm926ejs/davinci/psc.c @@ -46,7 +46,7 @@   */  /* Works on Always On power domain only (no PD argument) */ -void lpsc_on(unsigned int id) +static void lpsc_transition(unsigned int id, unsigned int state)  {  	dv_reg_p mdstat, mdctl, ptstat, ptcmd;  #ifdef CONFIG_SOC_DA8XX @@ -83,10 +83,10 @@ void lpsc_on(unsigned int id)  	while (readl(ptstat) & 0x01)  		continue; -	if ((readl(mdstat) & PSC_MDSTAT_STATE) == 0x03) -		return; /* Already on and enabled */ +	if ((readl(mdstat) & PSC_MDSTAT_STATE) == state) +		return; /* Already in that state */ -	writel(readl(mdctl) | 0x03, mdctl); +	writel((readl(mdctl) & ~PSC_MDCTL_NEXT) | state, mdctl);  	switch (id) {  #ifdef CONFIG_SOC_DM644X @@ -114,10 +114,20 @@ void lpsc_on(unsigned int id)  	while (readl(ptstat) & 0x01)  		continue; -	while ((readl(mdstat) & PSC_MDSTAT_STATE) != 0x03) +	while ((readl(mdstat) & PSC_MDSTAT_STATE) != state)  		continue;  } +void lpsc_on(unsigned int id) +{ +	lpsc_transition(id, 0x03); +} + +void lpsc_syncreset(unsigned int id) +{ +	lpsc_transition(id, 0x01); +} +  /* Not all DaVinci chips have a DSP power domain. */  #ifdef CONFIG_SOC_DM644X diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 431e87bac..9699892a6 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -292,6 +292,7 @@ typedef volatile unsigned int *	dv_reg_p;  #endif /* CONFIG_SOC_DA8XX */  void lpsc_on(unsigned int id); +void lpsc_syncreset(unsigned int id);  void dsp_on(void);  void davinci_enable_uart0(void); @@ -358,6 +359,7 @@ struct davinci_psc_regs {  #endif /* CONFIG_SOC_DA8XX */  #define PSC_MDSTAT_STATE		0x3f +#define PSC_MDCTL_NEXT			0x07  #ifndef CONFIG_SOC_DA8XX |