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-rw-r--r--arch/arm/cpu/pxa/pxa2xx.c1
-rw-r--r--board/icpdas/lp8x4x/lp8x4x.c51
-rw-r--r--include/configs/balloon3.h10
-rw-r--r--include/configs/lp8x4x.h15
-rw-r--r--include/configs/palmld.h10
-rw-r--r--include/configs/palmtc.h10
-rw-r--r--include/configs/scb9328.h6
-rw-r--r--include/configs/zipitz2.h10
8 files changed, 53 insertions, 60 deletions
diff --git a/arch/arm/cpu/pxa/pxa2xx.c b/arch/arm/cpu/pxa/pxa2xx.c
index c9a7d4539..7e861e26d 100644
--- a/arch/arm/cpu/pxa/pxa2xx.c
+++ b/arch/arm/cpu/pxa/pxa2xx.c
@@ -279,6 +279,7 @@ void reset_cpu(ulong ignored)
tmp = readl(OSCR);
tmp += 0x1000;
writel(tmp, OSMR3);
+ writel(MDREFR_SLFRSH, MDREFR);
for (;;)
;
diff --git a/board/icpdas/lp8x4x/lp8x4x.c b/board/icpdas/lp8x4x/lp8x4x.c
index 92dd4ff97..a136dc4c3 100644
--- a/board/icpdas/lp8x4x/lp8x4x.c
+++ b/board/icpdas/lp8x4x/lp8x4x.c
@@ -61,15 +61,24 @@ int board_mmc_init(bd_t *bis)
#ifdef CONFIG_CMD_USB
int board_usb_init(int index, enum usb_init_type init)
{
- writel((UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
- ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
- UHCHR);
+ if (index !=0 || init != USB_INIT_HOST)
+ return -1;
+
+ writel(readl(CKEN) | CKEN10_USBHOST, CKEN);
+
+ writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
+ udelay(11);
+ writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
while (readl(UHCHR) & UHCHR_FSBIR)
continue; /* required by checkpath.pl */
+ writel(readl(UHCHR) & ~UHCHR_SSEP0, UHCHR);
+ writel(readl(UHCRHDA) & ~(0x1000), UHCRHDA);
+ writel(readl(UHCRHDA) | 0x800, UHCRHDA);
+
writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
@@ -83,19 +92,10 @@ int board_usb_init(int index, enum usb_init_type init)
/* Set port power control mask bits, only 3 ports. */
writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
- /* enable port 2 */
- writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
- UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
-
- return 0;
-}
-
-int board_usb_cleanup(int index, enum usb_init_type init)
-{
return 0;
}
-void usb_board_stop(void)
+int usb_board_stop(void)
{
writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
udelay(11);
@@ -104,32 +104,25 @@ void usb_board_stop(void)
writel(readl(UHCCOMS) | 1, UHCCOMS);
udelay(10);
+ writel(readl(UHCHR) | UHCHR_SSEP0 | UHCHR_SSE, UHCHR);
+
writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
- return;
+ return 0;
}
-#endif
-#ifdef CONFIG_DRIVER_DM9000
-void lp8x4x_eth1_mac_init(void)
+int board_usb_cleanup(int index, enum usb_init_type init)
{
- u8 eth1addr[8];
- int i;
- u8 reg;
-
- eth_getenv_enetaddr_by_index("eth", 1, eth1addr);
- if (!is_valid_ether_addr(eth1addr))
- return;
+ if (index !=0 || init != USB_INIT_HOST)
+ return -1;
- for (i = 0, reg = 0x10; i < 6; i++, reg++) {
- writeb(reg, (u8 *)(DM9000_IO_2));
- writeb(eth1addr[i], (u8 *)(DM9000_DATA_2));
- }
+ return usb_board_stop();
}
+#endif
+#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(bd_t *bis)
{
- lp8x4x_eth1_mac_init();
return dm9000_initialize(bis);
}
#endif
diff --git a/include/configs/balloon3.h b/include/configs/balloon3.h
index 12df45b0f..d3d62744f 100644
--- a/include/configs/balloon3.h
+++ b/include/configs/balloon3.h
@@ -85,7 +85,7 @@
* Clock Configuration
*/
#undef CONFIG_SYS_CLKS_IN_HZ
-#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x290 /* 520MHz */
/*
@@ -128,10 +128,10 @@
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
+#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
+#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_ENV_IS_IN_FLASH
#else
diff --git a/include/configs/lp8x4x.h b/include/configs/lp8x4x.h
index 68e1a974d..8e58fea3b 100644
--- a/include/configs/lp8x4x.h
+++ b/include/configs/lp8x4x.h
@@ -20,18 +20,18 @@
#define CONFIG_SYS_MALLOC_LEN (128*1024)
#define CONFIG_ARCH_CPU_INIT
#define CONFIG_BOOTCOMMAND \
- "bootm 80000;"
+ "bootm 80000 - 240000;"
#define CONFIG_BOOTARGS \
- "console=ttySA0,115200 mem=128M root=/dev/mmcblk0p1 rw" \
- "init=/sbin/init rootfstype=ext3"
+ "console=ttyS0,115200 mem=128M root=/dev/mmcblk0p1 rw" \
+ "init=/sbin/init rootfstype=ext4 rootwait"
#define CONFIG_TIMESTAMP
#define CONFIG_BOOTDELAY 2 /* Autoboot delay */
#define CONFIG_CMDLINE_TAG
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_LZMA /* LZMA compression support */
-#undef CONFIG_OF_LIBFDT
+#define CONFIG_OF_LIBFDT
/*
* Serial Console Configuration
@@ -101,7 +101,7 @@
*/
#define CONFIG_SYS_HUSH_PARSER 1
-#undef CONFIG_SYS_LONGHELP
+#define CONFIG_SYS_LONGHELP
#ifdef CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT "$ "
#else
@@ -144,7 +144,7 @@
#define CONFIG_ENV_SECT_SIZE 0x40000
#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
-#define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
+#define PHYS_FLASH_2 0x04000000 /* Flash Bank #2 */
#define CONFIG_SYS_FLASH_CFI
#define CONFIG_FLASH_CFI_DRIVER 1
@@ -184,7 +184,7 @@
#define CONFIG_SYS_GAFR1_L_VAL 0x999a955a
#define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a00a
#define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
-#define CONFIG_SYS_GAFR2_U_VAL 0x55f0a402
+#define CONFIG_SYS_GAFR2_U_VAL 0x55f9a402
#define CONFIG_SYS_GAFR3_L_VAL 0x540a950c
#define CONFIG_SYS_GAFR3_U_VAL 0x00001599
@@ -232,7 +232,6 @@
*/
#ifdef CONFIG_CMD_USB
#define CONFIG_USB_OHCI_NEW
-#define CONFIG_SYS_USB_OHCI_CPU_INIT
#define CONFIG_SYS_USB_OHCI_BOARD_INIT
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
diff --git a/include/configs/palmld.h b/include/configs/palmld.h
index 84bc9ed81..a5b6e3aa9 100644
--- a/include/configs/palmld.h
+++ b/include/configs/palmld.h
@@ -116,7 +116,7 @@
* Clock Configuration
*/
#undef CONFIG_SYS_CLKS_IN_HZ
-#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x210 /* 416MHz ; N=2,L=16 */
/*
@@ -159,10 +159,10 @@
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-#define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_LOCK_TOUT (25*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (25*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
+#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
+#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_ENV_IS_IN_FLASH 1
diff --git a/include/configs/palmtc.h b/include/configs/palmtc.h
index 661101ccb..7303e1c31 100644
--- a/include/configs/palmtc.h
+++ b/include/configs/palmtc.h
@@ -118,7 +118,7 @@
* Clock Configuration
*/
#undef CONFIG_SYS_CLKS_IN_HZ
-#define CONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */
/*
@@ -156,10 +156,10 @@
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
+#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
+#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
#define CONFIG_SYS_FLASH_PROTECTION
#define CONFIG_ENV_IS_IN_FLASH 1
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index a09310c88..c0048aca7 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -69,7 +69,7 @@
#define CONFIG_SYS_MEMTEST_START 0x08100000 /* memtest test area */
#define CONFIG_SYS_MEMTEST_END 0x08F00000
-#define CONFIG_SYS_HZ 3686400 /* incrementer freq: 3.6864 MHz */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x141 /* core clock - register value */
#define CONFIG_BAUDRATE 115200
@@ -143,8 +143,8 @@
now.*/
#undef CONFIG_SYS_FLASH_CFI
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Erase operation */
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) /* timeout for Write operation */
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* timeout for Erase operation */
+#define CONFIG_SYS_FLASH_WRITE_TOUT 240000 /* timeout for Write operation */
#define CONFIG_SYS_FLASH_BASE SCB9328_FLASH_BASE
diff --git a/include/configs/zipitz2.h b/include/configs/zipitz2.h
index 52a745e60..904f3b0fb 100644
--- a/include/configs/zipitz2.h
+++ b/include/configs/zipitz2.h
@@ -139,7 +139,7 @@ unsigned char zipitz2_spi_read(void);
* Clock Configuration
*/
#undef CONFIG_SYS_CLKS_IN_HZ
-#define CONFIG_SYS_HZ 3250000 /* Timer @ 3250000 Hz */
+#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x190 /* standard setting for 312MHz; L=16, N=1.5, A=0, SDCLK!=SystemBus */
/*
@@ -186,10 +186,10 @@ unsigned char zipitz2_spi_read(void);
#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
-#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ)
-#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ)
+#define CONFIG_SYS_FLASH_ERASE_TOUT 240000
+#define CONFIG_SYS_FLASH_WRITE_TOUT 240000
+#define CONFIG_SYS_FLASH_LOCK_TOUT 240000
+#define CONFIG_SYS_FLASH_UNLOCK_TOUT 240000
#define CONFIG_SYS_FLASH_PROTECTION
/*
generated by cgit v1.2.3-70-g09d2 (git 2.51.2) at 2025-10-31 01:56:14 +0000