diff options
50 files changed, 870 insertions, 384 deletions
@@ -404,9 +404,21 @@ LIST_85xx=" \ P2020DS \ P2020DS_36BIT \ P1011RDB \ + P1011RDB_NAND \ + P1011RDB_SDCARD \ + P1011RDB_SPIFLASH \ P1020RDB \ + P1020RDB_NAND \ + P1020RDB_SDCARD \ + P1020RDB_SPIFLASH \ P2010RDB \ + P2010RDB_NAND \ + P2010RDB_SDCARD \ + P2010RDB_SPIFLASH \ P2020RDB \ + P2020RDB_NAND \ + P2020RDB_SDCARD \ + P2020RDB_SPIFLASH \ PM854 \ PM856 \ sbc8540 \ @@ -501,6 +501,9 @@ unconfig: $(obj)board/*/config.tmp $(obj)board/*/*/config.tmp \ $(obj)include/autoconf.mk $(obj)include/autoconf.mk.dep +%: %_config + $(MAKE) + #======================================================================== # PowerPC #======================================================================== @@ -2511,9 +2514,21 @@ P2020DS_config: unconfig @$(MKCONFIG) -t $(@:_config=) P2020DS ppc mpc85xx p2020ds freescale P1011RDB_config \ +P1011RDB_NAND_config \ +P1011RDB_SDCARD_config \ +P1011RDB_SPIFLASH_config \ P1020RDB_config \ +P1020RDB_NAND_config \ +P1020RDB_SDCARD_config \ +P1020RDB_SPIFLASH_config \ P2010RDB_config \ -P2020RDB_config: unconfig +P2010RDB_NAND_config \ +P2010RDB_SDCARD_config \ +P2010RDB_SPIFLASH_config \ +P2020RDB_config \ +P2020RDB_NAND_config \ +P2020RDB_SDCARD_config \ +P2020RDB_SPIFLASH_config: unconfig @$(MKCONFIG) -t $(@:_config=) P1_P2_RDB ppc mpc85xx p1_p2_rdb freescale PM854_config: unconfig @@ -3542,10 +3557,6 @@ BFIN_BOARDS += ibf-dsp561 $(BFIN_BOARDS:%=%_config) : unconfig @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=) -$(BFIN_BOARDS): - $(MAKE) $@_config - $(MAKE) - #======================================================================== # AVR32 #======================================================================== @@ -2305,6 +2305,11 @@ The following definitions that deal with the placement and management of environment data (variable area); in general, we support the following configurations: +- CONFIG_BUILD_ENVCRC: + + Builds up envcrc with the target environment so that external utils + may easily extract it and embed it in final U-Boot images. + - CONFIG_ENV_IS_IN_FLASH: Define this if the environment is in flash memory. diff --git a/board/amcc/sequoia/Makefile b/board/amcc/sequoia/Makefile index a5d501079..8da3bd511 100644 --- a/board/amcc/sequoia/Makefile +++ b/board/amcc/sequoia/Makefile @@ -25,9 +25,11 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a -COBJS = $(BOARD).o cmd_sequoia.o sdram.o +COBJS-y = $(BOARD).o sdram.o +COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o SOBJS = init.o +COBJS := $(COBJS-y) SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) SOBJS := $(addprefix $(obj),$(SOBJS)) diff --git a/board/amcc/sequoia/chip_config.c b/board/amcc/sequoia/chip_config.c new file mode 100644 index 000000000..036de9ffe --- /dev/null +++ b/board/amcc/sequoia/chip_config.c @@ -0,0 +1,122 @@ +/* + * (C) Copyright 2009 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#include <common.h> +#include <asm/ppc4xx_config.h> + +struct ppc4xx_config ppc4xx_config_val[] = { + { + "333-133-nor", "NOR CPU: 333 PLB: 133 OPB: 66 EBC: 66", + { + 0x84, 0x70, 0xa2, 0xa6, 0x05, 0x57, 0xa0, 0x10, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "333-166-nor", "NOR CPU: 333 PLB: 166 OPB: 83 EBC: 55", + { + 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xa0, 0x30, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "333-166-nand", "NAND CPU: 333 PLB: 166 OPB: 83 EBC: 55", + { + 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xd0, 0x30, + 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "400-133-nor", "NOR CPU: 400 PLB: 133 OPB: 66 EBC: 66", + { + 0x86, 0x78, 0xc2, 0xc6, 0x05, 0x57, 0xa0, 0x30, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "400-160-nor", "NOR CPU: 400 PLB: 160 OPB: 80 EBC: 53", + { + 0x86, 0x78, 0xc2, 0xa6, 0x05, 0xd7, 0xa0, 0x10, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "416-166-nor", "NOR CPU: 416 PLB: 166 OPB: 83 EBC: 55", + { + 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xa0, 0x10, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "416-166-nand", "NAND CPU: 416 PLB: 166 OPB: 83 EBC: 55", + { + 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xd0, 0x10, + 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "500-166-nor", "NOR CPU: 500 PLB: 166 OPB: 83 EBC: 55", + { + 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xa0, 0x30, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "500-166-nand", "NAND CPU: 500 PLB: 166 OPB: 83 EBC: 55", + { + 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xd0, 0x30, + 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "533-133-nor", "NOR CPU: 533 PLB: 133 OPB: 66 EBC: 66", + { + 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "667-133-nor", "NOR CPU: 667 PLB: 133 OPB: 66 EBC: 66", + { + 0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "667-166-nor", "NOR CPU: 667 PLB: 166 OPB: 83 EBC: 55", + { + 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, + 0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 + } + }, + { + "667-166-nand", "NAND CPU: 667 PLB: 166 OPB: 83 EBC: 55", + { + 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xd0, 0x30, + 0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00 + } + }, +}; + +int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val); diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c deleted file mode 100644 index 01dd97c84..000000000 --- a/board/amcc/sequoia/cmd_sequoia.c +++ /dev/null @@ -1,231 +0,0 @@ -/* - * (C) Copyright 2007 - * Stefan Roese, DENX Software Engineering, sr@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -#include <common.h> -#include <command.h> -#include <i2c.h> -#include <asm/io.h> - -/* - * There are 2 versions of production Sequoia & Rainier platforms. - * The primary difference is the reference clock. Those with - * 33333333 reference clocks will also have 667MHz rated - * processors. Not enough differences to have unique clock - * settings. - * - * NOR and NAND boot options change bytes 6, 7, 8, 9, 11. The - * values are independent of the rest of the clock settings. - * - * All Sequoias & Rainiers select from two possible EEPROMs in Boot - * Config F. One for 33MHz PCI, one for 66MHz PCI. The following - * values are for the 33MHz PCI configuration. Byte 5 (0 base) is - * the only value affected for a 33MHz PCI and simply needs a | 0x08. - */ - -#define NAND_COMPATIBLE 0x01 -#define NOR_COMPATIBLE 0x02 - -/* check with Stefan on CONFIG_SYS_I2C_EEPROM_ADDR */ -#define I2C_EEPROM_ADDR 0x52 - -static char *config_labels[] = { - "CPU: 333 PLB: 133 OPB: 66 EBC: 66", - "CPU: 333 PLB: 166 OPB: 83 EBC: 55", - "CPU: 400 PLB: 133 OPB: 66 EBC: 66", - "CPU: 400 PLB: 160 OPB: 80 EBC: 53", - "CPU: 416 PLB: 166 OPB: 83 EBC: 55", - "CPU: 500 PLB: 166 OPB: 83 EBC: 55", - "CPU: 533 PLB: 133 OPB: 66 EBC: 66", - "CPU: 667 PLB: 133 OPB: 66 EBC: 66", - "CPU: 667 PLB: 166 OPB: 83 EBC: 55", - NULL -}; - -static u8 boot_configs[][17] = { - { - (NOR_COMPATIBLE), - 0x84, 0x70, 0xa2, 0xa6, 0x05, 0x57, 0xa0, 0x10, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NAND_COMPATIBLE | NOR_COMPATIBLE), - 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xa0, 0x30, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NOR_COMPATIBLE), - 0x86, 0x78, 0xc2, 0xc6, 0x05, 0x57, 0xa0, 0x30, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NOR_COMPATIBLE), - 0x86, 0x78, 0xc2, 0xa6, 0x05, 0xd7, 0xa0, 0x10, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NAND_COMPATIBLE | NOR_COMPATIBLE), - 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xa0, 0x10, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NAND_COMPATIBLE | NOR_COMPATIBLE), - 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xa0, 0x30, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NOR_COMPATIBLE), - 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NOR_COMPATIBLE), - 0x87, 0x78, 0xa2, 0x56, 0x09, 0x57, 0xa0, 0x30, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - (NAND_COMPATIBLE | NOR_COMPATIBLE), - 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40, - 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00 - }, - { - 0, - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 - } -}; - -/* - * Bytes 6,8,9,11 change for NAND boot - */ -static u8 nand_boot[] = { - 0xd0, 0xa0, 0x68, 0x58 -}; - -static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - u8 *buf, bNAND; - int x, y, nbytes, selcfg; - extern char console_buffer[]; - - if (argc < 2) { - cmd_usage(cmdtp); - return 1; - } - - if ((strcmp(argv[1], "nor") != 0) && - (strcmp(argv[1], "nand") != 0)) { - printf("Unsupported boot-device - only nor|nand support\n"); - return 1; - } - - /* set the nand flag based on provided input */ - if ((strcmp(argv[1], "nand") == 0)) - bNAND = 1; - else - bNAND = 0; - - printf("Available configurations: \n\n"); - - if (bNAND) { - for(x = 0, y = 0; boot_configs[x][0] != 0; x++) { - /* filter on nand compatible */ - if (boot_configs[x][0] & NAND_COMPATIBLE) { - printf(" %d - %s\n", (y+1), config_labels[x]); - y++; - } - } - } else { - for(x = 0, y = 0; boot_configs[x][0] != 0; x++) { - /* filter on nor compatible */ - if (boot_configs[x][0] & NOR_COMPATIBLE) { - printf(" %d - %s\n", (y+1), config_labels[x]); - y++; - } - } - } - - do { - nbytes = readline(" Selection [1-x / quit]: "); - - if (nbytes) { - if (strcmp(console_buffer, "quit") == 0) - return 0; - selcfg = simple_strtol(console_buffer, NULL, 10); - if ((selcfg < 1) || (selcfg > y)) - nbytes = 0; - } - } while (nbytes == 0); - - - y = (selcfg - 1); - - for (x = 0; boot_configs[x][0] != 0; x++) { - if (bNAND) { - if (boot_configs[x][0] & NAND_COMPATIBLE) { - if (y > 0) - y--; - else if (y < 1) - break; - } - } else { - if (boot_configs[x][0] & NOR_COMPATIBLE) { - if (y > 0) - y--; - else if (y < 1) - break; - } - } - } - - buf = &boot_configs[x][1]; - - if (bNAND) { - buf[6] = nand_boot[0]; - buf[8] = nand_boot[1]; - buf[9] = nand_boot[2]; - buf[11] = nand_boot[3]; - } - - /* check CPLD register +5 for PCI 66MHz flag */ - if ((in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & CONFIG_SYS_BCSR5_PCI66EN) == 0) - /* - * PLB-to-PCI divisor = 3 for 33MHz sync PCI - * instead of 2 for 66MHz systems - */ - buf[5] |= 0x08; - - if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0) - printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR); - udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000); - - printf("Done\n"); - printf("Please power-cycle the board for the changes to take effect\n"); - - return 0; -} - -U_BOOT_CMD( - bootstrap, 2, 0, do_bootstrap, - "program the I2C bootstrap EEPROM", - "<nand|nor> - strap to boot from NAND or NOR flash" -); diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c index d42c80253..00f640872 100644 --- a/board/amcc/sequoia/sequoia.c +++ b/board/amcc/sequoia/sequoia.c @@ -40,6 +40,15 @@ extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH ch extern void __ft_board_setup(void *blob, bd_t *bd); ulong flash_get_size(ulong base, int banknum); +static inline u32 get_async_pci_freq(void) +{ + if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & + CONFIG_SYS_BCSR5_PCI66EN) + return 66666666; + else + return 33333333; +} + int board_early_init_f(void) { u32 sdr0_cust0; @@ -76,6 +85,9 @@ int board_early_init_f(void) mtdcr(UIC2VR, 0x00000000); /* int31 highest, base=0x000 */ mtdcr(UIC2SR, 0xffffffff); /* clear all */ + /* Check and reconfigure the PCI sync clock if necessary */ + ppc4xx_pci_sync_clock_config(get_async_pci_freq()); + /* 50MHz tmrclk */ out_8((u8 *) CONFIG_SYS_BCSR_BASE + 0x04, 0x00); @@ -319,7 +331,7 @@ int checkboard(void) { char *s = getenv("serial#"); u8 rev; - u8 val; + u32 clock = get_async_pci_freq(); #ifdef CONFIG_440EPX printf("Board: Sequoia - AMCC PPC440EPx Evaluation Board"); @@ -328,8 +340,7 @@ int checkboard(void) #endif rev = in_8((void *)(CONFIG_SYS_BCSR_BASE + 0)); - val = in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & CONFIG_SYS_BCSR5_PCI66EN; - printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); + printf(", Rev. %X, PCI-Async=%d MHz", rev, clock / 1000000); if (s != NULL) { puts(", serial# "); @@ -337,6 +348,15 @@ int checkboard(void) } putc('\n'); + /* + * Reconfiguration of the PCI sync clock is already done, + * now check again if everything is in range: + */ + if (ppc4xx_pci_sync_clock_config(clock)) { + printf("ERROR: PCI clocking incorrect (async=%d " + "sync=%ld)!\n", clock, get_PCI_freq()); + } + return (0); } diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c index 7ceccfa9b..ccbeb0e7a 100644 --- a/board/amcc/yosemite/yosemite.c +++ b/board/amcc/yosemite/yosemite.c @@ -33,6 +33,15 @@ DECLARE_GLOBAL_DATA_PTR; extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */ +static inline u32 get_async_pci_freq(void) +{ + if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & + CONFIG_SYS_BCSR5_PCI66EN) + return 66666666; + else + return 33333333; +} + int board_early_init_f(void) { register uint reg; @@ -106,6 +115,9 @@ int board_early_init_f(void) mtsdr(SDR0_PFC0, 0x00003e00); /* Pin function */ mtsdr(SDR0_PFC1, 0x00048000); /* Pin function: UART0 has 4 pins */ + /* Check and reconfigure the PCI sync clock if necessary */ + ppc4xx_pci_sync_clock_config(get_async_pci_freq()); + /*clear tmrclk divisor */ *(unsigned char *)(CONFIG_SYS_BCSR_BASE | 0x04) = 0x00; @@ -178,7 +190,7 @@ int checkboard(void) { char *s = getenv("serial#"); u8 rev; - u8 val; + u32 clock = get_async_pci_freq(); #ifdef CONFIG_440EP printf("Board: Yosemite - AMCC PPC440EP Evaluation Board"); @@ -187,8 +199,7 @@ int checkboard(void) #endif rev = in_8((void *)(CONFIG_SYS_BCSR_BASE + 0)); - val = in_8((void *)(CONFIG_SYS_BCSR_BASE + 5)) & CONFIG_SYS_BCSR5_PCI66EN; - printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33); + printf(", Rev. %X, PCI-Async=%d MHz", rev, clock / 1000000); if (s != NULL) { puts(", serial# "); @@ -196,6 +207,15 @@ int checkboard(void) } putc('\n'); + /* + * Reconfiguration of the PCI sync clock is already done, + * now check again if everything is in range: + */ + if (ppc4xx_pci_sync_clock_config(clock)) { + printf("ERROR: PCI clocking incorrect (async=%d " + "sync=%ld)!\n", clock, get_PCI_freq()); + } + return (0); } diff --git a/board/freescale/p1_p2_rdb/config.mk b/board/freescale/p1_p2_rdb/config.mk index a56b5366b..0f7a0487e 100644 --- a/board/freescale/p1_p2_rdb/config.mk +++ b/board/freescale/p1_p2_rdb/config.mk @@ -24,8 +24,27 @@ # p1_p2rdb board # +ifndef NAND_SPL +ifeq ($(CONFIG_MK_NAND), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +LDSCRIPT := $(TOPDIR)/cpu/$(CPU)/u-boot-nand.lds +endif +endif + +ifeq ($(CONFIG_MK_SDCARD), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + +ifeq ($(CONFIG_MK_SPIFLASH), y) +TEXT_BASE = $(CONFIG_RAMBOOT_TEXT_BASE) +RESET_VECTOR_ADDRESS = 0xf8fffffc +endif + ifndef TEXT_BASE TEXT_BASE = 0xeff80000 endif +ifndef RESET_VECTOR_ADDRESS RESET_VECTOR_ADDRESS = 0xeffffffc +endif diff --git a/board/freescale/p1_p2_rdb/tlb.c b/board/freescale/p1_p2_rdb/tlb.c index cf9bffed5..0009913ea 100644 --- a/board/freescale/p1_p2_rdb/tlb.c +++ b/board/freescale/p1_p2_rdb/tlb.c @@ -78,6 +78,16 @@ struct fsl_e_tlb_entry tlb_table[] = { MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, 0, 6, BOOKE_PAGESZ_1M, 1), +#if defined(CONFIG_SYS_RAMBOOT) && defined(CONFIG_SYS_INIT_L2_ADDR) + /* *I*G - L2SRAM */ + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR, CONFIG_SYS_INIT_L2_ADDR_PHYS, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 7, BOOKE_PAGESZ_256K, 1), + SET_TLB_ENTRY(1, CONFIG_SYS_INIT_L2_ADDR + 0x40000, + CONFIG_SYS_INIT_L2_ADDR_PHYS + 0x40000, + MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G, + 0, 8, BOOKE_PAGESZ_256K, 1), +#endif }; int num_tlb_entries = ARRAY_SIZE(tlb_table); diff --git a/board/sbc8641d/law.c b/board/sbc8641d/law.c index 760c6935d..d20fa51c3 100644 --- a/board/sbc8641d/law.c +++ b/board/sbc8641d/law.c @@ -44,14 +44,17 @@ struct law_entry law_table[] = { +#if !defined(CONFIG_SPD_EEPROM) SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_1), + SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000, + LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), +#endif SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1), SET_LAW(CONFIG_SYS_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2), SET_LAW(0xf8000000, LAW_SIZE_2M, LAW_TRGT_IF_LBC), SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_1), SET_LAW(CONFIG_SYS_PCI2_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI_2), SET_LAW(0xfe000000, LAW_SIZE_32M, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_256M, LAW_TRGT_IF_DDR_2), SET_LAW(CONFIG_SYS_RIO_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_RIO) }; diff --git a/common/Makefile b/common/Makefile index 3781738e1..a92a75fe9 100644 --- a/common/Makefile +++ b/common/Makefile @@ -52,9 +52,6 @@ COBJS-y += env_common.o COBJS-$(CONFIG_ENV_IS_IN_DATAFLASH) += env_dataflash.o COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_eeprom.o COBJS-$(CONFIG_ENV_IS_EMBEDDED) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_EEPROM) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_embedded.o -COBJS-$(CONFIG_ENV_IS_IN_NVRAM) += env_embedded.o COBJS-$(CONFIG_ENV_IS_IN_FLASH) += env_flash.o COBJS-$(CONFIG_ENV_IS_IN_MG_DISK) += env_mgdisk.o COBJS-$(CONFIG_ENV_IS_IN_NAND) += env_nand.o diff --git a/common/cmd_mem.c b/common/cmd_mem.c index 98508003b..a34b342f0 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -631,7 +631,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) vu_long *addr, *start, *end; ulong val; ulong readback; - int rcode = 0; + ulong errs = 0; int iterations = 1; int iteration_limit; @@ -698,9 +698,9 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) if (iteration_limit && iterations > iteration_limit) { - printf("Tested %d iteration(s) without errors.\n", - iterations-1); - return 0; + printf("Tested %d iteration(s) with %lu errors.\n", + iterations-1, errs); + return errs != 0; } printf("Iteration: %6d\r", iterations); @@ -732,9 +732,14 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) *dummy = ~val; /* clear the test data off of the bus */ readback = *addr; if(readback != val) { - printf ("FAILURE (data line): " + printf ("FAILURE (data line): " "expected %08lx, actual %08lx\n", val, readback); + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } *addr = ~val; *dummy = val; @@ -743,6 +748,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("FAILURE (data line): " "Is %08lx, should be %08lx\n", readback, ~val); + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } } } @@ -808,7 +818,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("\nFAILURE: Address bit stuck high @ 0x%.8lx:" " expected 0x%.8lx, actual 0x%.8lx\n", (ulong)&start[offset], pattern, temp); - return 1; + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } } start[test_offset] = pattern; @@ -826,7 +840,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("\nFAILURE: Address bit stuck low or shorted @" " 0x%.8lx: expected 0x%.8lx, actual 0x%.8lx\n", (ulong)&start[offset], pattern, temp); - return 1; + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } } start[test_offset] = pattern; @@ -864,7 +882,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("\nFAILURE (read/write) @ 0x%.8lx:" " expected 0x%.8lx, actual 0x%.8lx)\n", (ulong)&start[offset], pattern, temp); - return 1; + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } anti_pattern = ~pattern; @@ -882,7 +904,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("\nFAILURE (read/write): @ 0x%.8lx:" " expected 0x%.8lx, actual 0x%.8lx)\n", (ulong)&start[offset], anti_pattern, temp); - return 1; + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } start[offset] = 0; } @@ -897,9 +923,9 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } if (iteration_limit && iterations > iteration_limit) { - printf("Tested %d iteration(s) without errors.\n", - iterations-1); - return 0; + printf("Tested %d iteration(s) with %lu errors.\n", + iterations-1, errs); + return errs != 0; } ++iterations; @@ -923,7 +949,11 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) printf ("\nMem error @ 0x%08X: " "found %08lX, expected %08lX\n", (uint)addr, readback, val); - rcode = 1; + errs++; + if (ctrlc()) { + putc ('\n'); + return 1; + } } val += incr; } @@ -943,7 +973,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) incr = -incr; } #endif - return rcode; + return 0; /* not reached */ } diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 2186205a1..9f8d53195 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -202,6 +202,37 @@ int _do_setenv (int flag, int argc, char *argv[]) break; } + /* Check for console redirection */ + if (strcmp(name,"stdin") == 0) { + console = stdin; + } else if (strcmp(name,"stdout") == 0) { + console = stdout; + } else if (strcmp(name,"stderr") == 0) { + console = stderr; + } + + if (console != -1) { + if (argc < 3) { /* Cannot delete it! */ + printf("Can't delete \"%s\"\n", name); + return 1; + } + +#ifdef CONFIG_CONSOLE_MUX + i = iomux_doenv(console, argv[2]); + if (i) + return i; +#else + /* Try assigning specified device */ + if (console_assign (console, argv[2]) < 0) + return 1; + +#ifdef CONFIG_SERIAL_MULTI + if (serial_assign (argv[2]) < 0) + return 1; +#endif +#endif /* CONFIG_CONSOLE_MUX */ + } + /* * Delete any existing definition */ @@ -229,37 +260,6 @@ int _do_setenv (int flag, int argc, char *argv[]) } #endif - /* Check for console redirection */ - if (strcmp(name,"stdin") == 0) { - console = stdin; - } else if (strcmp(name,"stdout") == 0) { - console = stdout; - } else if (strcmp(name,"stderr") == 0) { - console = stderr; - } - - if (console != -1) { - if (argc < 3) { /* Cannot delete it! */ - printf("Can't delete \"%s\"\n", name); - return 1; - } - -#ifdef CONFIG_CONSOLE_MUX - i = iomux_doenv(console, argv[2]); - if (i) - return i; -#else - /* Try assigning specified device */ - if (console_assign (console, argv[2]) < 0) - return 1; - -#ifdef CONFIG_SERIAL_MULTI - if (serial_assign (argv[2]) < 0) - return 1; -#endif -#endif /* CONFIG_CONSOLE_MUX */ - } - /* * Switch to new baudrate if new baudrate is supported */ diff --git a/common/env_embedded.c b/common/env_embedded.c index ae6cac439..e27e1cd27 100644 --- a/common/env_embedded.c +++ b/common/env_embedded.c @@ -41,11 +41,6 @@ #endif /* - * Generate embedded environment table - * inside U-Boot image, if needed. - */ -#if defined(ENV_IS_EMBEDDED) -/* * Only put the environment in it's own section when we are building * U-Boot proper. The host based program "tools/envcrc" does not need * a seperate section. Note that ENV_CRC is only defined when building @@ -210,5 +205,3 @@ unsigned long env_size __PPCTEXT__ = sizeof(env_t); * Add in absolutes. */ GEN_ABS(env_offset, CONFIG_ENV_OFFSET); - -#endif /* ENV_IS_EMBEDDED */ diff --git a/common/fdt_support.c b/common/fdt_support.c index 89164a12d..40ff00a15 100644 --- a/common/fdt_support.c +++ b/common/fdt_support.c @@ -692,3 +692,47 @@ int fdt_pci_dma_ranges(void *blob, int phb_off, struct pci_controller *hose) { return 0; } #endif + +#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE +/* + * This function can be used to update the size in the "reg" property + * of the NOR FLASH device nodes. This is necessary for boards with + * non-fixed NOR FLASH sizes. + */ +int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size) +{ + char compat[][16] = { "cfi-flash", "jedec-flash" }; + int off; + int len; + struct fdt_property *prop; + u32 *reg; + int i; + + for (i = 0; i < 2; i++) { + off = fdt_node_offset_by_compatible(blob, -1, compat[i]); + while (off != -FDT_ERR_NOTFOUND) { + /* + * Found one compatible node, now check if this one + * has the correct CS + */ + prop = fdt_get_property_w(blob, off, "reg", &len); + if (prop) { + reg = (u32 *)&prop->data[0]; + if (reg[0] == cs) { + reg[2] = size; + fdt_setprop(blob, off, "reg", reg, + 3 * sizeof(u32)); + + return 0; + } + } + + /* Move to next compatible node */ + off = fdt_node_offset_by_compatible(blob, off, + compat[i]); + } + } + + return -1; +} +#endif diff --git a/common/lcd.c b/common/lcd.c index dc8fea669..4e316183d 100644 --- a/common/lcd.c +++ b/common/lcd.c @@ -99,32 +99,11 @@ static int lcd_getfgcolor (void); static void console_scrollup (void) { -#if 1 /* Copy up rows ignoring the first one */ memcpy (CONSOLE_ROW_FIRST, CONSOLE_ROW_SECOND, CONSOLE_SCROLL_SIZE); /* Clear the last one */ memset (CONSOLE_ROW_LAST, COLOR_MASK(lcd_color_bg), CONSOLE_ROW_SIZE); -#else - /* - * Poor attempt to optimize speed by moving "long"s. - * But the code is ugly, and not a bit faster :-( - */ - ulong *t = (ulong *)CONSOLE_ROW_FIRST; - ulong *s = (ulong *)CONSOLE_ROW_SECOND; - ulong l = CONSOLE_SCROLL_SIZE / sizeof(ulong); - uchar c = lcd_color_bg & 0xFF; - ulong val= (c<<24) | (c<<16) | (c<<8) | c; - - while (l--) - *t++ = *s++; - - t = (ulong *)CONSOLE_ROW_LAST; - l = CONSOLE_ROW_SIZE / sizeof(ulong); - - while (l-- > 0) - *t++ = val; -#endif } /*----------------------------------------------------------------------*/ diff --git a/common/miiphyutil.c b/common/miiphyutil.c index 66fd9cad8..196ef4a7b 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -299,7 +299,7 @@ int miiphy_reset (char *devname, unsigned char addr) debug ("PHY status read failed\n"); return (-1); } - if (miiphy_write (devname, addr, PHY_BMCR, reg | 0x8000) != 0) { + if (miiphy_write (devname, addr, PHY_BMCR, reg | PHY_BMCR_RESET) != 0) { debug ("PHY reset failed\n"); return (-1); } diff --git a/cpu/blackfin/interrupts.c b/cpu/blackfin/interrupts.c index bf6fb4b4c..19456e5c1 100644 --- a/cpu/blackfin/interrupts.c +++ b/cpu/blackfin/interrupts.c @@ -20,6 +20,7 @@ #include <common.h> #include <config.h> +#include <watchdog.h> #include <asm/blackfin.h> #include "cpu.h" @@ -70,6 +71,8 @@ void udelay(unsigned long usec) cclk = (CONFIG_CCLK_HZ); while (usec > 1) { + WATCHDOG_RESET(); + /* * how many clock ticks to delay? * - request(in useconds) * clock_ticks(Hz) / useconds/second diff --git a/cpu/mpc83xx/fdt.c b/cpu/mpc83xx/fdt.c index 13443cbd8..daf73a6e5 100644 --- a/cpu/mpc83xx/fdt.c +++ b/cpu/mpc83xx/fdt.c @@ -69,6 +69,45 @@ void ft_cpu_setup(void *blob, bd_t *bd) defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\ defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5) fdt_fixup_ethernet(blob); +#ifdef CONFIG_MPC8313 + /* + * mpc8313e erratum IPIC1 swapped TSEC interrupt ID numbers on rev. 1 + * h/w (see AN3545). The base device tree in use has rev. 1 ID numbers, + * so if on Rev. 2 (and higher) h/w, we fix them up here + */ + if (REVID_MAJOR(immr->sysconf.spridr) >= 2) { + int nodeoffset, path; + const char *prop; + + nodeoffset = fdt_path_offset(blob, "/aliases"); + if (nodeoffset >= 0) { +#if defined(CONFIG_HAS_ETH0) + prop = fdt_getprop(blob, nodeoffset, "ethernet0", NULL); + if (prop) { + u32 tmp[] = { 32, 0x8, 33, 0x8, 34, 0x8 }; + + path = fdt_path_offset(blob, prop); + prop = fdt_getprop(blob, path, "interrupts", 0); + if (prop) + fdt_setprop(blob, path, "interrupts", + &tmp, sizeof(tmp)); + } +#endif +#if defined(CONFIG_HAS_ETH1) + prop = fdt_getprop(blob, nodeoffset, "ethernet1", NULL); + if (prop) { + u32 tmp[] = { 35, 0x8, 36, 0x8, 37, 0x8 }; + + path = fdt_path_offset(blob, prop); + prop = fdt_getprop(blob, path, "interrupts", 0); + if (prop) + fdt_setprop(blob, path, "interrupts", + &tmp, sizeof(tmp)); + } +#endif + } + } +#endif #endif do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, diff --git a/cpu/mpc8xxx/ddr/util.c b/cpu/mpc8xxx/ddr/util.c index 4451989a0..1e2d92128 100644 --- a/cpu/mpc8xxx/ddr/util.c +++ b/cpu/mpc8xxx/ddr/util.c @@ -89,17 +89,18 @@ __fsl_ddr_set_lawbar(const common_timing_params_t *memctl_common_params, ? LAW_TRGT_IF_DDR_INTRLV : LAW_TRGT_IF_DDR_1; if (set_ddr_laws(base, size, lawbar1_target_id) < 0) { - printf("ERROR\n"); + printf("%s: ERROR (ctrl #0, intrlv=%d)\n", __func__, + memctl_interleaved); return ; } } else if (ctrl_num == 1) { if (set_ddr_laws(base, size, LAW_TRGT_IF_DDR_2) < 0) { - printf("ERROR\n"); + printf("%s: ERROR (ctrl #1)\n", __func__); return ; } } else { - printf("unexpected controller number %u in %s\n", - ctrl_num, __FUNCTION__); + printf("%s: unexpected DDR controller number (%u)\n", __func__, + ctrl_num); } } diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index a9a0ac345..e1b00a74c 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -608,10 +608,17 @@ int checkcpu (void) break; } - printf (" at %s MHz (PLB=%lu, OPB=%lu, EBC=%lu MHz)\n", strmhz(buf, clock), + printf (" at %s MHz (PLB=%lu OPB=%lu EBC=%lu", + strmhz(buf, clock), sys_info.freqPLB / 1000000, get_OPB_freq() / 1000000, sys_info.freqEBC / 1000000); +#if defined(CONFIG_PCI) && \ + (defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX)) + printf(" PCI=%lu MHz", sys_info.freqPCI / 1000000); +#endif + printf(")\n"); if (addstr[0] != 0) printf(" %s\n", addstr); diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c index a00da408c..ccd999367 100644 --- a/cpu/ppc4xx/cpu_init.c +++ b/cpu/ppc4xx/cpu_init.c @@ -330,3 +330,72 @@ int cpu_init_r (void) return 0; } + +#if defined(CONFIG_PCI) && \ + (defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ + defined(CONFIG_440GR) || defined(CONFIG_440GRX)) +/* + * 440EP(x)/GR(x) PCI async/sync clocking restriction: + * + * In asynchronous PCI mode, the synchronous PCI clock must meet + * certain requirements. The following equation describes the + * relationship that must be maintained between the asynchronous PCI + * clock and synchronous PCI clock. Select an appropriate PCI:PLB + * ratio to maintain the relationship: + * + * AsyncPCIClk - 1MHz <= SyncPCIclock <= (2 * AsyncPCIClk) - 1MHz + */ +static int ppc4xx_pci_sync_clock_ok(u32 sync, u32 async) +{ + if (((async - 1000000) > sync) || (sync > ((2 * async) - 1000000))) + return 0; + else + return 1; +} + +int ppc4xx_pci_sync_clock_config(u32 async) +{ + sys_info_t sys_info; + u32 sync; + int div; + u32 reg; + u32 spcid_val[] = { + CPR0_SPCID_SPCIDV0_DIV1, CPR0_SPCID_SPCIDV0_DIV2, + CPR0_SPCID_SPCIDV0_DIV3, CPR0_SPCID_SPCIDV0_DIV4 }; + + get_sys_info(&sys_info); + sync = sys_info.freqPCI; + + /* + * First check if the equation above is met + */ + if (!ppc4xx_pci_sync_clock_ok(sync, async)) { + /* + * Reconfigure PCI sync clock to meet the equation. + * Start with highest possible PCI sync frequency + * (divider 1). + */ + for (div = 1; div <= 4; div++) { + sync = sys_info.freqPLB / div; + if (ppc4xx_pci_sync_clock_ok(sync, async)) + break; + } + + if (div <= 4) { + mtcpr(CPR0_SPCID, spcid_val[div]); + + mfcpr(CPR0_ICFG, reg); + reg |= CPR0_ICFG_RLI_MASK; + mtcpr(CPR0_ICFG, reg); + + /* do chip reset */ + mtspr(SPRN_DBCR0, 0x20000000); + } else { + /* Impossible to configure the PCI sync clock */ + return -1; + } + } + + return 0; +} +#endif diff --git a/cpu/ppc4xx/fdt.c b/cpu/ppc4xx/fdt.c index 496e0285b..15a184b5c 100644 --- a/cpu/ppc4xx/fdt.c +++ b/cpu/ppc4xx/fdt.c @@ -42,7 +42,7 @@ void __ft_board_setup(void *blob, bd_t *bd) u32 bxcr; u32 ranges[EBC_NUM_BANKS * 4]; u32 *p = ranges; - char *ebc_path = "/plb/opb/ebc"; + char ebc_path[] = "/plb/opb/ebc"; ft_cpu_setup(blob, bd); @@ -59,11 +59,17 @@ void __ft_board_setup(void *blob, bd_t *bd) *p++ = 0; *p++ = bxcr & EBC_BXCR_BAS_MASK; *p++ = EBC_BXCR_BANK_SIZE(bxcr); + +#ifdef CONFIG_FDT_FIXUP_NOR_FLASH_SIZE + /* Try to update reg property in nor flash node too */ + fdt_fixup_nor_flash_size(blob, i, + EBC_BXCR_BANK_SIZE(bxcr)); +#endif } } /* Some 405 PPC's have EBC as direct PLB child in the dts */ - if (fdt_path_offset(blob, "/plb/opb/ebc") < 0) + if (fdt_path_offset(blob, ebc_path) < 0) strcpy(ebc_path, "/plb/ebc"); rc = fdt_find_and_setprop(blob, ebc_path, "ranges", ranges, (p - ranges) * sizeof(u32), 1); diff --git a/disk/part_dos.c b/disk/part_dos.c index b915eb748..887b75ec8 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -188,7 +188,8 @@ static int get_partition_info_extended (block_dev_desc_t *dev_desc, int ext_part * fdisk does not show the extended partitions that * are not in the MBR */ - if ((pt->sys_ind != 0) && + if (((pt->boot_ind & ~0x80) == 0) && + (pt->sys_ind != 0) && (part_num == which_part) && (is_extended(pt->sys_ind) == 0)) { info->blksz = 512; diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h index d5bca63d0..05e007c6d 100644 --- a/drivers/net/smc911x.h +++ b/drivers/net/smc911x.h @@ -393,6 +393,7 @@ static inline void smc911x_reg_write(struct eth_device *dev, #define CHIP_9216 0x116a #define CHIP_9217 0x117a #define CHIP_9218 0x118a +#define CHIP_9220 0x9220 #define CHIP_9221 0x9221 struct chip_id { @@ -410,6 +411,7 @@ static const struct chip_id chip_ids[] = { { CHIP_9216, "LAN9216" }, { CHIP_9217, "LAN9217" }, { CHIP_9218, "LAN9218" }, + { CHIP_9220, "LAN9220" }, { CHIP_9221, "LAN9221" }, { 0, NULL }, }; diff --git a/include/asm-blackfin/config.h b/include/asm-blackfin/config.h index 25794dd4b..327843d0b 100644 --- a/include/asm-blackfin/config.h +++ b/include/asm-blackfin/config.h @@ -18,6 +18,9 @@ # define CONFIG_BFIN_SCRATCH_REG retn #endif +/* Relocation to SDRAM works on all Blackfin boards */ +#define CONFIG_RELOC_FIXUP_WORKS + /* Make sure the structure is properly aligned */ #if ((CONFIG_SYS_GBL_DATA_ADDR & -4) != CONFIG_SYS_GBL_DATA_ADDR) # error CONFIG_SYS_GBL_DATA_ADDR: must be 4 byte aligned diff --git a/include/asm-blackfin/global_data.h b/include/asm-blackfin/global_data.h index 3194b72a5..b78b04cd6 100644 --- a/include/asm-blackfin/global_data.h +++ b/include/asm-blackfin/global_data.h @@ -44,7 +44,6 @@ typedef struct global_data { unsigned long baudrate; unsigned long have_console; /* serial_init() was called */ phys_size_t ram_size; /* RAM size */ - unsigned long reloc_off; /* Relocation Offset */ unsigned long env_addr; /* Address of Environment struct */ unsigned long env_valid; /* Checksum of Environment valid? */ #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h index bdc6ff284..95350fd9b 100644 --- a/include/asm-ppc/immap_512x.h +++ b/include/asm-ppc/immap_512x.h @@ -215,8 +215,8 @@ typedef struct clk512x { #define CLOCK_SCCR2_DIU_EN 0x80000000 #define CLOCK_SCCR2_AXE_EN 0x40000000 #define CLOCK_SCCR2_MEM_EN 0x20000000 -#define CLOCK_SCCR2_USB2_EN 0x10000000 -#define CLOCK_SCCR2_USB1_EN 0x08000000 +#define CLOCK_SCCR2_USB1_EN 0x10000000 +#define CLOCK_SCCR2_USB2_EN 0x08000000 #define CLOCK_SCCR2_I2C_EN 0x04000000 #define CLOCK_SCCR2_BDLC_EN 0x02000000 #define CLOCK_SCCR2_SDHC_EN 0x01000000 diff --git a/include/common.h b/include/common.h index f7c93bf5a..7df9afab2 100644 --- a/include/common.h +++ b/include/common.h @@ -719,4 +719,9 @@ int cpu_release(int nr, int argc, char *argv[]); #define ALIGN(x,a) __ALIGN_MASK((x),(typeof(x))(a)-1) #define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) +/* Pull in stuff for the build system */ +#ifdef DO_DEPS_ONLY +# include <environment.h> +#endif + #endif /* __COMMON_H_ */ diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h index 761932800..7cb4ccdc1 100644 --- a/include/configs/MPC8610HPCD.h +++ b/include/configs/MPC8610HPCD.h @@ -102,8 +102,6 @@ #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define MPC86xx_DDR_SDRAM_CLK_CNTL - #define CONFIG_NUM_DDR_CONTROLLERS 1 #define CONFIG_DIMM_SLOTS_PER_CTLR 1 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h index b0ae25c22..a46f7c8bd 100644 --- a/include/configs/MPC8641HPCN.h +++ b/include/configs/MPC8641HPCN.h @@ -141,8 +141,6 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define MPC86xx_DDR_SDRAM_CLK_CNTL - #define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index 8e97ad068..310242e0b 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -43,6 +43,22 @@ #define CONFIG_P2020 #endif +#ifdef CONFIG_MK_NAND +#define CONFIG_NAND_U_BOOT 1 +#define CONFIG_RAMBOOT_NAND 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f82000 +#endif + +#ifdef CONFIG_MK_SDCARD +#define CONFIG_RAMBOOT_SDCARD 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#endif + +#ifdef CONFIG_MK_SPIFLASH +#define CONFIG_RAMBOOT_SPIFLASH 1 +#define CONFIG_RAMBOOT_TEXT_BASE 0xf8f80000 +#endif + /* High Level Configuration Options */ #define CONFIG_BOOKE 1 /* BOOKE */ #define CONFIG_E500 1 /* BOOKE e500 family */ @@ -82,16 +98,34 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MEMTEST_END 0x1fffffff #define CONFIG_PANIC_HANG /* do not reset board on panic */ + /* + * Config the L2 Cache as L2 SRAM + */ +#define CONFIG_SYS_INIT_L2_ADDR 0xf8f80000 +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_INIT_L2_ADDR_PHYS 0xff8f80000ull +#else +#define CONFIG_SYS_INIT_L2_ADDR_PHYS CONFIG_SYS_INIT_L2_ADDR +#endif +#define CONFIG_SYS_L2_SIZE (512 << 10) +#define CONFIG_SYS_INIT_L2_END (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) + /* * Base addresses -- Note these are effective addresses where the * actual resources get mapped (not physical addresses) */ -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ #define CONFIG_SYS_CCSRBAR 0xffe00000 /* relocated CCSRBAR */ #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR /* physical addr of */ /* CCSRBAR */ #define CONFIG_SYS_IMMR CONFIG_SYS_CCSRBAR /* PQII uses */ /* CONFIG_SYS_IMMR */ + +#if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) +#define CONFIG_SYS_CCSRBAR_DEFAULT CONFIG_SYS_CCSRBAR +#else +#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */ +#endif + #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_CCSRBAR+0x9000) #define CONFIG_SYS_PCIE1_ADDR (CONFIG_SYS_CCSRBAR+0xa000) @@ -158,6 +192,13 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_BASE TEXT_BASE /* start of monitor */ +#if defined(CONFIG_SYS_SPL) || defined(CONFIG_RAMBOOT_NAND) \ + || defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) +#define CONFIG_SYS_RAMBOOT +#else +#undef CONFIG_SYS_RAMBOOT +#endif + #define CONFIG_FLASH_CFI_DRIVER #define CONFIG_SYS_FLASH_CFI #define CONFIG_SYS_FLASH_EMPTY_INFO @@ -177,7 +218,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_SYS_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon*/ #define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* Reserved for malloc*/ +#ifndef CONFIG_NAND_SPL #define CONFIG_SYS_NAND_BASE 0xffa00000 +#else +#define CONFIG_SYS_NAND_BASE 0xfff00000 +#endif #define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE #define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE} #define CONFIG_SYS_MAX_NAND_DEVICE 1 @@ -187,6 +232,15 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); #define CONFIG_NAND_FSL_ELBC 1 #define CONFIG_SYS_NAND_BLOCK_SIZE (16 * 1024) +/* NAND boot: 4K NAND loader config */ +#define CONFIG_SYS_NAND_SPL_SIZE 0x1000 +#define CONFIG_SYS_NAND_U_BOOT_SIZE ((512 << 10) - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_DST (CONFIG_SYS_INIT_L2_ADDR) +#define CONFIG_SYS_NAND_U_BOOT_START (CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_NAND_SPL_SIZE) +#define CONFIG_SYS_NAND_U_BOOT_OFFS (0) +#define CONFIG_SYS_NAND_U_BOOT_RELOC (CONFIG_SYS_INIT_L2_END - 0x2000) +#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP ((CONFIG_SYS_INIT_L2_END - 1) & ~0xF) + /* NAND flash config */ #define CONFIG_NAND_BR_PRELIM (CONFIG_SYS_NAND_BASE_PHYS \ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \ @@ -202,10 +256,17 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); | OR_FCM_TRLX \ | OR_FCM_EHTR) +#ifdef CONFIG_RAMBOOT_NAND +#define CONFIG_SYS_BR0_PRELIM CONFIG_NAND_BR_PRELIM /* NAND Base Address */ +#define CONFIG_SYS_OR0_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */ +#define CONFIG_SYS_BR1_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ +#define CONFIG_SYS_OR1_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ +#else #define CONFIG_SYS_BR0_PRELIM CONFIG_FLASH_BR_PRELIM /* NOR Base Address */ #define CONFIG_SYS_OR0_PRELIM CONFIG_FLASH_OR_PRELIM /* NOR Options */ #define CONFIG_SYS_BR1_PRELIM CONFIG_NAND_BR_PRELIM /* NAND Base Address */ #define CONFIG_SYS_OR1_PRELIM CONFIG_NAND_OR_PRELIM /* NAND Options */ +#endif #define CONFIG_SYS_VSC7385_BASE 0xffb00000 @@ -371,14 +432,26 @@ extern unsigned long get_board_sys_clk(unsigned long dummy); /* * Environment */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#if CONFIG_SYS_MONITOR_BASE > 0xfff80000 -#define CONFIG_ENV_ADDR 0xfff80000 +#if defined(CONFIG_SYS_RAMBOOT) +#if defined(CONFIG_RAMBOOT_NAND) + #define CONFIG_ENV_IS_IN_NAND 1 + #define CONFIG_ENV_SIZE CONFIG_SYS_NAND_BLOCK_SIZE + #define CONFIG_ENV_OFFSET ((512 * 1024) + CONFIG_SYS_NAND_BLOCK_SIZE) +#elif defined(CONFIG_RAMBOOT_SDCARD) || defined(CONFIG_RAMBOOT_SPIFLASH) + #define CONFIG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */ + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - 0x1000) + #define CONFIG_ENV_SIZE 0x2000 +#endif #else -#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) + #define CONFIG_ENV_IS_IN_FLASH 1 + #if CONFIG_SYS_MONITOR_BASE > 0xfff80000 + #define CONFIG_ENV_ADDR 0xfff80000 + #else + #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) + #endif + #define CONFIG_ENV_SIZE 0x2000 + #define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #endif -#define CONFIG_ENV_SIZE 0x2000 -#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K (one sector) */ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ diff --git a/include/configs/amcc-common.h b/include/configs/amcc-common.h index 51128a3b5..8cd97b86d 100644 --- a/include/configs/amcc-common.h +++ b/include/configs/amcc-common.h @@ -156,6 +156,8 @@ */ #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP +/* Update size in "reg" property of NOR FLASH device tree nodes */ +#define CONFIG_FDT_FIXUP_NOR_FLASH_SIZE /* * Booting and default environment diff --git a/include/configs/galaxy5200.h b/include/configs/galaxy5200.h index 3b67ea90b..931acfbc7 100644 --- a/include/configs/galaxy5200.h +++ b/include/configs/galaxy5200.h @@ -210,7 +210,7 @@ /* Chip Select configuration for NAND flash */ #define CONFIG_SYS_CS1_START 0x20000000 #define CONFIG_SYS_CS1_SIZE 0x90000 -#define CONFIG_SYS_CS1_CFG 0x0002d900 +#define CONFIG_SYS_CS1_CFG 0x00025b00 /* Chip Select configuration for Epson S1D13513 */ #define CONFIG_SYS_CS3_START 0x10000000 diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index e5812ee8a..7ef6385ef 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -398,7 +398,7 @@ #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS2_START | (CONFIG_QUART_CONSOLE - 1)<<5) #elif (CONFIG_QUART_CONSOLE > 4) && (CONFIG_QUART_CONSOLE < 9) #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CS1_START | (CONFIG_QUART_CONSOLE - 5)<<5) -#elif +#else #error "Wrong QUART expander number." #endif diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index bf7cf82d8..4dea27d48 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -304,7 +304,7 @@ #define CONFIG_SYS_I2C1_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C2_OFFSET -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */ +/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ /* TSEC */ #define CONFIG_SYS_TSEC1_OFFSET 0x24000 diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h index 2865df55e..682d241d3 100644 --- a/include/configs/sbc8641d.h +++ b/include/configs/sbc8641d.h @@ -121,8 +121,6 @@ #define CONFIG_SYS_MAX_DDR_BAT_SIZE 0x80000000 /* BAT mapping size */ #define CONFIG_VERY_BIG_RAM -#define MPC86xx_DDR_SDRAM_CLK_CNTL - #define CONFIG_NUM_DDR_CONTROLLERS 2 #define CONFIG_DIMM_SLOTS_PER_CTLR 2 #define CONFIG_CHIP_SELECTS_PER_CTRL (2 * CONFIG_DIMM_SLOTS_PER_CTLR) diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 89acacc7f..9605ce25b 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -243,6 +243,11 @@ #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 +/* I2C bootstrap EEPROM */ +#define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR 0x52 +#define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET 0 +#define CONFIG_4xx_CONFIG_BLOCKSIZE 16 + /* I2C SYSMON (LM75, AD7414 is almost compatible) */ #define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ #define CONFIG_DTT_AD7414 1 /* use AD7414 */ @@ -300,6 +305,7 @@ /* * Commands additional to the ones defined in amcc-common.h */ +#define CONFIG_CMD_CHIP_CONFIG #define CONFIG_CMD_DTT #define CONFIG_CMD_FAT #define CONFIG_CMD_NAND diff --git a/include/configs/vme8349.h b/include/configs/vme8349.h index d0690feb1..f9db73b2d 100644 --- a/include/configs/vme8349.h +++ b/include/configs/vme8349.h @@ -224,7 +224,7 @@ #define CONFIG_SYS_I2C1_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_I2C_OFFSET CONFIG_SYS_I2C1_OFFSET -/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SPD_BUS_NUM... */ +/* could also use CONFIG_I2C_MULTI_BUS and CONFIG_SYS_SPD_BUS_NUM... */ #define CONFIG_SYS_I2C_8574_ADDR2 0x20 /* I2C1, PCF8574 */ diff --git a/include/fdt_support.h b/include/fdt_support.h index 16734c535..0a9dd0dd8 100644 --- a/include/fdt_support.h +++ b/include/fdt_support.h @@ -79,5 +79,7 @@ void ft_pci_setup(void *blob, bd_t *bd); void set_working_fdt_addr(void *addr); int fdt_resize(void *blob); +int fdt_fixup_nor_flash_size(void *blob, int cs, u32 size); + #endif /* ifdef CONFIG_OF_LIBFDT */ #endif /* ifndef __FDT_SUPPORT_H */ diff --git a/include/ppc440.h b/include/ppc440.h index fe0db93b5..e54a977dc 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -1701,9 +1701,14 @@ #define PLLSYS1_NTO1_MASK 0x00000001 /* CPU:PLB N-to-1 ratio */ #endif /* CONFIG_440GX */ -#if defined (CONFIG_440EPX) || defined (CONFIG_440GRX) +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ + defined(CONFIG_440EPX) || defined(CONFIG_440GRX) #define CPR0_ICFG_RLI_MASK 0x80000000 #define CPR0_SPCID_SPCIDV0_MASK 0x03000000 +#define CPR0_SPCID_SPCIDV0_DIV1 0x01000000 +#define CPR0_SPCID_SPCIDV0_DIV2 0x02000000 +#define CPR0_SPCID_SPCIDV0_DIV3 0x03000000 +#define CPR0_SPCID_SPCIDV0_DIV4 0x00000000 #define CPR0_PERD_PERDV0_MASK 0x07000000 #endif diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 3bff00a55..5024db447 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -221,6 +221,8 @@ static inline void set_mcsr(u32 val) asm volatile("mtspr 0x23c, %0" : "=r" (val) :); } +int ppc4xx_pci_sync_clock_config(u32 async); + #endif /* __ASSEMBLY__ */ /* for multi-cpu support */ diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c index 3670d2caa..6cade7d11 100644 --- a/lib_blackfin/board.c +++ b/lib_blackfin/board.c @@ -278,7 +278,6 @@ static void board_net_init_r(bd_t *bd) bb_miiphy_init(); #endif #ifdef CONFIG_CMD_NET - uchar enetaddr[6]; char *s; if ((s = getenv("bootfile")) != NULL) @@ -288,15 +287,11 @@ static void board_net_init_r(bd_t *bd) printf("Net: "); eth_initialize(gd->bd); - - eth_getenv_enetaddr("ethaddr", enetaddr); - printf("MAC: %pM\n", enetaddr); #endif } void board_init_r(gd_t * id, ulong dest_addr) { - extern void malloc_bin_reloc(void); char *s; bd_t *bd; gd = id; @@ -310,7 +305,6 @@ void board_init_r(gd_t * id, ulong dest_addr) /* initialize malloc() area */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - malloc_bin_reloc(); #if !defined(CONFIG_SYS_NO_FLASH) /* Initialize the flash and protect u-boot by default */ diff --git a/lib_generic/string.c b/lib_generic/string.c index 181eda614..b375b8124 100644 --- a/lib_generic/string.c +++ b/lib_generic/string.c @@ -403,10 +403,26 @@ char *strswab(const char *s) */ void * memset(void * s,int c,size_t count) { - char *xs = (char *) s; + unsigned long *sl = (unsigned long *) s; + unsigned long cl = 0; + char *s8; + int i; + /* do it one word at a time (32 bits or 64 bits) while possible */ + if ( ((ulong)s & (sizeof(*sl) - 1)) == 0) { + for (i = 0; i < sizeof(*sl); i++) { + cl <<= 8; + cl |= c & 0xff; + } + while (count >= sizeof(*sl)) { + *sl++ = cl; + count -= sizeof(*sl); + } + } + /* fill 8 bits at a time */ + s8 = (char *)sl; while (count--) - *xs++ = c; + *s8++ = c; return s; } @@ -446,12 +462,23 @@ char * bcopy(const char * src, char * dest, int count) * You should not use this function to access IO space, use memcpy_toio() * or memcpy_fromio() instead. */ -void * memcpy(void * dest,const void *src,size_t count) +void * memcpy(void *dest, const void *src, size_t count) { - char *tmp = (char *) dest, *s = (char *) src; + unsigned long *dl = (unsigned long *)dest, *sl = (unsigned long *)src; + char *d8, *s8; + /* while all data is aligned (common case), copy a word at a time */ + if ( (((ulong)dest | (ulong)src) & (sizeof(*dl) - 1)) == 0) { + while (count >= sizeof(*dl)) { + *dl++ = *sl++; + count -= sizeof(*dl); + } + } + /* copy the reset one byte at a time */ + d8 = (char *)dl; + s8 = (char *)sl; while (count--) - *tmp++ = *s++; + *d8++ = *s8++; return dest; } diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 796d00242..765f97a04 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -255,14 +255,12 @@ static int init_func_watchdog_reset (void) */ init_fnc_t *init_sequence[] = { - -#if defined(CONFIG_BOARD_EARLY_INIT_F) - board_early_init_f, -#endif - #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) probecpu, #endif +#if defined(CONFIG_BOARD_EARLY_INIT_F) + board_early_init_f, +#endif #if !defined(CONFIG_8xx_CPUCLK_DEFAULT) get_clocks, /* get CPU and bus clocks (etc.) */ #if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \ diff --git a/nand_spl/board/freescale/p1_p2_rdb/Makefile b/nand_spl/board/freescale/p1_p2_rdb/Makefile new file mode 100644 index 000000000..1d5e31983 --- /dev/null +++ b/nand_spl/board/freescale/p1_p2_rdb/Makefile @@ -0,0 +1,127 @@ +# +# (C) Copyright 2007 +# Stefan Roese, DENX Software Engineering, sr@denx.de. +# +# Copyright 2009 Freescale Semiconductor, Inc. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +NAND_SPL := y +TEXT_BASE := 0xfff00000 +PAD_TO := 0xfff01000 + +include $(TOPDIR)/config.mk + +LDSCRIPT= $(TOPDIR)/cpu/$(CPU)/u-boot-nand_spl.lds +LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS) +AFLAGS += -DCONFIG_NAND_SPL +CFLAGS += -DCONFIG_NAND_SPL + +SOBJS = start.o resetvec.o +COBJS = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \ + nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o + +SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c)) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) +__OBJS := $(SOBJS) $(COBJS) +LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR) + +nandobj := $(OBJTREE)/nand_spl/ + +ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin + +all: $(obj).depend $(ALL) + +$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@ + +$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl + $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ + +$(nandobj)u-boot-spl: $(OBJS) + cd $(LNDIR) && $(LD) $(LDFLAGS) $(__OBJS) $(PLATFORM_LIBS) \ + -Map $(nandobj)u-boot-spl.map \ + -o $(nandobj)u-boot-spl + +# create symbolic links for common files + +$(obj)cache.c: + @rm -f $(obj)cache.c + ln -sf $(SRCTREE)/lib_ppc/cache.c $(obj)cache.c + +$(obj)cpu_init_early.c: + @rm -f $(obj)cpu_init_early.c + ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c + +$(obj)cpu_init_nand.c: + @rm -f $(obj)cpu_init_nand.c + ln -sf $(SRCTREE)/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c + +$(obj)fsl_law.c: + @rm -f $(obj)fsl_law.c + ln -sf $(SRCTREE)/drivers/misc/fsl_law.c $(obj)fsl_law.c + +$(obj)law.c: + @rm -f $(obj)law.c + ln -sf $(SRCTREE)/board/$(BOARDDIR)/law.c $(obj)law.c + +$(obj)nand_boot_fsl_elbc.c: + @rm -f $(obj)nand_boot_fsl_elbc.c + ln -sf $(SRCTREE)/nand_spl/nand_boot_fsl_elbc.c \ + $(obj)nand_boot_fsl_elbc.c + +$(obj)ns16550.c: + @rm -f $(obj)ns16550.c + ln -sf $(SRCTREE)/drivers/serial/ns16550.c $(obj)ns16550.c + +$(obj)resetvec.S: + @rm -f $(obj)resetvec.S + ln -s $(SRCTREE)/cpu/$(CPU)/resetvec.S $(obj)resetvec.S + +$(obj)fixed_ivor.S: + @rm -f $(obj)fixed_ivor.S + ln -sf $(SRCTREE)/cpu/mpc85xx/fixed_ivor.S $(obj)fixed_ivor.S + +$(obj)start.S: $(obj)fixed_ivor.S + @rm -f $(obj)start.S + ln -sf $(SRCTREE)/cpu/mpc85xx/start.S $(obj)start.S + +$(obj)tlb.c: + @rm -f $(obj)tlb.c + ln -sf $(SRCTREE)/cpu/mpc85xx/tlb.c $(obj)tlb.c + +$(obj)tlb_table.c: + @rm -f $(obj)tlb_table.c + ln -sf $(SRCTREE)/board/$(BOARDDIR)/tlb.c $(obj)tlb_table.c + +######################################################################### + +$(obj)%.o: $(obj)%.S + $(CC) $(AFLAGS) -c -o $@ $< + +$(obj)%.o: $(obj)%.c + $(CC) $(CFLAGS) -c -o $@ $< + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c new file mode 100644 index 000000000..bd513b851 --- /dev/null +++ b/nand_spl/board/freescale/p1_p2_rdb/nand_boot.c @@ -0,0 +1,97 @@ +/* + * Copyright 2009 Freescale Semiconductor, Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ +#include <common.h> +#include <mpc85xx.h> +#include <asm-ppc/io.h> +#include <ns16550.h> +#include <nand.h> +#include <asm/mmu.h> +#include <asm/immap_85xx.h> +#include <asm/fsl_ddr_sdram.h> +#include <asm/fsl_law.h> + +#define SYSCLK_MASK 0x00200000 +#define BOARDREV_MASK 0x10100000 +#define BOARDREV_B 0x10100000 +#define BOARDREV_C 0x00100000 + +#define SYSCLK_66 66666666 +#define SYSCLK_50 50000000 +#define SYSCLK_100 100000000 + +DECLARE_GLOBAL_DATA_PTR; + +void board_init_f(ulong bootflag) +{ + uint plat_ratio, bus_clk, sys_clk; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); + volatile ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); + uint val, temp, sysclk_mask; + + val = pgpio->gpdat; + sysclk_mask = val & SYSCLK_MASK; + temp = val & BOARDREV_MASK; + if (temp == BOARDREV_C) { + if(sysclk_mask == 0) + sys_clk = SYSCLK_66; + else + sys_clk = SYSCLK_100; + } else if (temp == BOARDREV_B) { + if(sysclk_mask == 0) + sys_clk = SYSCLK_66; + else + sys_clk = SYSCLK_50; + } + + plat_ratio = gur->porpllsr & 0x0000003e; + plat_ratio >>= 1; + bus_clk = plat_ratio * sys_clk; + NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1, + bus_clk / 16 / CONFIG_BAUDRATE); + + puts("\nNAND boot... "); + + /* copy code to DDR and jump to it - this should not return */ + /* NOTE - code has to be copied out of NAND buffer before + * other blocks can be read. + */ + relocate_code(CONFIG_SYS_NAND_U_BOOT_RELOC_SP, 0, + CONFIG_SYS_NAND_U_BOOT_RELOC); +} + +void board_init_r(gd_t *gd, ulong dest_addr) +{ + nand_boot(); +} + +void putc(char c) +{ + if (c == '\n') + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, '\r'); + + NS16550_putc((NS16550_t)CONFIG_SYS_NS16550_COM1, c); +} + +void puts(const char *str) +{ + while (*str) + putc(*str++); +} diff --git a/tools/Makefile b/tools/Makefile index b04e3f304..2a9a9fd12 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -69,13 +69,7 @@ include $(TOPDIR)/config.mk BIN_FILES-$(CONFIG_LCD_LOGO) += bmp_logo$(SFX) BIN_FILES-$(CONFIG_VIDEO_LOGO) += bmp_logo$(SFX) BIN_FILES-$(CONFIG_ENV_IS_EMBEDDED) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_DATAFLASH) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_EEPROM) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_FLASH) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_ONENAND) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_NAND) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_NVRAM) += envcrc$(SFX) -BIN_FILES-$(CONFIG_ENV_IS_IN_SPI_FLASH) += envcrc$(SFX) +BIN_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc$(SFX) BIN_FILES-$(CONFIG_CMD_NET) += gen_eth_addr$(SFX) BIN_FILES-$(CONFIG_CMD_LOADS) += img2srec$(SFX) BIN_FILES-$(CONFIG_INCA_IP) += inca-swap-bytes$(SFX) @@ -95,6 +89,7 @@ OBJ_FILES-$(CONFIG_LCD_LOGO) += bmp_logo.o OBJ_FILES-$(CONFIG_VIDEO_LOGO) += bmp_logo.o OBJ_FILES-y += default_image.o OBJ_FILES-$(CONFIG_ENV_IS_EMBEDDED) += envcrc.o +OBJ_FILES-$(CONFIG_BUILD_ENVCRC) += envcrc.o OBJ_FILES-y += fit_image.o OBJ_FILES-$(CONFIG_CMD_NET) += gen_eth_addr.o OBJ_FILES-$(CONFIG_CMD_LOADS) += img2srec.o diff --git a/tools/envcrc.c b/tools/envcrc.c index 5b0f7cd4e..d1e84b3b6 100644 --- a/tools/envcrc.c +++ b/tools/envcrc.c @@ -21,6 +21,7 @@ * MA 02111-1307 USA */ +#include <errno.h> #include <stdio.h> #include <stdint.h> #include <stdlib.h> @@ -50,10 +51,6 @@ # if defined(CONFIG_ENV_ADDR_REDUND) && !defined(CONFIG_ENV_SIZE_REDUND) # define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE # endif -# if (CONFIG_ENV_ADDR >= CONFIG_SYS_MONITOR_BASE) && \ - ((CONFIG_ENV_ADDR + CONFIG_ENV_SIZE) <= (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)) -# define ENV_IS_EMBEDDED 1 -# endif # if defined(CONFIG_ENV_ADDR_REDUND) || defined(CONFIG_ENV_OFFSET_REDUND) # define CONFIG_SYS_REDUNDAND_ENVIRONMENT 1 # endif @@ -70,14 +67,11 @@ extern uint32_t crc32 (uint32_t, const unsigned char *, unsigned int); -#ifdef ENV_IS_EMBEDDED extern unsigned int env_size; extern unsigned char environment; -#endif /* ENV_IS_EMBEDDED */ int main (int argc, char **argv) { -#ifdef ENV_IS_EMBEDDED unsigned char pad = 0x00; uint32_t crc; unsigned char *envptr = &environment, @@ -121,7 +115,8 @@ int main (int argc, char **argv) } for (i = start; i != end; i += step) printf("%c", (crc & (0xFF << (i * 8))) >> (i * 8)); - fwrite(dataptr, 1, datasize, stdout); + if (fwrite(dataptr, 1, datasize, stdout) != datasize) + fprintf(stderr, "fwrite() failed: %s\n", strerror(errno)); } else { printf("CRC32 from offset %08X to %08X of environment = %08X\n", (unsigned int) (dataptr - envptr), @@ -131,8 +126,6 @@ int main (int argc, char **argv) } else { printf ("0x%08X\n", crc); } -#else - printf ("0\n"); -#endif + return EXIT_SUCCESS; } |