diff options
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/prcm-regs.c | 4 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-omap5/omap.h | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/omap_common.h | 2 | 
4 files changed, 12 insertions, 0 deletions
| diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c index 304ac1c17..5c60d743c 100644 --- a/arch/arm/cpu/armv7/omap5/prcm-regs.c +++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c @@ -203,8 +203,10 @@ struct prcm_regs const omap5_es1_prcm = {  	.cm_l3init_hsusbotg_clkctrl = 0x4a009360,  	.cm_l3init_hsusbtll_clkctrl = 0x4a009368,  	.cm_l3init_p1500_clkctrl = 0x4a009378, +	.cm_l3init_sata_clkctrl = 0x4a009388,  	.cm_l3init_fsusb_clkctrl = 0x4a0093d0,  	.cm_l3init_ocp2scp1_clkctrl = 0x4a0093e0, +	.cm_l3init_ocp2scp3_clkctrl = 0x4a0093e8,  	/* cm2.l4per */  	.cm_l4per_clkstctrl = 0x4a009400, @@ -296,6 +298,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {  	.control_status				= 0x4A002134,  	.control_std_fuse_opp_vdd_mpu_2		= 0x4A0021B4,  	.control_phy_power_usb 			= 0x4A002370, +	.control_phy_power_sata			= 0x4A002374,  	.control_padconf_core_base		= 0x4A002800,  	.control_paconf_global			= 0x4A002DA0,  	.control_paconf_mode			= 0x4A002DA4, @@ -698,6 +701,7 @@ struct prcm_regs const omap5_es2_prcm = {  	.cm_l3init_hsusbotg_clkctrl = 0x4a009660,  	.cm_l3init_hsusbtll_clkctrl = 0x4a009668,  	.cm_l3init_p1500_clkctrl = 0x4a009678, +	.cm_l3init_sata_clkctrl = 0x4a009688,  	.cm_l3init_fsusb_clkctrl = 0x4a0096d0,  	.cm_l3init_ocp2scp1_clkctrl = 0x4a0096e0,  	.cm_l3init_ocp2scp3_clkctrl = 0x4a0096e8, diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 8869b5001..2dfe4efb4 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h @@ -137,6 +137,9 @@  #define HSMMC_CLKCTRL_CLKSEL_MASK		(1 << 24)  #define HSMMC_CLKCTRL_CLKSEL_DIV_MASK		(1 << 25) +/* CM_L3INIT_SATA_CLKCTRL */ +#define SATA_CLKCTRL_OPTFCLKEN_MASK		(1 << 8) +  /* CM_WKUP_GPTIMER1_CLKCTRL */  #define GPTIMER1_CLKCTRL_CLKSEL_MASK		(1 << 24) diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h index f1d116027..590235be0 100644 --- a/arch/arm/include/asm/arch-omap5/omap.h +++ b/arch/arm/include/asm/arch-omap5/omap.h @@ -64,6 +64,9 @@  /* QSPI */  #define QSPI_BASE		0x4B300000 +/* SATA */ +#define DWC_AHSATA_BASE		0x4A140000 +  /*   * Hardware Register Details   */ diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 0219d6c40..a78f99079 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -226,6 +226,7 @@ struct prcm_regs {  	u32 cm_l3init_hsusbotg_clkctrl;  	u32 cm_l3init_hsusbtll_clkctrl;  	u32 cm_l3init_p1500_clkctrl; +	u32 cm_l3init_sata_clkctrl;  	u32 cm_l3init_fsusb_clkctrl;  	u32 cm_l3init_ocp2scp1_clkctrl;  	u32 cm_l3init_ocp2scp3_clkctrl; @@ -366,6 +367,7 @@ struct omap_sys_ctrl_regs {  	u32 control_ldosram_mpu_voltage_ctrl;  	u32 control_ldosram_core_voltage_ctrl;  	u32 control_usbotghs_ctrl; +	u32 control_phy_power_sata;  	u32 control_padconf_core_base;  	u32 control_paconf_global;  	u32 control_paconf_mode; |