diff options
| -rw-r--r-- | arch/powerpc/include/asm/config_mpc85xx.h | 42 | ||||
| -rw-r--r-- | include/configs/t4qds.h | 1 | 
2 files changed, 10 insertions, 33 deletions
| diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h index 757194140..569cb8e7c 100644 --- a/arch/powerpc/include/asm/config_mpc85xx.h +++ b/arch/powerpc/include/asm/config_mpc85xx.h @@ -512,55 +512,33 @@  #define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK  #define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v2.2" -#elif defined(CONFIG_PPC_T4240) +#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) +#define CONFIG_E6500  #define CONFIG_SYS_PPC64		/* 64-bit core */  #define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */  #define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */  #define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */ +#ifdef CONFIG_PPC_T4240  #define CONFIG_MAX_CPUS			12 -#define CONFIG_SYS_FSL_NUM_CC_PLLS	5 -#define CONFIG_SYS_FSL_NUM_LAWS		32 -#define CONFIG_SYS_FSL_SRDS_3 -#define CONFIG_SYS_FSL_SRDS_4 -#define CONFIG_SYS_FSL_SEC_COMPAT	4 -#define CONFIG_SYS_NUM_FMAN		2  #define CONFIG_SYS_NUM_FM1_DTSEC	8  #define CONFIG_SYS_NUM_FM1_10GEC	2  #define CONFIG_SYS_NUM_FM2_DTSEC	8  #define CONFIG_SYS_NUM_FM2_10GEC	2  #define CONFIG_NUM_DDR_CONTROLLERS	3 -#define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_4_7 -#define CONFIG_SYS_FMAN_V3 -#define CONFIG_SYS_FM_MURAM_SIZE	0x60000 -#define CONFIG_SYS_FSL_TBCLK_DIV	16 -#define CONFIG_SYS_FSL_PCIE_COMPAT	"fsl,qoriq-pcie-v3.0" -#define CONFIG_SYS_FSL_SRIO_MAX_PORTS	2 -#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM	9 -#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM	5 -#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE -#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY -#define CONFIG_SYS_FSL_ERRATUM_A004468 -#define CONFIG_SYS_FSL_ERRATUM_A_004934 -#define CONFIG_SYS_FSL_ERRATUM_A005871 -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000 - -#elif defined(CONFIG_PPC_T4160) -#define CONFIG_SYS_PPC64		/* 64-bit core */ -#define CONFIG_FSL_CORENET		/* Freescale CoreNet platform */ -#define CONFIG_SYS_FSL_QORIQ_CHASSIS2	/* Freescale Chassis generation 2 */ -#define CONFIG_SYS_FSL_QMAN_V3		/* QMAN version 3 */ +#else  #define CONFIG_MAX_CPUS			8 +#define CONFIG_SYS_NUM_FM1_DTSEC	7 +#define CONFIG_SYS_NUM_FM1_10GEC	1 +#define CONFIG_SYS_NUM_FM2_DTSEC	7 +#define CONFIG_SYS_NUM_FM2_10GEC	1 +#define CONFIG_NUM_DDR_CONTROLLERS	2 +#endif  #define CONFIG_SYS_FSL_NUM_CC_PLLS	5  #define CONFIG_SYS_FSL_NUM_LAWS		32  #define CONFIG_SYS_FSL_SRDS_3  #define CONFIG_SYS_FSL_SRDS_4  #define CONFIG_SYS_FSL_SEC_COMPAT	4  #define CONFIG_SYS_NUM_FMAN		2 -#define CONFIG_SYS_NUM_FM1_DTSEC	7 -#define CONFIG_SYS_NUM_FM1_10GEC	1 -#define CONFIG_SYS_NUM_FM2_DTSEC	7 -#define CONFIG_SYS_NUM_FM2_10GEC	1 -#define CONFIG_NUM_DDR_CONTROLLERS	2  #define CONFIG_SYS_FSL_DDR_VER		FSL_DDR_VER_4_7  #define CONFIG_SYS_FMAN_V3  #define CONFIG_SYS_FM_MURAM_SIZE	0x60000 diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h index 943bf6701..fa1dcc352 100644 --- a/include/configs/t4qds.h +++ b/include/configs/t4qds.h @@ -37,7 +37,6 @@  /* High Level Configuration Options */  #define CONFIG_BOOKE -#define CONFIG_E6500  #define CONFIG_E500			/* BOOKE e500 family */  #define CONFIG_E500MC			/* BOOKE e500mc family */  #define CONFIG_SYS_BOOK3E_HV		/* Category E.HV supported */ |