diff options
36 files changed, 180 insertions, 116 deletions
@@ -1733,9 +1733,13 @@ M54455EVB_i66_config : unconfig >include/config.h ; \ if [ "$${FLASH}" == "INTEL" ] ; then \ echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ + echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + cp $(obj)board/freescale/m54455evb/u-boot.int $(obj)board/freescale/m54455evb/u-boot.lds ; \ echo "... with INTEL boot..." ; \ else \ echo "#define CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \ + echo "TEXT_BASE = 0x04000000" > $(obj)board/freescale/m54455evb/config.tmp ; \ + cp $(obj)board/freescale/m54455evb/u-boot.atm $(obj)board/freescale/m54455evb/u-boot.lds ; \ echo "... with ATMEL boot..." ; \ fi; \ echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \ diff --git a/board/cds/common/ft_board.c b/board/cds/common/ft_board.c index 9d97905ca..3eda1009e 100644 --- a/board/cds/common/ft_board.c +++ b/board/cds/common/ft_board.c @@ -37,17 +37,24 @@ static void cds_pci_fixup(void *blob) map = ft_get_prop(blob, "/" OF_SOC "/pci@8000/interrupt-map", &len); - len /= sizeof(u32); + if (!map) + map = ft_get_prop(blob, "/" OF_PCI "/interrupt-map", &len); - slot = get_pci_slot(); + if (map) { + len /= sizeof(u32); - for (i=0;i<len;i+=7) { - /* We rotate the interrupt pins so that the mapping - * changes depending on the slot the carrier card is in. - */ - map[3] = ((map[3] + slot - 2) % 4) + 1; + slot = get_pci_slot(); - map+=7; + for (i=0;i<len;i+=7) { + /* We rotate the interrupt pins so that the mapping + * changes depending on the slot the carrier card is in. + */ + map[3] = ((map[3] + slot - 2) % 4) + 1; + + map+=7; + } + } else { + printf("*** Warning - No PCI node found\n"); } } #endif diff --git a/board/dbau1x00/u-boot.lds b/board/dbau1x00/u-boot.lds index 10c991798..9639b81ac 100644 --- a/board/dbau1x00/u-boot.lds +++ b/board/dbau1x00/u-boot.lds @@ -43,14 +43,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk index ce014edca..b42fcc94c 100644 --- a/board/freescale/m54455evb/config.mk +++ b/board/freescale/m54455evb/config.mk @@ -22,4 +22,6 @@ # MA 02111-1307 USA # -TEXT_BASE = 0 +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/gth2/u-boot.lds b/board/gth2/u-boot.lds index 8ba0b6d4c..90432cb88 100644 --- a/board/gth2/u-boot.lds +++ b/board/gth2/u-boot.lds @@ -43,14 +43,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } + . = .; + _gp = ALIGN(16) + 0x7ff0; - _gp = ALIGN(16); - - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds index 10c991798..9639b81ac 100644 --- a/board/incaip/u-boot.lds +++ b/board/incaip/u-boot.lds @@ -43,14 +43,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c index 243d6a4d8..7d6d1d623 100644 --- a/board/m5282evb/m5282evb.c +++ b/board/m5282evb/m5282evb.c @@ -89,4 +89,5 @@ long int initdram (int board_type) /* Write to the SDRAM Mode Register */ *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696; } + return dramsize; } diff --git a/board/pb1x00/u-boot.lds b/board/pb1x00/u-boot.lds index a2d19a84c..363d974c4 100644 --- a/board/pb1x00/u-boot.lds +++ b/board/pb1x00/u-boot.lds @@ -43,14 +43,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } + . = .; + _gp = ALIGN(16) + 0x7ff0; - _gp = ALIGN(16); - - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index 1bdac1f4a..e7ec012c3 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -53,14 +53,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/board/tb0229/u-boot.lds b/board/tb0229/u-boot.lds index 30a2bc57e..b2fa9f22d 100644 --- a/board/tb0229/u-boot.lds +++ b/board/tb0229/u-boot.lds @@ -43,14 +43,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } - - _gp = ALIGN(16); + . = .; + _gp = ALIGN(16) + 0x7ff0; - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S index 686e2a533..260a09abf 100644 --- a/cpu/mcf52x2/start.S +++ b/cpu/mcf52x2/start.S @@ -58,7 +58,7 @@ _vectors: .long 0x00000000 /* Flash offset is 0 until we setup CS0 */ #if defined(CONFIG_R5200) .long 0x400 -#elif defined(CONFIG_M5282) +#elif defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) .long _start - TEXT_BASE #else .long _START @@ -177,7 +177,11 @@ _after_flashbar_copy: * therefore no VBR to set */ #if !defined(CONFIG_MONITOR_IS_IN_RAM) +#if defined(CONFIG_M5282) && (TEXT_BASE == CFG_INT_FLASH_BASE) + move.l #CFG_INT_FLASH_BASE, %d0 +#else move.l #CFG_FLASH_BASE, %d0 +#endif movec %d0, %VBR #endif diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S index 5cc1c87cd..61be2eac6 100644 --- a/cpu/mcf532x/start.S +++ b/cpu/mcf532x/start.S @@ -131,7 +131,7 @@ _start: movec %d0, %VBR move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 + movec %d0, %RAMBAR1 /* invalidate and disable cache */ move.l #0x01000000, %d0 /* Invalidate cache cmd */ @@ -268,7 +268,7 @@ _int_handler: icache_enable: move.l #0x01000000, %d0 /* Invalidate cache cmd */ movec %d0, %CACR /* Invalidate cache */ - move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0 + move.l #(CFG_SDRAM_BASE + 0x1c000), %d0 movec %d0, %ACR0 /* Enable cache */ move.l #0x80000200, %d0 /* Setup cache mask */ diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk index b29986e26..487c4eb5d 100644 --- a/cpu/mips/config.mk +++ b/cpu/mips/config.mk @@ -35,6 +35,6 @@ else ENDIANNESS = -EB endif -MIPSFLAGS += $(ENDIANNESS) -mabicalls +MIPSFLAGS += $(ENDIANNESS) PLATFORM_CPPFLAGS += $(MIPSFLAGS) diff --git a/cpu/mips/start.S b/cpu/mips/start.S index e91e2137d..074d01d2d 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -234,11 +234,11 @@ reset: li t0, CONF_CM_UNCACHED mtc0 t0, CP0_CONFIG - /* Initialize GOT pointer. + /* Initialize $gp. */ bal 1f nop - .word _GLOBAL_OFFSET_TABLE_ + .word _gp 1: move gp, ra lw t1, 0(ra) @@ -306,9 +306,9 @@ relocate_code: move t1, a2 /* - * Fix GOT pointer: + * Fix $gp: * - * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address + * New $gp = (Old $gp - CFG_MONITOR_BASE) + Destination Address */ move t6, gp sub gp, CFG_MONITOR_BASE @@ -341,15 +341,22 @@ relocate_code: j t0 nop + .gpword _GLOBAL_OFFSET_TABLE_ /* _GLOBAL_OFFSET_TABLE_ - _gp */ .word uboot_end_data .word uboot_end .word num_got_entries in_ram: - /* Now we want to update GOT. + /* + * Now we want to update GOT. + * + * GOT[0] is reserved. GOT[1] is also reserved for the dynamic object + * generated by GNU ld. Skip these reserved entries from relocation. */ lw t3, -4(t0) /* t3 <-- num_got_entries */ - addi t4, gp, 8 /* Skipping first two entries. */ + lw t4, -16(t0) /* t4 <-- (_GLOBAL_OFFSET_TABLE_ - _gp) */ + add t4, t4, gp /* t4 now holds _GLOBAL_OFFSET_TABLE_ */ + addi t4, t4, 8 /* Skipping first two entries. */ li t2, 2 1: lw t1, 0(t4) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index 08e04685f..bbc54448d 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -163,7 +163,12 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) * Initiate hard reset in debug control register DBCR0 * Make sure MSR[DE] = 1 */ - unsigned long val; + unsigned long val, msr; + + msr = mfmsr (); + msr |= MSR_DE; + mtmsr (msr); + val = mfspr(DBCR0); val |= 0x70000000; mtspr(DBCR0,val); diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index 2c98c2ad8..ada6ea505 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -218,6 +218,8 @@ _start_e500: bdnz 0b /* Clear and set up some registers. */ + li r0,0 + mtmsr r0 li r0,0x0000 lis r1,0xffff mtspr DEC,r0 /* prevent dec exceptions */ @@ -266,18 +268,17 @@ _start_e500: */ lis r3,CFG_INIT_RAM_ADDR@h ori r3,r3,CFG_INIT_RAM_ADDR@l - li r2,512 /* 512*32=16K */ + li r2,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r2 li r0,0 1: dcbz r0,r3 dcbtls 0,r0,r3 - addi r3,r3,32 + addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b /* Jump out the last 4K page and continue to 'normal' start */ #ifdef CFG_RAMBOOT - bl 3f b _start_cont #else /* Calculate absolute address in FLASH and jump there */ @@ -286,15 +287,9 @@ _start_e500: ori r3,r3,CFG_MONITOR_BASE@l addi r3,r3,_start_cont - _start + _START_OFFSET mtlr r3 + blr #endif -3: li r0,0 - mtspr SRR1,r0 /* Keep things disabled for now */ - mflr r1 - mtspr SRR0,r1 - rfi - isync - .text .globl _start _start: @@ -701,6 +696,7 @@ in8: .globl out8 out8: stb r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -710,6 +706,7 @@ out8: .globl out16 out16: sth r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -719,6 +716,7 @@ out16: .globl out16r out16r: sthbrx r4,r0,r3 + sync blr /*------------------------------------------------------------------------------- */ @@ -728,6 +726,7 @@ out16r: .globl out32 out32: stw r4,0x0000(r3) + sync blr /*------------------------------------------------------------------------------- */ @@ -737,6 +736,7 @@ out32: .globl out32r out32r: stwbrx r4,r0,r3 + sync blr /*------------------------------------------------------------------------------- */ @@ -1061,11 +1061,11 @@ unlock_ram_in_cache: /* invalidate the INIT_RAM section */ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l - li r4,512 + li r4,(CFG_DCACHE_SIZE / (2 * CFG_CACHELINE_SIZE)) mtctr r4 1: icbi r0,r3 dcbi r0,r3 - addi r3,r3,32 + addi r3,r3,CFG_CACHELINE_SIZE bdnz 1b sync /* Wait for all icbi to complete on bus */ isync diff --git a/drivers/Makefile b/drivers/Makefile index 00978d828..d19588f3a 100755 --- a/drivers/Makefile +++ b/drivers/Makefile @@ -45,7 +45,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o \ s3c4510b_eth.o s3c4510b_uart.o \ sed13806.o sed156x.o \ serial.o serial_max3100.o \ - serial_pl010.o serial_pl011.o serial_xuartlite.o \ + serial_xuartlite.o \ sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \ status_led.o sym53c8xx.o systemace.o ahci.o \ ti_pci1410a.o tigon3.o tqm8xx_pcmcia.o tsec.o \ diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 93c68dd2e..40f3d672e 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile @@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk LIB := $(obj)libserial.a -COBJS := mcfuart.o +COBJS := mcfuart.o serial_pl010.o serial_pl011.o SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) diff --git a/drivers/serial_pl010.c b/drivers/serial/serial_pl010.c index 417b6aeda..417b6aeda 100644 --- a/drivers/serial_pl010.c +++ b/drivers/serial/serial_pl010.c diff --git a/drivers/serial_pl011.c b/drivers/serial/serial_pl011.c index 4d35fe5e9..4d35fe5e9 100644 --- a/drivers/serial_pl011.c +++ b/drivers/serial/serial_pl011.c diff --git a/drivers/serial_pl011.h b/drivers/serial/serial_pl011.h index 5f20fdd10..5f20fdd10 100644 --- a/drivers/serial_pl011.h +++ b/drivers/serial/serial_pl011.h diff --git a/drivers/tsec.c b/drivers/tsec.c index 4ff3339c7..7ba8f0cac 100644 --- a/drivers/tsec.c +++ b/drivers/tsec.c @@ -803,6 +803,7 @@ static void startup_tsec(struct eth_device *dev) /* Tell the DMA it is clear to go */ regs->dmactrl |= DMACTRL_INIT_SETTINGS; regs->tstat = TSTAT_CLEAR_THALT; + regs->rstat = RSTAT_CLEAR_RHALT; regs->dmactrl &= ~(DMACTRL_GRS | DMACTRL_GTS); } diff --git a/examples/mips.lds b/examples/mips.lds index 9d9849bf5..a7707287a 100644 --- a/examples/mips.lds +++ b/examples/mips.lds @@ -39,14 +39,14 @@ SECTIONS . = ALIGN(4); .data : { *(.data) } - . = ALIGN(4); - .sdata : { *(.sdata) } + . = .; + _gp = ALIGN(16) + 0x7ff0; - _gp = ALIGN(16); - - __got_start = .; - .got : { *(.got) } - __got_end = .; + .got : { + __got_start = .; + *(.got) + __got_end = .; + } .sdata : { *(.sdata) } diff --git a/include/asm-mips/addrspace.h b/include/asm-mips/addrspace.h index b8214b1c8..0e6abd7d0 100644 --- a/include/asm-mips/addrspace.h +++ b/include/asm-mips/addrspace.h @@ -49,7 +49,7 @@ cannot access physical memory directly from core */ #define UNCACHED_SDRAM(a) (((unsigned long)(a)) | 0x20000000) #else /* !CONFIG_AU1X00 */ -#define UNCACHED_SDRAM(a) PHYSADDR(a) +#define UNCACHED_SDRAM(a) KSEG1ADDR(a) #endif /* CONFIG_AU1X00 */ #endif /* __ASSEMBLY__ */ /* diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h index 48170e7a3..f5e1b646c 100644 --- a/include/configs/M5253EVBE.h +++ b/include/configs/M5253EVBE.h @@ -146,7 +146,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ #ifdef CONFIG_MONITOR_IS_IN_RAM #define CFG_MONITOR_BASE 0x20000 diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index 3c17c1ea1..7bb9f60f7 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -163,7 +163,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 -#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ #define CFG_FLASH_BASE 0xffe00000 #define CFG_INT_FLASH_BASE 0xf0000000 #define CFG_INT_FLASH_ENABLE 0x21 diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index d3b160505..47d74a3c3 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -175,7 +175,7 @@ * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x40000000 -#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */ +#define CFG_SDRAM_SIZE 32 /* SDRAM size in MB */ #define CFG_SDRAM_CFG1 0x53722730 #define CFG_SDRAM_CFG2 0x56670000 #define CFG_SDRAM_CTRL 0xE1092000 diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h index 6f4859c23..ba050cb7e 100644 --- a/include/configs/M54455EVB.h +++ b/include/configs/M54455EVB.h @@ -27,8 +27,8 @@ * board/config.h - configuration options, board specific */ -#ifndef _JAMICA54455_H -#define _JAMICA54455_H +#ifndef _M54455EVB_H +#define _M54455EVB_H /* * High Level Configuration Options @@ -75,7 +75,7 @@ #define CONFIG_CMD_MISC #define CONFIG_CMD_MII #define CONFIG_CMD_NET -#define CONFIG_CMD_PCI +#undef CONFIG_CMD_PCI #define CONFIG_CMD_PING #define CONFIG_CMD_REGINFO @@ -129,8 +129,8 @@ "u-boot=u-boot.bin\0" \ "load=tftp ${loadaddr) ${u-boot}\0" \ "upd=run load; run prog\0" \ - "prog=prot off 0 2ffff;" \ - "era 0 2ffff;" \ + "prog=prot off 4000000 402ffff;" \ + "era 4000000 402ffff;" \ "cp.b ${loadaddr} 0 ${filesize};" \ "save\0" \ "" @@ -174,6 +174,7 @@ #define CFG_IMMR CFG_MBAR /* PCI */ +#ifdef CONFIG_CMD_PCI #define CONFIG_PCI 1 #define CFG_PCI_MEM_BUS 0xA0000000 @@ -187,6 +188,7 @@ #define CFG_PCI_CFG_BUS 0xB0000000 #define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS #define CFG_PCI_CFG_SIZE 0x01000000 +#endif /* FPGA - Spartan 2 */ /* experiment @@ -268,8 +270,6 @@ /* Configuration for environment * Environment is embedded in u-boot in the second sector of the flash */ -#define CFG_ENV_OFFSET 0x4000 -#define CFG_ENV_SECT_SIZE 0x2000 #define CFG_ENV_IS_IN_FLASH 1 #define CONFIG_ENV_OVERWRITE 1 #undef CFG_ENV_IS_EMBEDDED @@ -278,13 +278,17 @@ * FLASH organization */ #ifdef CFG_ATMEL_BOOT -# define CFG_FLASH_BASE 0 +# define CFG_FLASH_BASE CFG_CS0_BASE # define CFG_FLASH0_BASE CFG_CS0_BASE # define CFG_FLASH1_BASE CFG_CS1_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000) +# define CFG_ENV_SECT_SIZE 0x2000 #else # define CFG_FLASH_BASE CFG_FLASH0_BASE # define CFG_FLASH0_BASE CFG_CS1_BASE # define CFG_FLASH1_BASE CFG_CS0_BASE +# define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000) +# define CFG_ENV_SECT_SIZE 0x20000 #endif /* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system @@ -328,9 +332,9 @@ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support. */ #ifdef CFG_ATMEL_BOOT -# define CONFIG_JFFS2_DEV "nor0" +# define CONFIG_JFFS2_DEV "nor1" # define CONFIG_JFFS2_PART_SIZE 0x01000000 -# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE +# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH1_BASE + 0x500000) #else # define CONFIG_JFFS2_DEV "nor0" # define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000) @@ -356,20 +360,20 @@ #ifdef CFG_ATMEL_BOOT /* Atmel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x04000000 #define CFG_CS0_MASK 0x00070001 #define CFG_CS0_CTRL 0x00001140 /* Intel Flash */ -#define CFG_CS1_BASE 0x04000000 +#define CFG_CS1_BASE 0x00000000 #define CFG_CS1_MASK 0x01FF0001 -#define CFG_CS1_CTRL 0x003F3D60 +#define CFG_CS1_CTRL 0x00000D60 #define CFG_ATMEL_BASE CFG_CS0_BASE #else /* Intel Flash */ -#define CFG_CS0_BASE 0 +#define CFG_CS0_BASE 0x00000000 #define CFG_CS0_MASK 0x01FF0001 -#define CFG_CS0_CTRL 0x003F3D60 +#define CFG_CS0_CTRL 0x00000D60 /* Atmel Flash */ #define CFG_CS1_BASE 0x04000000 #define CFG_CS1_MASK 0x00070001 @@ -388,4 +392,4 @@ #define CFG_CS3_MASK 0x00070001 #define CFG_CS3_CTRL 0x00000020 -#endif /* _JAMICA54455_H */ +#endif /* _M54455EVB_H */ diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 4e061bd9f..8dda6651e 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8541@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8541@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 608371518..4edc7fd2b 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -340,6 +340,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8548@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8548@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 1d1b7c907..c414bf033 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -316,6 +316,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8555@e0000000" #define OF_TBCLK (bd->bi_busfreq / 8) #define OF_STDOUT_PATH "/soc8555@e0000000/serial@4600" +#define OF_PCI "pci@e0008000" /* * I2C diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index ba744e99f..548e1582a 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -297,7 +297,7 @@ extern unsigned long get_clock_freq(void); #define OF_SOC "soc8568@e0000000" #define OF_QE "qe@e0080000" #define OF_TBCLK (bd->bi_busfreq / 8) -#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600" +#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4500" /* * I2C diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 1809fc5d8..b33e26fe0 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -114,15 +114,10 @@ #define CONFIG_AUTOBOOT_STOP_STR " " /* - * These are "locally administered ethernet addresses" generated by - * ./tools/gen_eth_addr - * - * After booting the board for the first time, new addresses should be - * generated and assigned to the environment variables "ethaddr" and - * "eth1addr". + * After booting the board for the first time, new ethernet addresses + * should be generated and assigned to the environment variables + * "ethaddr" and "eth1addr". This is normally done during production. */ -#define CONFIG_ETHADDR 6a:87:71:14:cd:cb -#define CONFIG_ETH1ADDR ca:f8:15:e6:3e:e6 #define CONFIG_OVERWRITE_ETHADDR_ONCE 1 #define CONFIG_NET_MULTI 1 diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c index bea97441b..cc974c2d6 100644 --- a/lib_m68k/m68k_linux.c +++ b/lib_m68k/m68k_linux.c @@ -26,6 +26,7 @@ #include <image.h> #include <zlib.h> #include <bzlib.h> +#include <watchdog.h> #include <environment.h> #include <asm/byteorder.h> @@ -36,6 +37,8 @@ DECLARE_GLOBAL_DATA_PTR; #define LINUX_MAX_ENVS 256 #define LINUX_MAX_ARGS 256 +#define CHUNKSZ (64 * 1024) + #ifdef CONFIG_SHOW_BOOT_PROGRESS # include <status_led.h> # define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg) diff --git a/mips_config.mk b/mips_config.mk index d8aa5fa77..67fb67d29 100644 --- a/mips_config.mk +++ b/mips_config.mk @@ -22,3 +22,28 @@ # PLATFORM_CPPFLAGS += -DCONFIG_MIPS -D__MIPS__ + +# +# From Linux arch/mips/Makefile +# +# GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel +# code since it only slows down the whole thing. At some point we might make +# use of global pointer optimizations but their use of $28 conflicts with +# the current pointer optimization. +# +# The DECStation requires an ECOFF kernel for remote booting, other MIPS +# machines may also. Since BFD is incredibly buggy with respect to +# crossformat linking we rely on the elf2ecoff tool for format conversion. +# +# cflags-y += -G 0 -mno-abicalls -fno-pic -pipe +# cflags-y += -msoft-float +# LDFLAGS_vmlinux += -G 0 -static -n -nostdlib +# MODFLAGS += -mlong-calls +# + +# +# Meanwhile, U-Boot rely on PIC. We add proper switches explicitly. +# +PLATFORM_CPPFLAGS += -G 0 -mabicalls -fpic -pipe +PLATFORM_CPPFLAGS += -msoft-float +PLATFORM_LDFLAGS += -G 0 -static -n -nostdlib diff --git a/net/bootp.c b/net/bootp.c index 749d3e5e0..cfe6f8dd6 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -850,9 +850,9 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer) bp->bp_hlen = HWL_ETHER; bp->bp_hops = 0; bp->bp_secs = htons(get_timer(0) / CFG_HZ); - NetCopyIP(&bp->bp_ciaddr, &bp_offer->bp_ciaddr); /* both in network byte order */ - NetCopyIP(&bp->bp_yiaddr, &bp_offer->bp_yiaddr); - NetCopyIP(&bp->bp_siaddr, &bp_offer->bp_siaddr); + /* Do not set the client IP, your IP, or server IP yet, since it hasn't been ACK'ed by + * the server yet */ + /* * RFC3046 requires Relay Agents to discard packets with * nonzero and offered giaddr @@ -870,7 +870,9 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer) /* * Copy options from OFFER packet if present */ - NetCopyIP(&OfferedIP, &bp->bp_yiaddr); + + /* Copy offered IP into the parameters request list */ + NetCopyIP(&OfferedIP, &bp_offer->bp_yiaddr); extlen = DhcpExtended((u8 *)bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP); pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen; @@ -980,3 +982,4 @@ void DhcpRequest(void) #endif #endif + |