diff options
| -rw-r--r-- | board/hmi1001/hmi1001.c | 18 | 
1 files changed, 18 insertions, 0 deletions
| diff --git a/board/hmi1001/hmi1001.c b/board/hmi1001/hmi1001.c index 9fa0e747b..3ecb74a0c 100644 --- a/board/hmi1001/hmi1001.c +++ b/board/hmi1001/hmi1001.c @@ -147,6 +147,24 @@ long int initdram (int board_type)  #endif /* CFG_RAMBOOT */ +	/* +	 * On MPC5200B we need to set the special configuration delay in the +	 * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM +	 * Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190: +	 * +	 * "The SDelay should be written to a value of 0x00000004. It is +	 * required to account for changes caused by normal wafer processing +	 * parameters." +	 */ +	svr = get_svr(); +	pvr = get_pvr(); +	if ((SVR_MJREV(svr) >= 2) && +	    (PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) { + +		*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04; +		__asm__ volatile ("sync"); +	} +  /*	return dramsize + dramsize2; */  	return dramsize;  } |