diff options
| -rw-r--r-- | board/xm250/Makefile | 43 | ||||
| -rw-r--r-- | board/xm250/flash.c | 535 | ||||
| -rw-r--r-- | board/xm250/xm250.c | 95 | ||||
| -rw-r--r-- | boards.cfg | 1 | ||||
| -rw-r--r-- | doc/README.scrapyard | 1 | ||||
| -rw-r--r-- | include/configs/xm250.h | 369 | 
6 files changed, 1 insertions, 1043 deletions
| diff --git a/board/xm250/Makefile b/board/xm250/Makefile deleted file mode 100644 index 6a0cca0f9..000000000 --- a/board/xm250/Makefile +++ /dev/null @@ -1,43 +0,0 @@ -# -# (C) Copyright 2000-2006 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB	= $(obj)lib$(BOARD).o - -COBJS	:= xm250.o flash.o - -SRCS	:= $(COBJS:.o=.c) -OBJS	:= $(addprefix $(obj),$(COBJS)) - -$(LIB):	$(obj).depend $(OBJS) -	$(call cmd_link_o_target, $(OBJS)) - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/xm250/flash.c b/board/xm250/flash.c deleted file mode 100644 index e825abae1..000000000 --- a/board/xm250/flash.c +++ /dev/null @@ -1,535 +0,0 @@ -/* - * (C) Copyright 2001 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2001-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <common.h> -#include <linux/byteorder/swab.h> - - -flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];	/* info for FLASH chips    */ - -/* Board support for 1 or 2 flash devices */ -#define FLASH_PORT_WIDTH32 -#undef FLASH_PORT_WIDTH16 - -#ifdef FLASH_PORT_WIDTH16 -#define FLASH_PORT_WIDTH		ushort -#define FLASH_PORT_WIDTHV		vu_short -#define SWAP(x)               __swab16(x) -#else -#define FLASH_PORT_WIDTH		ulong -#define FLASH_PORT_WIDTHV		vu_long -#define SWAP(x)               __swab32(x) -#endif - -/* Intel-compatible flash ID */ -#define INTEL_COMPAT  0x00890089 -#define INTEL_ALT     0x00B000B0 - -/* Intel-compatible flash commands */ -#define INTEL_PROGRAM 0x00100010 -#define INTEL_ERASE   0x00200020 -#define INTEL_CLEAR   0x00500050 -#define INTEL_LOCKBIT 0x00600060 -#define INTEL_PROTECT 0x00010001 -#define INTEL_STATUS  0x00700070 -#define INTEL_READID  0x00900090 -#define INTEL_CONFIRM 0x00D000D0 -#define INTEL_RESET   0xFFFFFFFF - -/* Intel-compatible flash status bits */ -#define INTEL_FINISHED 0x00800080 -#define INTEL_OK       0x00800080 - -#define FPW	   FLASH_PORT_WIDTH -#define FPWV   FLASH_PORT_WIDTHV - -#define mb() __asm__ __volatile__ ("" : : : "memory") - -/*----------------------------------------------------------------------- - * Functions - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info); -static int write_data (flash_info_t *info, ulong dest, FPW data); -static void flash_get_offsets (ulong base, flash_info_t *info); -void inline spin_wheel (void); - -/*----------------------------------------------------------------------- - */ - -unsigned long flash_init (void) -{ -	int i; -	ulong size = 0; - -	for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) { -		switch (i) { -		case 0: -			flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); -			flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); -			break; -		case 1: -			flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]); -			flash_get_offsets (PHYS_FLASH_2, &flash_info[i]); -			break; -		default: -			panic ("configured to many flash banks!\n"); -			break; -		} -		size += flash_info[i].size; -	} - -	/* Protect monitor and environment sectors -	 */ -	flash_protect ( FLAG_PROTECT_SET, -			CONFIG_SYS_FLASH_BASE, -			CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, -			&flash_info[0] ); - -	flash_protect ( FLAG_PROTECT_SET, -			CONFIG_ENV_ADDR, -			CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] ); - -	return size; -} - -/*----------------------------------------------------------------------- - */ -static void flash_get_offsets (ulong base, flash_info_t *info) -{ -	int i; - -	if (info->flash_id == FLASH_UNKNOWN) { -		return; -	} - -	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { -		for (i = 0; i < info->sector_count; i++) { -			info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE); -			info->protect[i] = 0; -		} -	} -} - -/*----------------------------------------------------------------------- - */ -void flash_print_info (flash_info_t *info) -{ -	int i; - -	if (info->flash_id == FLASH_UNKNOWN) { -		printf ("missing or unknown FLASH type\n"); -		return; -	} - -	switch (info->flash_id & FLASH_VENDMASK) { -	case FLASH_MAN_INTEL: -		printf ("INTEL "); -		break; -	default: -		printf ("Unknown Vendor "); -		break; -	} - -	switch (info->flash_id & FLASH_TYPEMASK) { -	case FLASH_28F128J3A: -		printf ("28F128J3A\n"); -		break; - -	case FLASH_28F640J3A: -		printf ("28F640J3A\n"); -		break; -	default: -		printf ("Unknown Chip Type\n"); -		break; -	} - -	printf ("  Size: %ld MB in %d Sectors\n", -			info->size >> 20, info->sector_count); - -	printf ("  Sector Start Addresses:"); -	for (i = 0; i < info->sector_count; ++i) { -		if ((i % 5) == 0) -			printf ("\n   "); -		printf (" %08lX%s", -			info->start[i], -			info->protect[i] ? " (RO)" : "     "); -	} -	printf ("\n"); -	return; -} - -/* - * The following code cannot be run from FLASH! - */ -static ulong flash_get_size (FPW *addr, flash_info_t *info) -{ -	volatile FPW value; - -	/* Write auto select command: read Manufacturer ID */ -	addr[0x5555] = (FPW) 0x00AA00AA; -	addr[0x2AAA] = (FPW) 0x00550055; -	addr[0x5555] = (FPW) 0x00900090; - -	mb (); -	value = addr[0]; - -	switch (value) { - -	case (FPW) INTEL_MANUFACT: -		info->flash_id = FLASH_MAN_INTEL; -		break; - -	default: -		info->flash_id = FLASH_UNKNOWN; -		info->sector_count = 0; -		info->size = 0; -		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */ -		return (0);			/* no or unknown flash  */ -	} - -	mb (); -	value = addr[1];			/* device ID        */ - -	switch (value) { - -	case (FPW) INTEL_ID_28F128J3A: -		info->flash_id += FLASH_28F128J3A; -		info->sector_count = 128; -		info->size = 0x02000000; -		break;				/* => 32 MB     */ - -	case (FPW) INTEL_ID_28F640J3A: -		info->flash_id += FLASH_28F640J3A; -		info->sector_count = 64; -		info->size = 0x01000000; -		break;				/* => 16 MB     */ - -	default: -		info->flash_id = FLASH_UNKNOWN; -		break; -	} - -	if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) { -		printf ("** ERROR: sector count %d > max (%d) **\n", -			info->sector_count, CONFIG_SYS_MAX_FLASH_SECT); -		info->sector_count = CONFIG_SYS_MAX_FLASH_SECT; -	} - -	addr[0] = (FPW) 0x00FF00FF;		/* restore read mode */ - -	return (info->size); -} - - -/*----------------------------------------------------------------------- - */ - -int flash_erase (flash_info_t *info, int s_first, int s_last) -{ -	int flag, prot, sect; -	ulong type, start; -	int rcode = 0; - -	if ((s_first < 0) || (s_first > s_last)) { -		if (info->flash_id == FLASH_UNKNOWN) { -			printf ("- missing\n"); -		} else { -			printf ("- no sectors to erase\n"); -		} -		return 1; -	} - -	type = (info->flash_id & FLASH_VENDMASK); -	if ((type != FLASH_MAN_INTEL)) { -		printf ("Can't erase unknown flash type %08lx - aborted\n", -			info->flash_id); -		return 1; -	} - -	prot = 0; -	for (sect = s_first; sect <= s_last; ++sect) { -		if (info->protect[sect]) { -			prot++; -		} -	} - -	if (prot) { -		printf ("- Warning: %d protected sectors will not be erased!\n", -			prot); -	} else { -		printf ("\n"); -	} - -	/* Disable interrupts which might cause a timeout here */ -	flag = disable_interrupts (); - -	/* Start erase on unprotected sectors */ -	for (sect = s_first; sect <= s_last; sect++) { -		if (info->protect[sect] == 0) {	/* not protected */ -			FPWV *addr = (FPWV *) (info->start[sect]); -			FPW status; - -			printf ("Erasing sector %2d ... ", sect); - -			/* arm simple, non interrupt dependent timer */ -			start = get_timer(0); - -			*addr = (FPW) 0x00500050;	/* clear status register */ -			*addr = (FPW) 0x00200020;	/* erase setup */ -			*addr = (FPW) 0x00D000D0;	/* erase confirm */ - -			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { -				if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) { -					printf ("Timeout\n"); -					*addr = (FPW) 0x00B000B0;	/* suspend erase     */ -					*addr = (FPW) 0x00FF00FF;	/* reset to read mode */ -					rcode = 1; -					break; -				} -			} - -			*addr = 0x00500050;	/* clear status register cmd.   */ -			*addr = 0x00FF00FF;	/* resest to read mode          */ - -			printf (" done\n"); -		} -	} -	return rcode; -} - -/*----------------------------------------------------------------------- - * Copy memory to flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - * 4 - Flash not identified - */ - -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ -	ulong cp, wp; -	FPW data; -	int count, i, l, rc, port_width; - -	if (info->flash_id == FLASH_UNKNOWN) { -		return 4; -	} -/* get lower word aligned address */ -#ifdef FLASH_PORT_WIDTH16 -	wp = (addr & ~1); -	port_width = 2; -#else -	wp = (addr & ~3); -	port_width = 4; -#endif - -	/* -	 * handle unaligned start bytes -	 */ -	if ((l = addr - wp) != 0) { -		data = 0; -		for (i = 0, cp = wp; i < l; ++i, ++cp) { -			data = (data << 8) | (*(uchar *) cp); -		} -		for (; i < port_width && cnt > 0; ++i) { -			data = (data << 8) | *src++; -			--cnt; -			++cp; -		} -		for (; cnt == 0 && i < port_width; ++i, ++cp) { -			data = (data << 8) | (*(uchar *) cp); -		} - -		if ((rc = write_data (info, wp, SWAP (data))) != 0) { -			return (rc); -		} -		wp += port_width; -	} - -	/* -	 * handle word aligned part -	 */ -	count = 0; -	while (cnt >= port_width) { -		data = 0; -		for (i = 0; i < port_width; ++i) { -			data = (data << 8) | *src++; -		} -		if ((rc = write_data (info, wp, SWAP (data))) != 0) { -			return (rc); -		} -		wp += port_width; -		cnt -= port_width; -		if (count++ > 0x800) { -			spin_wheel (); -			count = 0; -		} -	} - -	if (cnt == 0) { -		return (0); -	} - -	/* -	 * handle unaligned tail bytes -	 */ -	data = 0; -	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { -		data = (data << 8) | *src++; -		--cnt; -	} -	for (; i < port_width; ++i, ++cp) { -		data = (data << 8) | (*(uchar *) cp); -	} - -	return (write_data (info, wp, SWAP (data))); -} - -/*----------------------------------------------------------------------- - * Write a word or halfword to Flash, returns: - * 0 - OK - * 1 - write timeout - * 2 - Flash not erased - */ -static int write_data (flash_info_t *info, ulong dest, FPW data) -{ -	FPWV *addr = (FPWV *) dest; -	ulong status; -	int flag; -	ulong start; - -	/* Check if Flash is (sufficiently) erased */ -	if ((*addr & data) != data) { -		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr); -		return (2); -	} -	/* Disable interrupts which might cause a timeout here */ -	flag = disable_interrupts (); - -	*addr = (FPW) 0x00400040;	/* write setup */ -	*addr = data; - -	/* arm simple, non interrupt dependent timer */ -	start = get_timer(0); - -	/* wait while polling the status register */ -	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { -		if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) { -			*addr = (FPW) 0x00FF00FF;	/* restore read mode */ -			return (1); -		} -	} - -	*addr = (FPW) 0x00FF00FF;	/* restore read mode */ - -	return (0); -} - -void inline spin_wheel (void) -{ -	static int p = 0; -	static char w[] = "\\/-"; - -	printf ("\010%c", w[p]); -	(++p == 3) ? (p = 0) : 0; -} - -/*----------------------------------------------------------------------- - * Set/Clear sector's lock bit, returns: - * 0 - OK - * 1 - Error (timeout, voltage problems, etc.) - */ -int flash_real_protect(flash_info_t *info, long sector, int prot) -{ -	int i; -	int rc = 0; -	vu_long *addr = (vu_long *)(info->start[sector]); -	int flag = disable_interrupts(); -	ulong start; - -	*addr = INTEL_CLEAR;	/* Clear status register */ -	if (prot) {			/* Set sector lock bit */ -		*addr = INTEL_LOCKBIT;	/* Sector lock bit */ -		*addr = INTEL_PROTECT;	/* set */ -	} -	else {				/* Clear sector lock bit */ -		*addr = INTEL_LOCKBIT;	/* All sectors lock bits */ -		*addr = INTEL_CONFIRM;	/* clear */ -	} - -	start = get_timer(0); - -	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) { -		if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) { -			printf("Flash lock bit operation timed out\n"); -			rc = 1; -			break; -		} -	} - -	if (*addr != INTEL_OK) { -		printf("Flash lock bit operation failed at %08X, CSR=%08X\n", -		       (uint)addr, (uint)*addr); -		rc = 1; -	} - -	if (!rc) -		info->protect[sector] = prot; - -	/* -	 * Clear lock bit command clears all sectors lock bits, so -	 * we have to restore lock bits of protected sectors. -	 */ -	if (!prot) -	{ -		for (i = 0; i < info->sector_count; i++) -		{ -			if (info->protect[i]) -			{ -				start = get_timer(0); -				addr = (vu_long *)(info->start[i]); -				*addr = INTEL_LOCKBIT;	/* Sector lock bit */ -				*addr = INTEL_PROTECT;	/* set */ -				while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) -				{ -					if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) -					{ -						printf("Flash lock bit operation timed out\n"); -						rc = 1; -						break; -					} -				} -			} -		} -	} - -	if (flag) -		enable_interrupts(); - -	*addr = INTEL_RESET;		/* Reset to read array mode */ - -	return rc; -} diff --git a/board/xm250/xm250.c b/board/xm250/xm250.c deleted file mode 100644 index 3188cf2fa..000000000 --- a/board/xm250/xm250.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <asm/arch/pxa-regs.h> -#include <common.h> -#include <netdev.h> - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ - -/* local prototypes */ - -inline void sleep (int i); - -inline void -/**********************************************************/ -sleep (int i) -/**********************************************************/ -{ -	while (i--) { -		udelay (1000000); -	} -} - -/* - * Miscelaneous platform dependent initialisations - */ - -int -/**********************************************************/ -board_init (void) -/**********************************************************/ -{ -	/* We have RAM, disable cache */ -	dcache_disable(); -	icache_disable(); - -	/* arch number of MicroSys XM250 */ -	gd->bd->bi_arch_number = MACH_TYPE_XM250; - -	/* adress of boot parameters */ -	gd->bd->bi_boot_params = 0xa0000100; - -	return 0; -} - -extern void pxa_dram_init(void); -int dram_init(void) -{ -	pxa_dram_init(); -	gd->ram_size = PHYS_SDRAM_1_SIZE; -	return 0; -} - -void dram_init_banksize(void) -{ -	gd->bd->bi_dram[0].start = PHYS_SDRAM_1; -	gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; -} - -#ifdef CONFIG_CMD_NET -int board_eth_init(bd_t *bis) -{ -	int rc = 0; -#ifdef CONFIG_SMC91111 -	rc = smc91111_initialize(0, CONFIG_SMC91111_BASE); -#endif -	return rc; -} -#endif diff --git a/boards.cfg b/boards.cfg index 35ef5f3b3..3fe96ad34 100644 --- a/boards.cfg +++ b/boards.cfg @@ -227,7 +227,6 @@ vpac270_nor_128              arm         pxa         vpac270             -  vpac270_nor_256              arm         pxa         vpac270             -              -           vpac270:NOR,RAM_256M  vpac270_ond_256              arm         pxa         vpac270             -              -           vpac270:ONENAND,RAM_256M  xaeniax                      arm         pxa -xm250                        arm         pxa  zipitz2                      arm         pxa  jornada                      arm         sa1100  atngw100                     avr32       at32ap      -                   atmel          at32ap700x diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 68bbfeeb3..07f002436 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for...  Board	Arch	CPU	removed	    Commit	last known maintainer/contact  ============================================================================= +xm250   arm     pxa     c746cdd   2011-25-11  pleb2   arm     pxa     b185a1c   2011-25-11  cradle  arm     pxa     4e24f8a   2011-25-11    Kyle Harris <kharris@nexus-tech.net>  cerf250 arm     pxa     a3f1241   2011-25-11    Prakash Kumar <prakash@embedx.com> diff --git a/include/configs/xm250.h b/include/configs/xm250.h deleted file mode 100644 index a35bce370..000000000 --- a/include/configs/xm250.h +++ /dev/null @@ -1,369 +0,0 @@ -/* - * (C) Copyright 2002 - * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net - * - * (C) Copyright 2002 - * Sysgo Real-Time Solutions, GmbH <www.elinos.com> - * Marius Groeger <mgroeger@sysgo.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_PXA250	       1	/* This is an PXA250 CPU	*/ -#define CONFIG_XM250	       1	/* on a MicroSys XM250 Board	*/ -#undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff	*/ -#define	CONFIG_SYS_TEXT_BASE	0x0 - -/* we will never enable dcache, because we have to setup MMU first */ -#define CONFIG_SYS_DCACHE_OFF - -/* - * Size of malloc() pool; this lives below the uppermost 128 KiB which are - * used for the RAM copy of the uboot code - * - */ -#define CONFIG_SYS_MALLOC_LEN		(256*1024) - -/* - * Hardware drivers - */ -#define CONFIG_SMC91111 -#define CONFIG_SMC91111_BASE		0x04000300 -#undef	CONFIG_SMC91111_EXT_PHY -#define CONFIG_SMC_USE_32_BIT -#undef	CONFIG_SHOW_ACTIVITY -#define CONFIG_NET_RETRY_COUNT		10	   /* # of retries		*/ - -/* - * I2C bus - */ -#define CONFIG_I2C_MV			1 -#define CONFIG_MV_I2C_REG		0x40301680 -#define CONFIG_HARD_I2C			1 -#define CONFIG_SYS_I2C_SPEED			50000 -#define CONFIG_SYS_I2C_SLAVE			0xfe - -#define CONFIG_RTC_PCF8563		1 -#define CONFIG_SYS_I2C_RTC_ADDR		0x51 - -#define CONFIG_SYS_I2C_EEPROM_ADDR		0x58	/* A0 = 0 (hardwired)		*/ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	4	/* 4 bits = 16 octets		*/ -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10	/* between stop and start	*/ -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1	/* length of address		*/ -#define CONFIG_SYS_EEPROM_SIZE			2048	/* size in bytes		*/ -#undef	CONFIG_SYS_I2C_INIT_BOARD			/* board has no own init	*/ - -/* - * select serial console configuration - */ -#define CONFIG_PXA_SERIAL -#define CONFIG_FFUART	       1       /* we use FFUART */ - -/* allow to overwrite serial and ethaddr */ -#define CONFIG_ENV_OVERWRITE - -#define CONFIG_BAUDRATE		115200 - - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE -#define CONFIG_BOOTP_BOOTPATH -#define CONFIG_BOOTP_GATEWAY -#define CONFIG_BOOTP_HOSTNAME - - -/* - * Command line configuration. - */ -#include <config_cmd_default.h> - -#define CONFIG_CMD_ELF -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_DATE -#define CONFIG_CMD_I2C - - -#define CONFIG_BOOTDELAY	3 - -/* - * Miscellaneous configurable options - */ -#define CONFIG_SYS_LONGHELP				/* undef to save memory		*/ -#define CONFIG_SYS_PROMPT		"=> "		/* Monitor Command Prompt	*/ -#define CONFIG_SYS_CBSIZE		256		/* Console I/O Buffer Size	*/ -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ -#define CONFIG_SYS_MAXARGS		16		/* max number of command args	*/ -#define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE	/* Boot Argument Buffer Size	*/ - -#define CONFIG_SYS_MEMTEST_START	0xa0400000	/* memtest works on		*/ -#define CONFIG_SYS_MEMTEST_END		0xa0800000	/* 4 ... 8 MB in DRAM		*/ - -#define CONFIG_SYS_LOAD_ADDR		0xa3000000	/* default load address */ - -#define CONFIG_SYS_HZ			1000 -#define CONFIG_SYS_CPUSPEED		0x161		/* set core clock to 400/400/100 MHz */ - -						/* valid baudrates */ - -#define CONFIG_SYS_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 } - -/* - * Definitions related to passing arguments to kernel. - */ -#define CONFIG_CMDLINE_TAG	 1	 /* send commandline to Kernel		*/ -#define CONFIG_SETUP_MEMORY_TAGS 1	 /* send memory definition to kernel	*/ -#define	CONFIG_INITRD_TAG	 1	 /* do not send initrd params		*/ - -/* - * Stack sizes - * - * The stack sizes are set up in start.S using the settings below - */ -#define CONFIG_STACKSIZE	(128*1024)	/* regular stack */ -#ifdef CONFIG_USE_IRQ -#define CONFIG_STACKSIZE_IRQ	(4*1024)	/* IRQ stack */ -#define CONFIG_STACKSIZE_FIQ	(4*1024)	/* FIQ stack */ -#endif - -/* - * Physical Memory Map - */ -#define CONFIG_NR_DRAM_BANKS	4 -#define PHYS_SDRAM_1		0xa0000000 /* SDRAM Bank #1	*/ -#define PHYS_SDRAM_1_SIZE	0x04000000 /* 64 MB		*/ -#define PHYS_SDRAM_2		0xa4000000 /* SDRAM Bank #2	*/ -#define PHYS_SDRAM_2_SIZE	0x00000000 /* 0 MB		*/ -#define PHYS_SDRAM_3		0xa8000000 /* SDRAM Bank #3	*/ -#define PHYS_SDRAM_3_SIZE	0x00000000 /* 0 MB		*/ -#define PHYS_SDRAM_4		0xac000000 /* SDRAM Bank #4	*/ -#define PHYS_SDRAM_4_SIZE	0x00000000 /* 0 MB		*/ - -#define PHYS_FLASH_1		0x00000000 /* Flash Bank #1	*/ -#define PHYS_FLASH_2		0x04000000 /* Flash Bank #1	*/ -#define PHYS_FLASH_SIZE		0x01000000 /* 16 MB		*/ -#define PHYS_FLASH_BANK_SIZE	0x01000000 /* 16 MB Banks	*/ -#define PHYS_FLASH_SECT_SIZE	0x00040000 /* 256 KB sectors (x2) */ - -#define CONFIG_SYS_DRAM_BASE		0xa0000000 -#define CONFIG_SYS_DRAM_SIZE		0x04000000 - -#define CONFIG_SYS_FLASH_BASE		PHYS_FLASH_1 - -#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1 -#define	CONFIG_SYS_INIT_SP_ADDR		(GENERATED_GBL_DATA_SIZE + PHYS_SDRAM_1) - -/* - * FLASH and environment organization - */ -#define CONFIG_SYS_MAX_FLASH_BANKS	1     /* max number of memory banks		*/ -#define CONFIG_SYS_MAX_FLASH_SECT	128   /* max number of sectors on one chip	*/ - -/* timeout values are in ticks */ -#define CONFIG_SYS_FLASH_ERASE_TOUT	(2*CONFIG_SYS_HZ)	/* Timeout for Flash Erase	*/ -#define CONFIG_SYS_FLASH_WRITE_TOUT	(2*CONFIG_SYS_HZ)	/* Timeout for Flash Write	*/ -#define CONFIG_SYS_FLASH_LOCK_TOUT	(2*CONFIG_SYS_HZ)	/* Timeout for Flash Set Lock Bit */ -#define CONFIG_SYS_FLASH_UNLOCK_TOUT	(2*CONFIG_SYS_HZ)	/* Timeout for Flash Clear Lock Bits */ -#define CONFIG_SYS_FLASH_PROTECTION			/* "Real" (hardware) sectors protection */ - -#define CONFIG_ENV_IS_IN_FLASH	1 -#define CONFIG_ENV_ADDR		(PHYS_FLASH_1 + 0x40000)	/* Addr of Environment Sector	*/ -#define CONFIG_ENV_SIZE		0x4000 -#define CONFIG_ENV_SECT_SIZE	0x40000				/* Size of the Environment Sector	*/ -#define CONFIG_SYS_MONITOR_LEN		0x20000				/* 128 KiB */ - -/****************************************************************************** - * - * CPU specific defines - * - ******************************************************************************/ - -/* - * GPIO settings - * - * GPIO pin assignments - * GPIO	    Name	Dir Out AF - * 0	    NC - * 1	    NC - * 2	    SIRQ1	I - * 3	    SIRQ2	I - * 4	    SIRQ3	I - * 5	    DMAACK1	O   0 - * 6	    DMAACK2	O   0 - * 7	    DMAACK3	O   0 - * 8	    TC1		O   0 - * 9	    TC2		O   0 - * 10	    TC3		O   0 - * 11	    nDMAEN	O   1 - * 12	    AENCTRL	O   0 - * 13	    PLDTC	O   0 - * 14	    ETHIRQ	I - * 15	    NC - * 16	    NC - * 17	    NC - * 18	    RDY		I - * 19	    DMASIO	I - * 20	    ETHIRQ	NC - * 21	    NC - * 22	    PGMEN	O   1	 FIXME for debug only enable flash - * 23	    NC - * 24	    NC - * 25	    NC - * 26	    NC - * 27	    NC - * 28	    NC - * 29	    NC - * 30	    NC - * 31	    NC - * 32	    NC - * 33	    NC - * 34	    FFRXD	I	01 - * 35	    FFCTS	I	01 - * 36	    FFDCD	I	01 - * 37	    FFDSR	I	01 - * 38	    FFRI	I	01 - * 39	    FFTXD	O   1	10 - * 40	    FFDTR	O   0	10 - * 41	    FFRTS	O   0	10 - * 42	    RS232FOFF	O   0	00 - * 43	    NC - * 44	    NC - * 45	    IRSL0	O   0 - * 46	    IRRX0	I	01 - * 47	    IRTX0	O   0	10 - * 48	    NC - * 49	    nIOWE	O   0 - * 50	    NC - * 51	    NC - * 52	    NC - * 53	    NC - * 54	    NC - * 55	    NC - * 56	    NC - * 57	    NC - * 58	    DKDIRQ	I - * 59	    NC - * 60	    NC - * 61	    NC - * 62	    NC - * 63	    NC - * 64	    COMLED	O   0 - * 65	    COMLED	O   0 - * 66	    COMLED	O   0 - * 67	    COMLED	O   0 - * 68	    COMLED	O   0 - * 69	    COMLED	O   0 - * 70	    COMLED	O   0 - * 71	    COMLED	O   0 - * 72	    NC - * 73	    NC - * 74	    NC - * 75	    NC - * 76	    NC - * 77	    NC - * 78	    CSIO	O   1 - * 79	    NC - * 80	    CSETH	O   1 - * - * NOTE: All NC's are defined to be outputs - * - */ -/* Pin direction control */ -#define CONFIG_SYS_GPDR0_VAL	    0xd3808000 -#define CONFIG_SYS_GPDR1_VAL	    0xfcffab83 -#define CONFIG_SYS_GPDR2_VAL	    0x0001ffff -/* Set and Clear registers */ -#define CONFIG_SYS_GPSR0_VAL	    0x00008000 -#define CONFIG_SYS_GPSR1_VAL	    0x00ff0002 -#define CONFIG_SYS_GPSR2_VAL	    0x0001c000 -#define CONFIG_SYS_GPCR0_VAL	    0x00000000 -#define CONFIG_SYS_GPCR1_VAL	    0x00000000 -#define CONFIG_SYS_GPCR2_VAL	    0x00000000 -/* Edge detect registers (these are set by the kernel) */ -#define CONFIG_SYS_GRER0_VAL	    0x00002180 -#define CONFIG_SYS_GRER1_VAL	    0x00000000 -#define CONFIG_SYS_GRER2_VAL	    0x00000000 -#define CONFIG_SYS_GFER0_VAL	    0x000043e0 -#define CONFIG_SYS_GFER1_VAL	    0x00000000 -#define CONFIG_SYS_GFER2_VAL	    0x00000000 -/* Alternate function registers */ -#define CONFIG_SYS_GAFR0_L_VAL	    0x80000004 -#define CONFIG_SYS_GAFR0_U_VAL	    0x595a8010 -#define CONFIG_SYS_GAFR1_L_VAL	    0x699a9559 -#define CONFIG_SYS_GAFR1_U_VAL	    0xaaa5aaaa -#define CONFIG_SYS_GAFR2_L_VAL	    0xaaaaaaaa -#define CONFIG_SYS_GAFR2_U_VAL	    0x00000002 - -/* - * Clocks, power control and interrupts - */ -#define CONFIG_SYS_PSSR_VAL	    0x00000030 -#define CONFIG_SYS_CCCR		    0x00000161	/* 100 MHz memory, 400 MHz CPU, 400 Turbo  */ -#define CONFIG_SYS_CKEN		    0x000141ec	/* FFUART and STUART enabled	*/ -#define CONFIG_SYS_ICMR		    0x00000000	/* No interrupts enabled	*/ - -/* FIXME - * - * RTC settings - * Watchdog - * - */ - -/* - * Memory settings - * - */ -#define CONFIG_SYS_MSC0_VAL	    0x122423f0	/* FLASH   / LAN	    (cs0)/(cS1)	  */ -#define CONFIG_SYS_MSC1_VAL	    0x35f4aa4c	/* USB	   / ST3+ST5	    (cs2)/(cS3)	  */ -#define CONFIG_SYS_MSC2_VAL	    0x35f435fc	/* IDE	   / BCR + WatchDog (cs4)/(cS5)	  */ -#define CONFIG_SYS_MDCNFG_VAL	    0x000009c9 -#define CONFIG_SYS_MDMRS_VAL	    0x00220022 -#define CONFIG_SYS_MDREFR_VAL	    0x000da018	/* Initial setting, individual bits set in lowlevel_init.S */ -#define	CONFIG_SYS_FLYCNFG_VAL		0x00000000 -#define	CONFIG_SYS_SXCNFG_VAL		0x00000000 - -/* - * PCMCIA and CF Interfaces (NOT USED, these values from lubbock init) - */ -#define CONFIG_SYS_MECR_VAL	      0x00000000 -#define CONFIG_SYS_MCMEM0_VAL	      0x00010504 -#define CONFIG_SYS_MCMEM1_VAL	      0x00010504 -#define CONFIG_SYS_MCATT0_VAL	      0x00010504 -#define CONFIG_SYS_MCATT1_VAL	      0x00010504 -#define CONFIG_SYS_MCIO0_VAL	      0x00004715 -#define CONFIG_SYS_MCIO1_VAL	      0x00004715 - -/* Board specific defines */ - -#ifndef __ASSEMBLY__ - -/* global prototypes */ -void led_code(int code, int color); - -#endif - -#endif	/* __CONFIG_H */ |