diff options
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cmd_errata.c | 3 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc85xx/cpu_init.c | 8 | ||||
| -rw-r--r-- | include/configs/P4080DS.h | 1 | 
3 files changed, 12 insertions, 0 deletions
| diff --git a/arch/powerpc/cpu/mpc85xx/cmd_errata.c b/arch/powerpc/cpu/mpc85xx/cmd_errata.c index d5c34c867..4e2cb4a64 100644 --- a/arch/powerpc/cpu/mpc85xx/cmd_errata.c +++ b/arch/powerpc/cpu/mpc85xx/cmd_errata.c @@ -56,6 +56,9 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])  #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135)  	puts("Work-around for Erratum ESDHC135 enabled\n");  #endif +#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC136) +	puts("Work-around for Erratum ESDHC136 enabled\n"); +#endif  	return 0;  } diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c index 1d016c4d0..354b22231 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu_init.c +++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c @@ -394,6 +394,14 @@ int cpu_init_r(void)  	setup_mp();  #endif +#ifdef CONFIG_SYS_FSL_ERRATUM_ESDHC136 +	{ +		void *p; +		p = (void *)CONFIG_SYS_DCSRBAR + 0x20520; +		setbits_be32(p, 1 << (31 - 14)); +	} +#endif +  #ifdef CONFIG_SYS_LBC_LCRR  	/*  	 * Modify the CLKDIV field of LCRR register to improve the writing diff --git a/include/configs/P4080DS.h b/include/configs/P4080DS.h index a15dd761b..4dd7faa1b 100644 --- a/include/configs/P4080DS.h +++ b/include/configs/P4080DS.h @@ -37,6 +37,7 @@  #define CONFIG_SYS_FSL_ERRATUM_ESDHC111  #define CONFIG_SYS_FSL_ERRATUM_ESDHC135 +#define CONFIG_SYS_FSL_ERRATUM_ESDHC136  #define CONFIG_SYS_P4080_ERRATUM_CPU22  #define CONFIG_SYS_P4080_ERRATUM_SERDES8 |