diff options
126 files changed, 4367 insertions, 586 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 25b28d6a2..284f5c6d4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -854,9 +854,14 @@ Yusuke Goda <goda.yusuke@renesas.com> Mike Frysinger <vapier@gentoo.org> Blackfin Team <u-boot-devel@blackfin.uclinux.org> + BF518F-EZBRD BF518 + BF526-EZBRD BF526 + BF527-EZKIT BF527 BF533-EZKIT BF533 BF533-STAMP BF533 BF537-STAMP BF537 + BF538F-EZKIT BF538 + BF548-EZKIT BF548 BF561-EZKIT BF561 ######################################################################### @@ -788,9 +788,14 @@ LIST_avr32=" \ ######################################################################### LIST_blackfin=" \ + bf518f-ezbrd \ + bf526-ezbrd \ + bf527-ezkit \ bf533-ezkit \ bf533-stamp \ bf537-stamp \ + bf538f-ezkit \ + bf548-ezkit \ bf561-ezkit \ " @@ -3336,7 +3336,8 @@ suzaku_config: unconfig #======================================================================== # Analog Devices boards -BFIN_BOARDS = bf533-ezkit bf533-stamp bf537-stamp bf561-ezkit +BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \ + bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit $(BFIN_BOARDS:%=%_config) : unconfig @$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=) @@ -3510,7 +3511,8 @@ clean: $(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \ $(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \ $(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \ - $(obj)board/{bf533-ezkit,bf533-stamp,bf537-stamp,bf561-ezkit}/u-boot.lds \ + $(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \ + $(obj)board/bf5{33,37}-stamp/u-boot.lds \ $(obj)cpu/blackfin/bootrom-asm-offsets.[chs] @rm -f $(obj)include/bmp_logo.h @rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map} @@ -593,7 +593,6 @@ The following options need to be configured: except those marked below with a "*". CONFIG_CMD_ASKENV * ask for env variable - CONFIG_CMD_AUTOSCRIPT Autoscript Support CONFIG_CMD_BDI bdinfo CONFIG_CMD_BEDBUG * Include BedBug Debugger CONFIG_CMD_BMP * BMP support @@ -654,6 +653,7 @@ The following options need to be configured: (requires CONFIG_CMD_I2C) CONFIG_CMD_SETGETDCR Support for DCR Register access (4xx only) + CONFIG_CMD_SOURCE "source" command Support CONFIG_CMD_SPI * SPI serial bus support CONFIG_CMD_USB * USB support CONFIG_CMD_VFD * VFD support (TRAB) @@ -1789,7 +1789,7 @@ The following options need to be configured: Note: overly (ab)use of the default environment is discouraged. Make sure to check other ways to preset - the environment like the autoscript function or the + the environment like the "source" command or the boot command first. - DataFlash Support: @@ -1948,8 +1948,8 @@ Legacy uImage format: 81 common/cmd_net.c NetLoop() back without error -82 common/cmd_net.c size == 0 (File with size 0 loaded) 82 common/cmd_net.c trying automatic boot - 83 common/cmd_net.c running autoscript - -83 common/cmd_net.c some error in automatic boot or autoscript + 83 common/cmd_net.c running "source" command + -83 common/cmd_net.c some error in automatic boot or "source" command 84 common/cmd_net.c end without errors FIT uImage format: @@ -2952,7 +2952,7 @@ Some configuration options can be set using Environment Variables: autoscript - if set to "yes" commands like "loadb", "loady", "bootp", "tftpb", "rarpboot" and "nfs" will attempt to automatically run script images (by internally - calling "autoscript"). + calling "source"). autoscript_uname - if script image is in a format (FIT) this variable is used to get script subimage unit name. diff --git a/board/bf518f-ezbrd/.gitignore b/board/bf518f-ezbrd/.gitignore new file mode 100644 index 000000000..945f32454 --- /dev/null +++ b/board/bf518f-ezbrd/.gitignore @@ -0,0 +1 @@ +/u-boot.lds diff --git a/board/bf518f-ezbrd/Makefile b/board/bf518f-ezbrd/Makefile new file mode 100644 index 000000000..1b217288b --- /dev/null +++ b/board/bf518f-ezbrd/Makefile @@ -0,0 +1,57 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf518f-ezbrd/bf518f-ezbrd.c b/board/bf518f-ezbrd/bf518f-ezbrd.c new file mode 100644 index 000000000..2c7961ab7 --- /dev/null +++ b/board/bf518f-ezbrd/bf518f-ezbrd.c @@ -0,0 +1,101 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2008-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <net.h> +#include <netdev.h> +#include <spi.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include <asm/mach-common/bits/otp.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF518F EZ-Board board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#if defined(CONFIG_BFIN_MAC) +static void board_init_enetaddr(uchar *mac_addr) +{ + bool valid_mac = false; + +#if 0 + /* the MAC is stored in OTP memory page 0xDF */ + uint32_t ret; + uint64_t otp_mac; + + ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); + if (!(ret & OTP_MASTER_ERROR)) { + uchar *otp_mac_p = (uchar *)&otp_mac; + + for (ret = 0; ret < 6; ++ret) + mac_addr[ret] = otp_mac_p[5 - ret]; + + if (is_valid_ether_addr(mac_addr)) + valid_mac = true; + } +#endif + + if (!valid_mac) { + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + } + + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + static bool switch_is_alive = false; + int ret; + + if (!switch_is_alive) { + struct spi_slave *slave = spi_setup_slave(0, 1, 5000000, SPI_MODE_3); + if (slave) { + if (!spi_claim_bus(slave)) { + unsigned char dout[3] = { 2, 1, 1, }; + unsigned char din[3]; + ret = spi_xfer(slave, sizeof(dout) * 8, dout, din, SPI_XFER_BEGIN | SPI_XFER_END); + if (!ret) + switch_is_alive = true; + spi_release_bus(slave); + } + spi_free_slave(slave); + } + } + + if (switch_is_alive) + return bfin_EMAC_initialize(bis); + else + return -1; +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + return 0; +} diff --git a/board/bf518f-ezbrd/config.mk b/board/bf518f-ezbrd/config.mk new file mode 100644 index 000000000..f4a5a8028 --- /dev/null +++ b/board/bf518f-ezbrd/config.mk @@ -0,0 +1,32 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds + +# Set some default LDR flags based on boot mode. +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf518f-ezbrd/u-boot.lds.S b/board/bf518f-ezbrd/u-boot.lds.S new file mode 100644 index 000000000..3e8be358d --- /dev/null +++ b/board/bf518f-ezbrd/u-boot.lds.S @@ -0,0 +1,124 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2008 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/blackfin.h> +#undef ALIGN +#undef ENTRY +#undef bfin + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE +# define L1_DATA_B_SRAM_SIZE 0 +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN + l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text : + { + cpu/blackfin/start.o (.text .text.*) + __initcode_start = .; + cpu/blackfin/initcode.o (.text .text.*) + __initcode_end = .; + *(.text .text.*) + } >ram + + .rodata : + { + . = ALIGN(4); + *(.rodata .rodata.*) + *(.rodata1) + *(.eh_frame) + . = ALIGN(4); + } >ram + + .data : + { + . = ALIGN(256); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram + __stext_l1_lma = LOADADDR(.text_l1); + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram + __sdata_l1_lma = LOADADDR(.data_l1); + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + __bss_end = .; + } >ram +} diff --git a/board/bf526-ezbrd/.gitignore b/board/bf526-ezbrd/.gitignore new file mode 100644 index 000000000..945f32454 --- /dev/null +++ b/board/bf526-ezbrd/.gitignore @@ -0,0 +1 @@ +/u-boot.lds diff --git a/board/bf526-ezbrd/Makefile b/board/bf526-ezbrd/Makefile new file mode 100644 index 000000000..88846baf5 --- /dev/null +++ b/board/bf526-ezbrd/Makefile @@ -0,0 +1,58 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_STATUS_LED) += status-led.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf526-ezbrd/bf526-ezbrd.c b/board/bf526-ezbrd/bf526-ezbrd.c new file mode 100644 index 000000000..1666bf661 --- /dev/null +++ b/board/bf526-ezbrd/bf526-ezbrd.c @@ -0,0 +1,77 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <net.h> +#include <netdev.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include <asm/mach-common/bits/otp.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF526 EZ-Board board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + bool valid_mac = false; + + /* the MAC is stored in OTP memory page 0xDF */ + uint32_t ret; + uint64_t otp_mac; + + ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); + if (!(ret & OTP_MASTER_ERROR)) { + uchar *otp_mac_p = (uchar *)&otp_mac; + + for (ret = 0; ret < 6; ++ret) + mac_addr[ret] = otp_mac_p[5 - ret]; + + if (is_valid_ether_addr(mac_addr)) + valid_mac = true; + } + + if (!valid_mac) { + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + } + + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + return 0; +} diff --git a/board/bf526-ezbrd/config.mk b/board/bf526-ezbrd/config.mk new file mode 100644 index 000000000..f4a5a8028 --- /dev/null +++ b/board/bf526-ezbrd/config.mk @@ -0,0 +1,32 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds + +# Set some default LDR flags based on boot mode. +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf526-ezbrd/status-led.c b/board/bf526-ezbrd/status-led.c new file mode 100644 index 000000000..6327022cc --- /dev/null +++ b/board/bf526-ezbrd/status-led.c @@ -0,0 +1,56 @@ +/* + * U-boot - status leds + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <status_led.h> + +static void set_led_f(int pf, int state) +{ + switch (state) { + case STATUS_LED_OFF: bfin_write_PORTFIO_CLEAR(pf); break; + case STATUS_LED_BLINKING: bfin_write_PORTFIO_TOGGLE(pf); break; + case STATUS_LED_ON: bfin_write_PORTFIO_SET(pf); break; + } +} +static void set_led_g(int pf, int state) +{ + switch (state) { + case STATUS_LED_OFF: bfin_write_PORTGIO_CLEAR(pf); break; + case STATUS_LED_BLINKING: bfin_write_PORTGIO_TOGGLE(pf); break; + case STATUS_LED_ON: bfin_write_PORTGIO_SET(pf); break; + } +} + +static void set_leds(led_id_t mask, int state) +{ + if (mask & 0x1) set_led_f(PF8, state); + if (mask & 0x2) set_led_g(PG11, state); + if (mask & 0x4) set_led_g(PG12, state); +} + +void __led_init(led_id_t mask, int state) +{ + bfin_write_PORTF_FER(bfin_read_PORTF_FER() & ~(PF8)); + bfin_write_PORTG_FER(bfin_read_PORTG_FER() & ~(PG11 | PG12)); + bfin_write_PORTFIO_INEN(bfin_read_PORTFIO_INEN() & ~(PF8)); + bfin_write_PORTGIO_INEN(bfin_read_PORTGIO_INEN() & ~(PG11 | PG12)); + bfin_write_PORTFIO_DIR(bfin_read_PORTFIO_DIR() | (PF8)); + bfin_write_PORTGIO_DIR(bfin_read_PORTGIO_DIR() | (PG11 | PG12)); +} + +void __led_set(led_id_t mask, int state) +{ + set_leds(mask, state); +} + +void __led_toggle(led_id_t mask) +{ + set_leds(mask, STATUS_LED_BLINKING); +} diff --git a/board/bf526-ezbrd/u-boot.lds.S b/board/bf526-ezbrd/u-boot.lds.S new file mode 100644 index 000000000..3e8be358d --- /dev/null +++ b/board/bf526-ezbrd/u-boot.lds.S @@ -0,0 +1,124 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2008 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/blackfin.h> +#undef ALIGN +#undef ENTRY +#undef bfin + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE +# define L1_DATA_B_SRAM_SIZE 0 +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN + l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text : + { + cpu/blackfin/start.o (.text .text.*) + __initcode_start = .; + cpu/blackfin/initcode.o (.text .text.*) + __initcode_end = .; + *(.text .text.*) + } >ram + + .rodata : + { + . = ALIGN(4); + *(.rodata .rodata.*) + *(.rodata1) + *(.eh_frame) + . = ALIGN(4); + } >ram + + .data : + { + . = ALIGN(256); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram + __stext_l1_lma = LOADADDR(.text_l1); + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram + __sdata_l1_lma = LOADADDR(.data_l1); + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + __bss_end = .; + } >ram +} diff --git a/board/bf527-ezkit/.gitignore b/board/bf527-ezkit/.gitignore new file mode 100644 index 000000000..945f32454 --- /dev/null +++ b/board/bf527-ezkit/.gitignore @@ -0,0 +1 @@ +/u-boot.lds diff --git a/board/bf527-ezkit/Makefile b/board/bf527-ezkit/Makefile new file mode 100644 index 000000000..c2b98ec74 --- /dev/null +++ b/board/bf527-ezkit/Makefile @@ -0,0 +1,58 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_VIDEO) += video.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf527-ezkit/bf527-ezkit.c b/board/bf527-ezkit/bf527-ezkit.c new file mode 100644 index 000000000..2cbfa8d03 --- /dev/null +++ b/board/bf527-ezkit/bf527-ezkit.c @@ -0,0 +1,77 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <net.h> +#include <netdev.h> +#include <asm/blackfin.h> +#include <asm/net.h> +#include <asm/mach-common/bits/otp.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF527 EZ-Kit board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +#ifdef CONFIG_BFIN_MAC +static void board_init_enetaddr(uchar *mac_addr) +{ + bool valid_mac = false; + + /* the MAC is stored in OTP memory page 0xDF */ + uint32_t ret; + uint64_t otp_mac; + + ret = bfrom_OtpRead(0xDF, OTP_LOWER_HALF, &otp_mac); + if (!(ret & OTP_MASTER_ERROR)) { + uchar *otp_mac_p = (uchar *)&otp_mac; + + for (ret = 0; ret < 6; ++ret) + mac_addr[ret] = otp_mac_p[5 - ret]; + + if (is_valid_ether_addr(mac_addr)) + valid_mac = true; + } + + if (!valid_mac) { + puts("Warning: Generating 'random' MAC address\n"); + bfin_gen_rand_mac(mac_addr); + } + + eth_setenv_enetaddr("ethaddr", mac_addr); +} + +int board_eth_init(bd_t *bis) +{ + return bfin_EMAC_initialize(bis); +} +#endif + +int misc_init_r(void) +{ +#ifdef CONFIG_BFIN_MAC + uchar enetaddr[6]; + if (!eth_getenv_enetaddr("ethaddr", enetaddr)) + board_init_enetaddr(enetaddr); +#endif + + return 0; +} diff --git a/board/bf527-ezkit/config.mk b/board/bf527-ezkit/config.mk new file mode 100644 index 000000000..f4a5a8028 --- /dev/null +++ b/board/bf527-ezkit/config.mk @@ -0,0 +1,32 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds + +# Set some default LDR flags based on boot mode. +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf527-ezkit/u-boot.lds.S b/board/bf527-ezkit/u-boot.lds.S new file mode 100644 index 000000000..3e8be358d --- /dev/null +++ b/board/bf527-ezkit/u-boot.lds.S @@ -0,0 +1,124 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2008 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/blackfin.h> +#undef ALIGN +#undef ENTRY +#undef bfin + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE +# define L1_DATA_B_SRAM_SIZE 0 +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN + l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text : + { + cpu/blackfin/start.o (.text .text.*) + __initcode_start = .; + cpu/blackfin/initcode.o (.text .text.*) + __initcode_end = .; + *(.text .text.*) + } >ram + + .rodata : + { + . = ALIGN(4); + *(.rodata .rodata.*) + *(.rodata1) + *(.eh_frame) + . = ALIGN(4); + } >ram + + .data : + { + . = ALIGN(256); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram + __stext_l1_lma = LOADADDR(.text_l1); + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram + __sdata_l1_lma = LOADADDR(.data_l1); + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + __bss_end = .; + } >ram +} diff --git a/board/bf527-ezkit/video.c b/board/bf527-ezkit/video.c new file mode 100644 index 000000000..2df671730 --- /dev/null +++ b/board/bf527-ezkit/video.c @@ -0,0 +1,317 @@ +/* + * video.c - run splash screen on lcd + * + * Copyright (c) 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <stdarg.h> +#include <common.h> +#include <config.h> +#include <malloc.h> +#include <asm/blackfin.h> +#include <asm/mach-common/bits/dma.h> +#include <i2c.h> +#include <linux/types.h> +#include <devices.h> + +int gunzip(void *, int, unsigned char *, unsigned long *); + +#define DMA_SIZE16 2 + +#include <asm/mach-common/bits/ppi.h> +#include <asm/mach-common/bits/timer.h> + +#include <asm/bfin_logo_230x230.h> + +#define LCD_X_RES 320 /* Horizontal Resolution */ +#define LCD_Y_RES 240 /* Vertical Resolution */ +#define LCD_BPP 24 /* Bit Per Pixel */ +#define LCD_PIXEL_SIZE (LCD_BPP / 8) + +#define DMA_BUS_SIZE 16 +#define LCD_CLK (12*1000*1000) /* 12MHz */ + +#define CLOCKS_PER_PIX 3 + +/* HS and VS timing parameters (all in number of PPI clk ticks) */ +#define H_ACTPIX (LCD_X_RES * CLOCKS_PER_PIX) /* active horizontal pixel */ +#define H_PERIOD (408 * CLOCKS_PER_PIX) /* HS period */ +#define H_PULSE 90 /* HS pulse width */ +#define H_START 204 /* first valid pixel */ + +#define U_LINE 1 /* Blanking Lines */ + +#define V_LINES (LCD_Y_RES + U_LINE) /* total vertical lines */ +#define V_PULSE (3 * H_PERIOD) /* VS pulse width (1-5 H_PERIODs) */ +#define V_PERIOD (H_PERIOD * V_LINES) /* VS period */ + +#define ACTIVE_VIDEO_MEM_OFFSET (U_LINE * H_ACTPIX) + +#define PPI_TX_MODE 0x2 +#define PPI_XFER_TYPE_11 0xC +#define PPI_PORT_CFG_01 0x10 +#define PPI_PACK_EN 0x80 +#define PPI_POLS_1 0x8000 + +/* enable and disable PPI functions */ +void EnablePPI(void) +{ + *pPPI_CONTROL |= PORT_EN; +} + +void DisablePPI(void) +{ + *pPPI_CONTROL &= ~PORT_EN; +} + +void Init_Ports(void) +{ + *pPORTF_MUX &= ~PORT_x_MUX_0_MASK; + *pPORTF_MUX |= PORT_x_MUX_0_FUNC_1; + *pPORTF_FER |= PF0 | PF1 | PF2 | PF3 | PF4 | PF5 | PF6 | PF7; + + *pPORTG_MUX &= ~PORT_x_MUX_1_MASK; + *pPORTG_MUX |= PORT_x_MUX_1_FUNC_1; + *pPORTG_FER |= PG5; +} + +void Init_PPI(void) +{ + + *pPPI_DELAY = H_START; + *pPPI_COUNT = (H_ACTPIX-1); + *pPPI_FRAME = 0; + + /* PPI control, to be replaced with definitions */ + *pPPI_CONTROL = PPI_TX_MODE | /* output mode , PORT_DIR */ + PPI_XFER_TYPE_11 | /* sync mode XFR_TYPE */ + PPI_PORT_CFG_01 | /* two frame sync PORT_CFG */ + PPI_PACK_EN | /* packing enabled PACK_EN */ + PPI_POLS_1; /* faling edge syncs POLS */ +} + +void Init_DMA(void *dst) +{ + *pDMA0_START_ADDR = dst; + + /* X count */ + *pDMA0_X_COUNT = H_ACTPIX / 2; + *pDMA0_X_MODIFY = DMA_BUS_SIZE / 8; + + /* Y count */ + *pDMA0_Y_COUNT = V_LINES; + *pDMA0_Y_MODIFY = DMA_BUS_SIZE / 8; + + /* DMA Config */ + *pDMA0_CONFIG = + WDSIZE_16 | /* 16 bit DMA */ + DMA2D | /* 2D DMA */ + FLOW_AUTO; /* autobuffer mode */ +} + + +void EnableDMA(void) +{ + *pDMA0_CONFIG |= DMAEN; +} + +void DisableDMA(void) +{ + *pDMA0_CONFIG &= ~DMAEN; +} + + +/* Init TIMER0 as Frame Sync 1 generator */ +void InitTIMER0(void) +{ + *pTIMER_DISABLE |= TIMDIS0; /* disable Timer */ + SSYNC(); + *pTIMER_STATUS |= TIMIL0 | TOVF_ERR0 | TRUN0; /* clear status */ + SSYNC(); + + *pTIMER0_PERIOD = H_PERIOD; + SSYNC(); + *pTIMER0_WIDTH = H_PULSE; + SSYNC(); + + *pTIMER0_CONFIG = PWM_OUT | + PERIOD_CNT | + TIN_SEL | + CLK_SEL | + EMU_RUN; + SSYNC(); +} + +void EnableTIMER0(void) +{ + *pTIMER_ENABLE |= TIMEN0; + SSYNC(); +} + +void DisableTIMER0(void) +{ + *pTIMER_DISABLE |= TIMDIS0; + SSYNC(); +} + + +void InitTIMER1(void) +{ + *pTIMER_DISABLE |= TIMDIS1; /* disable Timer */ + SSYNC(); + *pTIMER_STATUS |= TIMIL1 | TOVF_ERR1 | TRUN1; /* clear status */ + SSYNC(); + + + *pTIMER1_PERIOD = V_PERIOD; + SSYNC(); + *pTIMER1_WIDTH = V_PULSE; + SSYNC(); + + *pTIMER1_CONFIG = PWM_OUT | + PERIOD_CNT | + TIN_SEL | + CLK_SEL | + EMU_RUN; + SSYNC(); +} + +void EnableTIMER1(void) +{ + *pTIMER_ENABLE |= TIMEN1; + SSYNC(); +} + +void DisableTIMER1(void) +{ + *pTIMER_DISABLE |= TIMDIS1; + SSYNC(); +} + +int video_init(void *dst) +{ + + Init_Ports(); + Init_DMA(dst); + EnableDMA(); + InitTIMER0(); + InitTIMER1(); + Init_PPI(); + EnablePPI(); + + /* Frame sync 2 (VS) needs to start at least one PPI clk earlier */ + EnableTIMER1(); + /* Add Some Delay ... */ + SSYNC(); + SSYNC(); + SSYNC(); + SSYNC(); + + /* now start frame sync 1 */ + EnableTIMER0(); + + return 0; +} + +static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y) +{ + if (dcache_status()) + blackfin_dcache_flush_range(logo->data, logo->data + logo->size); + + bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); + + /* Setup destination start address */ + bfin_write_MDMA_D0_START_ADDR(dst + ((x & -2) * LCD_PIXEL_SIZE) + + (y * LCD_X_RES * LCD_PIXEL_SIZE)); + /* Setup destination xcount */ + bfin_write_MDMA_D0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); + /* Setup destination xmodify */ + bfin_write_MDMA_D0_X_MODIFY(DMA_SIZE16); + + /* Setup destination ycount */ + bfin_write_MDMA_D0_Y_COUNT(logo->height); + /* Setup destination ymodify */ + bfin_write_MDMA_D0_Y_MODIFY((LCD_X_RES - logo->width) * LCD_PIXEL_SIZE + DMA_SIZE16); + + + /* Setup Source start address */ + bfin_write_MDMA_S0_START_ADDR(logo->data); + /* Setup Source xcount */ + bfin_write_MDMA_S0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); + /* Setup Source xmodify */ + bfin_write_MDMA_S0_X_MODIFY(DMA_SIZE16); + + /* Setup Source ycount */ + bfin_write_MDMA_S0_Y_COUNT(logo->height); + /* Setup Source ymodify */ + bfin_write_MDMA_S0_Y_MODIFY(DMA_SIZE16); + + + /* Enable source DMA */ + bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); + SSYNC(); + bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); + + while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN); + + bfin_write_MDMA_S0_IRQ_STATUS(bfin_read_MDMA_S0_IRQ_STATUS() | DMA_DONE | DMA_ERR); + bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR); + +} + +void video_putc(const char c) +{ +} + +void video_puts(const char *s) +{ +} + +int drv_video_init(void) +{ + int error, devices = 1; + device_t videodev; + + u8 *dst; + u32 fbmem_size = LCD_X_RES * LCD_Y_RES * LCD_PIXEL_SIZE + ACTIVE_VIDEO_MEM_OFFSET; + + dst = malloc(fbmem_size); + + if (dst == NULL) { + printf("Failed to alloc FB memory\n"); + return -1; + } + +#ifdef EASYLOGO_ENABLE_GZIP + unsigned char *data = EASYLOGO_DECOMP_BUFFER; + unsigned long src_len = EASYLOGO_ENABLE_GZIP; + if (gunzip(data, bfin_logo.size, bfin_logo.data, &src_len)) { + puts("Failed to decompress logo\n"); + free(dst); + return -1; + } + bfin_logo.data = data; +#endif + + memset(dst + ACTIVE_VIDEO_MEM_OFFSET, bfin_logo.data[0], fbmem_size - ACTIVE_VIDEO_MEM_OFFSET); + + dma_bitblit(dst + ACTIVE_VIDEO_MEM_OFFSET, &bfin_logo, + (LCD_X_RES - bfin_logo.width) / 2, + (LCD_Y_RES - bfin_logo.height) / 2); + + video_init(dst); /* Video initialization */ + + memset(&videodev, 0, sizeof(videodev)); + + strcpy(videodev.name, "video"); + videodev.ext = DEV_EXT_VIDEO; /* Video extensions */ + videodev.flags = DEV_FLAGS_SYSTEM; /* No Output */ + videodev.putc = video_putc; /* 'putc' function */ + videodev.puts = video_puts; /* 'puts' function */ + + error = device_register(&videodev); + + return (error == 0) ? devices : error; +} diff --git a/board/bf533-stamp/Makefile b/board/bf533-stamp/Makefile index a03fe89af..0f5283752 100644 --- a/board/bf533-stamp/Makefile +++ b/board/bf533-stamp/Makefile @@ -30,7 +30,6 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS-y := $(BOARD).o -COBJS-$(CONFIG_CMD_EEPROM) += spi_flash.o COBJS-$(CONFIG_VIDEO) += video.o SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) diff --git a/board/bf533-stamp/spi_flash.c b/board/bf533-stamp/spi_flash.c deleted file mode 100644 index 8784741bb..000000000 --- a/board/bf533-stamp/spi_flash.c +++ /dev/null @@ -1,2 +0,0 @@ -/* Share the spi flash code */ -#include "../bf537-stamp/spi_flash.c" diff --git a/board/bf537-stamp/Makefile b/board/bf537-stamp/Makefile index 3b875a322..1dbf406b2 100644 --- a/board/bf537-stamp/Makefile +++ b/board/bf537-stamp/Makefile @@ -30,6 +30,7 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(BOARD).a COBJS-y := $(BOARD).o cmd_bf537led.o +COBJS-$(CONFIG_BFIN_IDE) += ide-cf.o COBJS-$(CONFIG_CMD_EEPROM) += spi_flash.o COBJS-$(CONFIG_CMD_NAND) += nand.o COBJS-$(CONFIG_POST) += post.o post-memory.o diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c index 16ffe2f1d..28597c9e6 100644 --- a/board/bf537-stamp/bf537-stamp.c +++ b/board/bf537-stamp/bf537-stamp.c @@ -43,43 +43,6 @@ int checkboard(void) return 0; } -#if defined(CONFIG_BFIN_IDE) - -void cf_outb(unsigned char val, volatile unsigned char *addr) -{ - *(addr) = val; - SSYNC(); -} - -unsigned char cf_inb(volatile unsigned char *addr) -{ - volatile unsigned char c; - - c = *(addr); - SSYNC(); - - return c; -} - -void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words) -{ - int i; - - for (i = 0; i < words; i++) - *(sect_buf + i) = *(addr); - SSYNC(); -} - -void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) -{ - int i; - - for (i = 0; i < words; i++) - *(addr) = *(sect_buf + i); - SSYNC(); -} -#endif /* CONFIG_BFIN_IDE */ - phys_size_t initdram(int board_type) { gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; @@ -130,7 +93,6 @@ int board_eth_init(bd_t *bis) } #endif -#if defined(CONFIG_MISC_INIT_R) /* miscellaneous platform dependent initialisations */ int misc_init_r(void) { @@ -146,22 +108,9 @@ int misc_init_r(void) flash_protect(FLAG_PROTECT_SET, 0x203F0000, 0x203FFFFF, &flash_info[0]); #endif -#if defined(CONFIG_BFIN_IDE) -#if defined(CONFIG_BFIN_TRUE_IDE) - /* Enable ATASEL when in True IDE mode */ - printf("Using CF True IDE Mode\n"); - cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA); - udelay(1000); -#elif defined(CONFIG_BFIN_CF_IDE) - /* Disable ATASEL when we're in Common Memory Mode */ - printf("Using CF Common Memory Mode\n"); - cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS); - udelay(1000); -#elif defined(CONFIG_BFIN_HDD_IDE) - printf("Using HDD IDE Mode\n"); +#ifdef CONFIG_BFIN_IDE + cf_ide_init(); #endif - ide_init(); -#endif /* CONFIG_BFIN_IDE */ + return 0; } -#endif /* CONFIG_MISC_INIT_R */ diff --git a/board/bf537-stamp/ide-cf.c b/board/bf537-stamp/ide-cf.c new file mode 100644 index 000000000..5a3720de5 --- /dev/null +++ b/board/bf537-stamp/ide-cf.c @@ -0,0 +1,66 @@ +/* + * CF IDE addon card code + * + * Enter bugs at http://blackfin.uclinux.org/ + * + * Copyright (c) 2005-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/blackfin.h> + +void cf_outb(unsigned char val, volatile unsigned char *addr) +{ + *(addr) = val; + SSYNC(); +} + +unsigned char cf_inb(volatile unsigned char *addr) +{ + volatile unsigned char c; + + c = *(addr); + SSYNC(); + + return c; +} + +void cf_insw(unsigned short *sect_buf, unsigned short *addr, int words) +{ + int i; + + for (i = 0; i < words; i++) + *(sect_buf + i) = *(addr); + SSYNC(); +} + +void cf_outsw(unsigned short *addr, unsigned short *sect_buf, int words) +{ + int i; + + for (i = 0; i < words; i++) + *(addr) = *(sect_buf + i); + SSYNC(); +} + +void cf_ide_init(void) +{ +#if defined(CONFIG_BFIN_TRUE_IDE) + /* Enable ATASEL when in True IDE mode */ + printf("Using CF True IDE Mode\n"); + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_ENA); + udelay(1000); +#elif defined(CONFIG_BFIN_CF_IDE) + /* Disable ATASEL when we're in Common Memory Mode */ + printf("Using CF Common Memory Mode\n"); + cf_outb(0, (unsigned char *)CONFIG_CF_ATASEL_DIS); + udelay(1000); +#elif defined(CONFIG_BFIN_HDD_IDE) + printf("Using HDD IDE Mode\n"); +#endif + ide_init(); +} diff --git a/board/bf538f-ezkit/.gitignore b/board/bf538f-ezkit/.gitignore new file mode 100644 index 000000000..945f32454 --- /dev/null +++ b/board/bf538f-ezkit/.gitignore @@ -0,0 +1 @@ +/u-boot.lds diff --git a/board/bf538f-ezkit/Makefile b/board/bf538f-ezkit/Makefile new file mode 100644 index 000000000..1b217288b --- /dev/null +++ b/board/bf538f-ezkit/Makefile @@ -0,0 +1,57 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf538f-ezkit/bf538f-ezkit.c b/board/bf538f-ezkit/bf538f-ezkit.c new file mode 100644 index 000000000..bbee98967 --- /dev/null +++ b/board/bf538f-ezkit/bf538f-ezkit.c @@ -0,0 +1,27 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <asm/blackfin.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF538F EZ-Kit Lite board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} diff --git a/board/bf538f-ezkit/config.mk b/board/bf538f-ezkit/config.mk new file mode 100644 index 000000000..c8b9fb8c1 --- /dev/null +++ b/board/bf538f-ezkit/config.mk @@ -0,0 +1,33 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --bits 16 --dma 8 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf538f-ezkit/u-boot.lds.S b/board/bf538f-ezkit/u-boot.lds.S new file mode 100644 index 000000000..8ddfa81da --- /dev/null +++ b/board/bf538f-ezkit/u-boot.lds.S @@ -0,0 +1,143 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2008 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/blackfin.h> +#undef ALIGN +#undef ENTRY +#undef bfin + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE +# define L1_DATA_B_SRAM_SIZE 0 +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN + l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text : + { + cpu/blackfin/start.o (.text .text.*) + +#ifdef ENV_IS_EMBEDDED + /* WARNING - the following is hand-optimized to fit within + * the sector before the environment sector. If it throws + * an error during compilation remove an object here to get + * it linked after the configuration sector. + */ + + cpu/blackfin/traps.o (.text .text.*) + cpu/blackfin/interrupt.o (.text .text.*) + cpu/blackfin/serial.o (.text .text.*) + common/dlmalloc.o (.text .text.*) + lib_generic/crc32.o (.text .text.*) + + . = DEFINED(env_offset) ? env_offset : .; + common/env_embedded.o (.text .text.*) +#endif + + __initcode_start = .; + cpu/blackfin/initcode.o (.text .text.*) + __initcode_end = .; + + *(.text .text.*) + } >ram + + .rodata : + { + . = ALIGN(4); + *(.rodata .rodata.*) + *(.rodata1) + *(.eh_frame) + . = ALIGN(4); + } >ram + + .data : + { + . = ALIGN(256); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram + __stext_l1_lma = LOADADDR(.text_l1); + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram + __sdata_l1_lma = LOADADDR(.data_l1); + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + __bss_end = .; + } >ram +} diff --git a/board/bf548-ezkit/.gitignore b/board/bf548-ezkit/.gitignore new file mode 100644 index 000000000..945f32454 --- /dev/null +++ b/board/bf548-ezkit/.gitignore @@ -0,0 +1 @@ +/u-boot.lds diff --git a/board/bf548-ezkit/Makefile b/board/bf548-ezkit/Makefile new file mode 100644 index 000000000..c2b98ec74 --- /dev/null +++ b/board/bf548-ezkit/Makefile @@ -0,0 +1,58 @@ +# +# U-boot - Makefile +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y := $(BOARD).o +COBJS-$(CONFIG_VIDEO) += video.o + +SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS-y)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +$(obj)u-boot.lds: u-boot.lds.S + $(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@ + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/bf548-ezkit/bf548-ezkit.c b/board/bf548-ezkit/bf548-ezkit.c new file mode 100644 index 000000000..74f93ba27 --- /dev/null +++ b/board/bf548-ezkit/bf548-ezkit.c @@ -0,0 +1,79 @@ +/* + * U-boot - main board file + * + * Copyright (c) 2005-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <config.h> +#include <command.h> +#include <asm/blackfin.h> + +DECLARE_GLOBAL_DATA_PTR; + +int checkboard(void) +{ + printf("Board: ADI BF548 EZ-Kit board\n"); + printf(" Support: http://blackfin.uclinux.org/\n"); + return 0; +} + +phys_size_t initdram(int board_type) +{ + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_memsize = CONFIG_SYS_MAX_RAM_SIZE; + return gd->bd->bi_memsize; +} + +int board_early_init_f(void) +{ + /* Port H: PH8 - PH13 == A4 - A9 + * address lines of the parallel asynchronous memory interface + */ + + /************************************************ + * configure GPIO * + * set port H function enable register * + * configure PH8-PH13 as peripheral (not GPIO) * + *************************************************/ + bfin_write_PORTH_FER(0x3F03); + + /************************************************ + * set port H MUX to configure PH8-PH13 * + * 1st Function (MUX = 00) (bits 16-27 == 0) * + * Set to address signals A4-A9 * + *************************************************/ + bfin_write_PORTH_MUX(0); + + /************************************************ + * set port H direction register * + * enable PH8-PH13 as outputs * + *************************************************/ + bfin_write_PORTH_DIR_SET(0x3F00); + + /* Port I: PI0 - PH14 == A10 - A24 + * address lines of the parallel asynchronous memory interface + */ + + /************************************************ + * set port I function enable register * + * configure PI0-PI14 as peripheral (not GPIO) * + *************************************************/ + bfin_write_PORTI_FER(0x7fff); + + /************************************************** + * set PORT I MUX to configure PI14-PI0 as * + * 1st Function (MUX=00) - address signals A10-A24 * + ***************************************************/ + bfin_write_PORTI_MUX(0); + + /**************************************** + * set PORT I direction register * + * enable PI0 - PI14 as outputs * + *****************************************/ + bfin_write_PORTI_DIR_SET(0x7fff); + + return 0; +} diff --git a/board/bf548-ezkit/config.mk b/board/bf548-ezkit/config.mk new file mode 100644 index 000000000..8b471f60d --- /dev/null +++ b/board/bf548-ezkit/config.mk @@ -0,0 +1,37 @@ +# +# Copyright (c) 2005-2008 Analog Device Inc. +# +# (C) Copyright 2001 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# This is not actually used for Blackfin boards so do not change it +#TEXT_BASE = do-not-use-me + +LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds + +# Set some default LDR flags based on boot mode. +LDR_FLAGS-BFIN_BOOT_PARA := --dma 6 +LDR_FLAGS-BFIN_BOOT_FIFO := --dma 1 +LDR_FLAGS-BFIN_BOOT_SPI_MASTER := --dma 1 +LDR_FLAGS-BFIN_BOOT_UART := --dma 1 +LDR_FLAGS-BFIN_BOOT_NAND := --dma 6 +LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE)) diff --git a/board/bf548-ezkit/u-boot.lds.S b/board/bf548-ezkit/u-boot.lds.S new file mode 100644 index 000000000..3e8be358d --- /dev/null +++ b/board/bf548-ezkit/u-boot.lds.S @@ -0,0 +1,124 @@ +/* + * U-boot - u-boot.lds.S + * + * Copyright (c) 2005-2008 Analog Device Inc. + * + * (C) Copyright 2000-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <asm/blackfin.h> +#undef ALIGN +#undef ENTRY +#undef bfin + +/* If we don't actually load anything into L1 data, this will avoid + * a syntax error. If we do actually load something into L1 data, + * we'll get a linker memory load error (which is what we'd want). + * This is here in the first place so we can quickly test building + * for different CPU's which may lack non-cache L1 data. + */ +#ifndef L1_DATA_B_SRAM +# define L1_DATA_B_SRAM CONFIG_SYS_MONITOR_BASE +# define L1_DATA_B_SRAM_SIZE 0 +#endif + +OUTPUT_ARCH(bfin) + +MEMORY +{ + ram : ORIGIN = CONFIG_SYS_MONITOR_BASE, LENGTH = CONFIG_SYS_MONITOR_LEN + l1_code : ORIGIN = L1_INST_SRAM, LENGTH = L1_INST_SRAM_SIZE + l1_data : ORIGIN = L1_DATA_B_SRAM, LENGTH = L1_DATA_B_SRAM_SIZE +} + +ENTRY(_start) +SECTIONS +{ + .text : + { + cpu/blackfin/start.o (.text .text.*) + __initcode_start = .; + cpu/blackfin/initcode.o (.text .text.*) + __initcode_end = .; + *(.text .text.*) + } >ram + + .rodata : + { + . = ALIGN(4); + *(.rodata .rodata.*) + *(.rodata1) + *(.eh_frame) + . = ALIGN(4); + } >ram + + .data : + { + . = ALIGN(256); + *(.data .data.*) + *(.data1) + *(.sdata) + *(.sdata2) + *(.dynamic) + CONSTRUCTORS + } >ram + + .u_boot_cmd : + { + ___u_boot_cmd_start = .; + *(.u_boot_cmd) + ___u_boot_cmd_end = .; + } >ram + + .text_l1 : + { + . = ALIGN(4); + __stext_l1 = .; + *(.l1.text) + . = ALIGN(4); + __etext_l1 = .; + } >l1_code AT>ram + __stext_l1_lma = LOADADDR(.text_l1); + + .data_l1 : + { + . = ALIGN(4); + __sdata_l1 = .; + *(.l1.data) + *(.l1.bss) + . = ALIGN(4); + __edata_l1 = .; + } >l1_data AT>ram + __sdata_l1_lma = LOADADDR(.data_l1); + + .bss : + { + . = ALIGN(4); + __bss_start = .; + *(.sbss) *(.scommon) + *(.dynbss) + *(.bss .bss.*) + *(COMMON) + __bss_end = .; + } >ram +} diff --git a/board/bf548-ezkit/video.c b/board/bf548-ezkit/video.c new file mode 100644 index 000000000..a6f52bdfe --- /dev/null +++ b/board/bf548-ezkit/video.c @@ -0,0 +1,327 @@ +/* + * video.c - run splash screen on lcd + * + * Copyright (c) 2007-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <stdarg.h> +#include <common.h> +#include <config.h> +#include <malloc.h> +#include <asm/blackfin.h> +#include <asm/mach-common/bits/dma.h> +#include <i2c.h> +#include <linux/types.h> +#include <devices.h> + +int gunzip(void *, int, unsigned char *, unsigned long *); + +#define DMA_SIZE16 2 + +#include <asm/mach-common/bits/eppi.h> + +#include <asm/bfin_logo_230x230.h> + +#define LCD_X_RES 480 /*Horizontal Resolution */ +#define LCD_Y_RES 272 /* Vertical Resolution */ + +#define LCD_BPP 24 /* Bit Per Pixel */ +#define LCD_PIXEL_SIZE (LCD_BPP / 8) +#define DMA_BUS_SIZE 32 +#define ACTIVE_VIDEO_MEM_OFFSET 0 + +/* -- Horizontal synchronizing -- + * + * Timing characteristics taken from the SHARP LQ043T1DG01 datasheet + * (LCY-W-06602A Page 9 of 22) + * + * Clock Frequency 1/Tc Min 7.83 Typ 9.00 Max 9.26 MHz + * + * Period TH - 525 - Clock + * Pulse width THp - 41 - Clock + * Horizontal period THd - 480 - Clock + * Back porch THb - 2 - Clock + * Front porch THf - 2 - Clock + * + * -- Vertical synchronizing -- + * Period TV - 286 - Line + * Pulse width TVp - 10 - Line + * Vertical period TVd - 272 - Line + * Back porch TVb - 2 - Line + * Front porch TVf - 2 - Line + */ + +#define LCD_CLK (8*1000*1000) /* 8MHz */ + +/* # active data to transfer after Horizontal Delay clock */ +#define EPPI_HCOUNT LCD_X_RES + +/* # active lines to transfer after Vertical Delay clock */ +#define EPPI_VCOUNT LCD_Y_RES + +/* Samples per Line = 480 (active data) + 45 (padding) */ +#define EPPI_LINE 525 + +/* Lines per Frame = 272 (active data) + 14 (padding) */ +#define EPPI_FRAME 286 + +/* FS1 (Hsync) Width (Typical)*/ +#define EPPI_FS1W_HBL 41 + +/* FS1 (Hsync) Period (Typical) */ +#define EPPI_FS1P_AVPL EPPI_LINE + +/* Horizontal Delay clock after assertion of Hsync (Typical) */ +#define EPPI_HDELAY 43 + +/* FS2 (Vsync) Width = FS1 (Hsync) Period * 10 */ +#define EPPI_FS2W_LVB (EPPI_LINE * 10) + + /* FS2 (Vsync) Period = FS1 (Hsync) Period * Lines per Frame */ +#define EPPI_FS2P_LAVF (EPPI_LINE * EPPI_FRAME) + +/* Vertical Delay after assertion of Vsync (2 Lines) */ +#define EPPI_VDELAY 12 + +#define EPPI_CLIP 0xFF00FF00 + +/* EPPI Control register configuration value for RGB out + * - EPPI as Output + * GP 2 frame sync mode, + * Internal Clock generation disabled, Internal FS generation enabled, + * Receives samples on EPPI_CLK raising edge, Transmits samples on EPPI_CLK falling edge, + * FS1 & FS2 are active high, + * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) + * DMA Unpacking disabled when RGB Formating is enabled, otherwise DMA unpacking enabled + * Swapping Enabled, + * One (DMA) Channel Mode, + * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output + * Regular watermark - when FIFO is 100% full, + * Urgent watermark - when FIFO is 75% full + */ + +#define EPPI_CONTROL (0x20136E2E) + +static inline u16 get_eppi_clkdiv(u32 target_ppi_clk) +{ + u32 sclk = get_sclk(); + + /* EPPI_CLK = (SCLK) / (2 * (EPPI_CLKDIV[15:0] + 1)) */ + + return (((sclk / target_ppi_clk) / 2) - 1); +} + +void Init_PPI(void) +{ + u16 eppi_clkdiv = get_eppi_clkdiv(LCD_CLK); + + bfin_write_EPPI0_FS1W_HBL(EPPI_FS1W_HBL); + bfin_write_EPPI0_FS1P_AVPL(EPPI_FS1P_AVPL); + bfin_write_EPPI0_FS2W_LVB(EPPI_FS2W_LVB); + bfin_write_EPPI0_FS2P_LAVF(EPPI_FS2P_LAVF); + bfin_write_EPPI0_CLIP(EPPI_CLIP); + + bfin_write_EPPI0_FRAME(EPPI_FRAME); + bfin_write_EPPI0_LINE(EPPI_LINE); + + bfin_write_EPPI0_HCOUNT(EPPI_HCOUNT); + bfin_write_EPPI0_HDELAY(EPPI_HDELAY); + bfin_write_EPPI0_VCOUNT(EPPI_VCOUNT); + bfin_write_EPPI0_VDELAY(EPPI_VDELAY); + + bfin_write_EPPI0_CLKDIV(eppi_clkdiv); + +/* + * DLEN = 6 (24 bits for RGB888 out) or 5 (18 bits for RGB666 out) + * RGB Formatting Enabled for RGB666 output, disabled for RGB888 output + */ +#if defined(CONFIG_VIDEO_RGB666) + bfin_write_EPPI0_CONTROL((EPPI_CONTROL & ~DLENGTH) | DLEN_18 | + RGB_FMT_EN); +#else + bfin_write_EPPI0_CONTROL(((EPPI_CONTROL & ~DLENGTH) | DLEN_24) & + ~RGB_FMT_EN); +#endif + +} + +#define DEB2_URGENT 0x2000 /* DEB2 Urgent */ + +void Init_DMA(void *dst) +{ + +#if defined(CONFIG_DEB_DMA_URGENT) + *pEBIU_DDRQUE |= DEB2_URGENT; +#endif + + *pDMA12_START_ADDR = dst; + + /* X count */ + *pDMA12_X_COUNT = (LCD_X_RES * LCD_BPP) / DMA_BUS_SIZE; + *pDMA12_X_MODIFY = DMA_BUS_SIZE / 8; + + /* Y count */ + *pDMA12_Y_COUNT = LCD_Y_RES; + *pDMA12_Y_MODIFY = DMA_BUS_SIZE / 8; + + /* DMA Config */ + *pDMA12_CONFIG = + WDSIZE_32 | /* 32 bit DMA */ + DMA2D | /* 2D DMA */ + FLOW_AUTO; /* autobuffer mode */ +} + +void Init_Ports(void) +{ + *pPORTF_MUX = 0x00000000; + *pPORTF_FER |= 0xFFFF; /* PPI0..15 */ + + *pPORTG_MUX &= ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK | PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK); + *pPORTG_FER |= PG0 | PG1 | PG2 | PG3 | PG4; /* CLK, FS1, FS2, PPI16..17 */ + +#if !defined(CONFIG_VIDEO_RGB666) + *pPORTD_MUX &= ~(PORT_x_MUX_0_MASK | PORT_x_MUX_1_MASK | PORT_x_MUX_2_MASK | PORT_x_MUX_3_MASK | PORT_x_MUX_4_MASK | PORT_x_MUX_5_MASK); + *pPORTD_MUX |= (PORT_x_MUX_0_FUNC_4 | PORT_x_MUX_1_FUNC_4 | PORT_x_MUX_2_FUNC_4 | PORT_x_MUX_3_FUNC_4 | PORT_x_MUX_4_FUNC_4 | PORT_x_MUX_5_FUNC_4); + *pPORTD_FER |= PD0 | PD1 | PD2 | PD3 | PD4 | PD5; /* PPI18..23 */ +#endif + + *pPORTE_FER &= ~PE3; /* DISP */ + *pPORTE_DIR_SET = PE3; + *pPORTE_SET = PE3; + +} + +void EnableDMA(void) +{ + *pDMA12_CONFIG |= DMAEN; +} + +void DisableDMA(void) +{ + *pDMA12_CONFIG &= ~DMAEN; +} + +/* enable and disable PPI functions */ +void EnablePPI(void) +{ + bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() | EPPI_EN); +} + +void DisablePPI(void) +{ + bfin_write_EPPI0_CONTROL(bfin_read_EPPI0_CONTROL() & ~EPPI_EN); +} + +int video_init(void *dst) +{ + Init_Ports(); + Init_DMA(dst); + EnableDMA(); + Init_PPI(); + EnablePPI(); + + return 0; +} + +static void dma_bitblit(void *dst, fastimage_t *logo, int x, int y) +{ + if (dcache_status()) + blackfin_dcache_flush_range(logo->data, logo->data + logo->size); + + bfin_write_MDMA_D0_IRQ_STATUS(DMA_DONE | DMA_ERR); + + /* Setup destination start address */ + bfin_write_MDMA_D0_START_ADDR(dst + ((x & -2) * LCD_PIXEL_SIZE) + + (y * LCD_X_RES * LCD_PIXEL_SIZE)); + /* Setup destination xcount */ + bfin_write_MDMA_D0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); + /* Setup destination xmodify */ + bfin_write_MDMA_D0_X_MODIFY(DMA_SIZE16); + + /* Setup destination ycount */ + bfin_write_MDMA_D0_Y_COUNT(logo->height); + /* Setup destination ymodify */ + bfin_write_MDMA_D0_Y_MODIFY((LCD_X_RES - logo->width) * LCD_PIXEL_SIZE + DMA_SIZE16); + + + /* Setup Source start address */ + bfin_write_MDMA_S0_START_ADDR(logo->data); + /* Setup Source xcount */ + bfin_write_MDMA_S0_X_COUNT(logo->width * LCD_PIXEL_SIZE / DMA_SIZE16); + /* Setup Source xmodify */ + bfin_write_MDMA_S0_X_MODIFY(DMA_SIZE16); + + /* Setup Source ycount */ + bfin_write_MDMA_S0_Y_COUNT(logo->height); + /* Setup Source ymodify */ + bfin_write_MDMA_S0_Y_MODIFY(DMA_SIZE16); + + + /* Enable source DMA */ + bfin_write_MDMA_S0_CONFIG(DMAEN | WDSIZE_16 | DMA2D); + SSYNC(); + bfin_write_MDMA_D0_CONFIG(WNR | DMAEN | WDSIZE_16 | DMA2D); + + while (bfin_read_MDMA_D0_IRQ_STATUS() & DMA_RUN); + + bfin_write_MDMA_S0_IRQ_STATUS(bfin_read_MDMA_S0_IRQ_STATUS() | DMA_DONE | DMA_ERR); + bfin_write_MDMA_D0_IRQ_STATUS(bfin_read_MDMA_D0_IRQ_STATUS() | DMA_DONE | DMA_ERR); + +} + +void video_putc(const char c) +{ +} + +void video_puts(const char *s) +{ +} + +int drv_video_init(void) +{ + int error, devices = 1; + device_t videodev; + + u8 *dst; + u32 fbmem_size = LCD_X_RES * LCD_Y_RES * LCD_PIXEL_SIZE + ACTIVE_VIDEO_MEM_OFFSET; + + dst = malloc(fbmem_size); + + if (dst == NULL) { + printf("Failed to alloc FB memory\n"); + return -1; + } + +#ifdef EASYLOGO_ENABLE_GZIP + unsigned char *data = EASYLOGO_DECOMP_BUFFER; + unsigned long src_len = EASYLOGO_ENABLE_GZIP; + if (gunzip(data, bfin_logo.size, bfin_logo.data, &src_len)) { + puts("Failed to decompress logo\n"); + free(dst); + return -1; + } + bfin_logo.data = data; +#endif + + memset(dst + ACTIVE_VIDEO_MEM_OFFSET, bfin_logo.data[0], fbmem_size - ACTIVE_VIDEO_MEM_OFFSET); + + dma_bitblit(dst + ACTIVE_VIDEO_MEM_OFFSET, &bfin_logo, + (LCD_X_RES - bfin_logo.width) / 2, + (LCD_Y_RES - bfin_logo.height) / 2); + + video_init(dst); /* Video initialization */ + + memset(&videodev, 0, sizeof(videodev)); + + strcpy(videodev.name, "video"); + videodev.ext = DEV_EXT_VIDEO; /* Video extensions */ + videodev.flags = DEV_FLAGS_SYSTEM; /* No Output */ + videodev.putc = video_putc; /* 'putc' function */ + videodev.puts = video_puts; /* 'puts' function */ + + error = device_register(&videodev); + + return (error == 0) ? devices : error; +} diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c index 1c82bdf12..8a06ecc66 100644 --- a/board/cray/L1/L1.c +++ b/board/cray/L1/L1.c @@ -164,7 +164,7 @@ int misc_init_r (void) setenv ("ethaddr", e); } } - sprintf (bootcmd,"autoscript %X",(unsigned)bootscript); + sprintf (bootcmd,"source %X",(unsigned)bootscript); setenv ("bootcmd", bootcmd); return (0); } diff --git a/board/cray/L1/bootscript.hush b/board/cray/L1/bootscript.hush index ec4839b5d..f2f78ad5c 100644 --- a/board/cray/L1/bootscript.hush +++ b/board/cray/L1/bootscript.hush @@ -31,7 +31,7 @@ if printenv bootscript tftp $tftp_addr $bootcript if imi $tftp_addr then - autoscript $tftp_addr + source $tftp_addr fi fi diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c index 0a6626e07..c779f793d 100644 --- a/board/esd/common/cmd_loadpci.c +++ b/board/esd/common/cmd_loadpci.c @@ -30,7 +30,7 @@ #if defined(CONFIG_CMD_BSP) extern int do_bootm (cmd_tbl_t *, int, int, char *[]); -extern int do_autoscript (cmd_tbl_t *, int, int, char *[]); +extern int do_source (cmd_tbl_t *, int, int, char *[]); #define ADDRMASK 0xfffff000 @@ -98,12 +98,12 @@ int do_loadpci(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) case 1: /* - * Boot image via autoscr + * Boot image via "source" command */ printf("executing script at addr 0x%s ...\n", addr); local_args[0] = addr; local_args[1] = NULL; - do_autoscript(cmdtp, 0, 1, local_args); + do_source(cmdtp, 0, 1, local_args); break; case 2: diff --git a/board/inka4x0/inkadiag.c b/board/inka4x0/inkadiag.c index 06c980713..12c0a85d6 100644 --- a/board/inka4x0/inkadiag.c +++ b/board/inka4x0/inkadiag.c @@ -280,48 +280,48 @@ static int do_inkadiag_serial(cmd_tbl_t *cmdtp, int flag, int argc, if ((num >= 0) && (num <= 7)) { if (mode & 1) { /* turn on 'loopback' mode */ - out_8(&uart->mcr, MCR_LOOP); + out_8(&uart->mcr, UART_MCR_LOOP); } else { /* * establish the UART's operational parameters * set DLAB=1, so rbr accesses DLL */ - out_8(&uart->lcr, LCR_DLAB); + out_8(&uart->lcr, UART_LCR_DLAB); /* set baudrate */ out_8(&uart->rbr, combrd); /* set data-format: 8-N-1 */ - out_8(&uart->lcr, LCR_WLS_8); + out_8(&uart->lcr, UART_LCR_WLS_8); } if (mode & 2) { /* set request to send */ - out_8(&uart->mcr, MCR_RTS); + out_8(&uart->mcr, UART_MCR_RTS); udelay(10); /* check clear to send */ - if ((in_8(&uart->msr) & MSR_CTS) == 0x00) + if ((in_8(&uart->msr) & UART_MSR_CTS) == 0x00) return -1; } if (mode & 4) { /* set data terminal ready */ - out_8(&uart->mcr, MCR_DTR); + out_8(&uart->mcr, UART_MCR_DTR); udelay(10); /* check data set ready and carrier detect */ - if ((in_8(&uart->msr) & (MSR_DSR | MSR_DCD)) - != (MSR_DSR | MSR_DCD)) + if ((in_8(&uart->msr) & (UART_MSR_DSR | UART_MSR_DCD)) + != (UART_MSR_DSR | UART_MSR_DCD)) return -1; } /* write each message-character, read it back, and display it */ for (i = 0, len = strlen(argv[3]); i < len; ++i) { j = 0; - while ((in_8(&uart->lsr) & LSR_THRE) == 0x00) { + while ((in_8(&uart->lsr) & UART_LSR_THRE) == 0x00) { if (j++ > CONFIG_SYS_HZ) break; udelay(10); } out_8(&uart->rbr, argv[3][i]); j = 0; - while ((in_8(&uart->lsr) & LSR_DR) == 0x00) { + while ((in_8(&uart->lsr) & UART_LSR_DR) == 0x00) { if (j++ > CONFIG_SYS_HZ) break; udelay(10); diff --git a/board/linkstation/avr.c b/board/linkstation/avr.c index fda1b913e..782b24a71 100644 --- a/board/linkstation/avr.c +++ b/board/linkstation/avr.c @@ -90,12 +90,12 @@ void init_AVR_DUART (void) */ AVR_port->lcr = 0x00; AVR_port->ier = 0x00; - AVR_port->lcr = LCR_BKSE; + AVR_port->lcr = UART_LCR_BKSE; AVR_port->dll = clock_divisor & 0xff; AVR_port->dlm = (clock_divisor >> 8) & 0xff; - AVR_port->lcr = LCR_WLS_8 | LCR_PEN | LCR_EPS; + AVR_port->lcr = UART_LCR_WLS_8 | UART_LCR_PEN | UART_LCR_EPS; AVR_port->mcr = 0x00; - AVR_port->fcr = FCR_FIFO_EN | FCR_RXSR | FCR_TXSR; + AVR_port->fcr = UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR; miconCntl_DisWDT(); diff --git a/board/pn62/cmd_pn62.c b/board/pn62/cmd_pn62.c index 10d0df63a..b9f3bdb94 100644 --- a/board/pn62/cmd_pn62.c +++ b/board/pn62/cmd_pn62.c @@ -152,12 +152,13 @@ int do_loadpci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) rcode = do_bootm (cmdtp, 0, 1, local_args); } -#ifdef CONFIG_AUTOSCRIPT +#ifdef CONFIG_SOURCE if (load_addr) { char *s; if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) { - printf ("Running autoscript at addr 0x%08lX", load_addr); + printf ("Running "source" command at addr 0x%08lX", + load_addr); s = getenv ("autoscript_uname"); if (s) @@ -165,7 +166,7 @@ int do_loadpci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) else puts (" ...\n"); - rcode = autoscript (load_addr, s); + rcode = source (load_addr, s); } } #endif diff --git a/common/Makefile b/common/Makefile index 23171ca55..eb8e283a6 100644 --- a/common/Makefile +++ b/common/Makefile @@ -61,8 +61,8 @@ COBJS-$(CONFIG_ENV_IS_NOWHERE) += env_nowhere.o # command COBJS-$(CONFIG_CMD_AMBAPP) += cmd_ambapp.o -COBJS-$(CONFIG_AUTOSCRIPT) += cmd_autoscript.o -COBJS-$(CONFIG_CMD_AUTOSCRIPT) += cmd_autoscript.o +COBJS-$(CONFIG_SOURCE) += cmd_source.o +COBJS-$(CONFIG_CMD_SOURCE) += cmd_source.o COBJS-$(CONFIG_CMD_BDI) += cmd_bdinfo.o COBJS-$(CONFIG_CMD_BEDBUG) += bedbug.o cmd_bedbug.o COBJS-$(CONFIG_CMD_BMP) += cmd_bmp.o diff --git a/common/cmd_load.c b/common/cmd_load.c index 88fba8899..d5eaac735 100644 --- a/common/cmd_load.c +++ b/common/cmd_load.c @@ -513,12 +513,13 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } } -#ifdef CONFIG_AUTOSCRIPT +#ifdef CONFIG_SOURCE if (load_addr) { char *s; if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) { - printf ("Running autoscript at addr 0x%08lX", load_addr); + printf ("Running "source" command at addr 0x%08lX", + load_addr); s = getenv ("autoscript_uname"); if (s) @@ -526,7 +527,7 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) else puts (" ...\n"); - rcode = autoscript (load_addr, s); + rcode = source (load_addr, s); } } #endif diff --git a/common/cmd_net.c b/common/cmd_net.c index a68784919..9bef7a204 100644 --- a/common/cmd_net.c +++ b/common/cmd_net.c @@ -222,9 +222,10 @@ netboot_common (proto_t proto, cmd_tbl_t *cmdtp, int argc, char *argv[]) rcode = do_bootm (cmdtp, 0, 1, local_args); } -#ifdef CONFIG_AUTOSCRIPT +#ifdef CONFIG_SOURCE if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) { - printf ("Running autoscript at addr 0x%08lX", load_addr); + printf ("Running "source" command at addr 0x%08lX", + load_addr); s = getenv ("autoscript_uname"); if (s) @@ -233,7 +234,7 @@ netboot_common (proto_t proto, cmd_tbl_t *cmdtp, int argc, char *argv[]) puts (" ...\n"); show_boot_progress (83); - rcode = autoscript (load_addr, s); + rcode = source (load_addr, s); } #endif if (rcode < 0) diff --git a/common/cmd_otp.c b/common/cmd_otp.c index 65232903b..4be43448a 100644 --- a/common/cmd_otp.c +++ b/common/cmd_otp.c @@ -225,7 +225,7 @@ int do_otp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) } U_BOOT_CMD(otp, 7, 0, do_otp, - "One-Time-Programmable sub-system\n", + "One-Time-Programmable sub-system", "read <addr> <page> [count] [half]\n" " - read 'count' half-pages starting at 'page' (offset 'half') to 'addr'\n" "otp dump <addr> <page> [count] [half]\n" diff --git a/common/cmd_autoscript.c b/common/cmd_source.c index e5a9bc02d..43e131592 100644 --- a/common/cmd_autoscript.c +++ b/common/cmd_source.c @@ -22,15 +22,11 @@ */ /* - * autoscript allows a remote host to download a command file and, - * optionally, binary data for automatically updating the target. For - * example, you create a new kernel image and want the user to be - * able to simply download the image and the machine does the rest. - * The kernel image is postprocessed with mkimage, which creates an - * image with a script file prepended. If enabled, autoscript will - * verify the script and contents of the download and execute the - * script portion. This would be responsible for erasing flash, - * copying the new image, and rebooting the machine. + * The "source" command allows to define "script images", i. e. files + * that contain command sequences that can be executed by the command + * interpreter. It returns the exit status of the last command + * executed from the script. This is very similar to running a shell + * script in a UNIX shell, hence the name for the command. */ /* #define DEBUG */ @@ -48,7 +44,7 @@ #endif int -autoscript (ulong addr, const char *fit_uname) +source (ulong addr, const char *fit_uname) { ulong len; image_header_t *hdr; @@ -150,7 +146,7 @@ autoscript (ulong addr, const char *fit_uname) break; #endif default: - puts ("Wrong image format for autoscript\n"); + puts ("Wrong image format for \"source\" command\n"); return 1; } @@ -201,9 +197,9 @@ autoscript (ulong addr, const char *fit_uname) } /**************************************************/ -#if defined(CONFIG_CMD_AUTOSCRIPT) +#if defined(CONFIG_CMD_SOURCE) int -do_autoscript (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +do_source (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong addr; int rcode; @@ -212,30 +208,49 @@ do_autoscript (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) /* Find script image */ if (argc < 2) { addr = CONFIG_SYS_LOAD_ADDR; - debug ("* autoscr: default load address = 0x%08lx\n", addr); + debug ("* source: default load address = 0x%08lx\n", addr); #if defined(CONFIG_FIT) } else if (fit_parse_subimage (argv[1], load_addr, &addr, &fit_uname)) { - debug ("* autoscr: subimage '%s' from FIT image at 0x%08lx\n", + debug ("* source: subimage '%s' from FIT image at 0x%08lx\n", fit_uname, addr); #endif } else { addr = simple_strtoul(argv[1], NULL, 16); - debug ("* autoscr: cmdline image address = 0x%08lx\n", addr); + debug ("* source: cmdline image address = 0x%08lx\n", addr); } printf ("## Executing script at %08lx\n", addr); - rcode = autoscript (addr, fit_uname); + rcode = source (addr, fit_uname); return rcode; } U_BOOT_CMD( - autoscr, 2, 0, do_autoscript, + source, 2, 0, do_source, "run script from memory", - "[addr] - run script starting at addr" - " - A valid autoscr header must be present\n" + "[addr]\n" + "\t- run script starting at addr\n" + "\t- A valid image header must be present\n" #if defined(CONFIG_FIT) "For FIT format uImage addr must include subimage\n" "unit name in the form of addr:<subimg_uname>\n" #endif ); + +/* + * Keep for now for backward compatibility; + * remove later when support for "autoscr" goes away. + */ +static int +do_autoscr (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + printf ("\n### WARNING ### " + "\"autoscr\" is deprecated, use \"source\" instead ###\n\n"); + return do_source (cmdtp, flag, argc, argv); +} + +U_BOOT_CMD( + autoscr, 2, 0, do_autoscr, + "DEPRECATED - use \"source\" command instead", + "DEPRECATED - use \"source\" command instead\n" +); #endif diff --git a/cpu/blackfin/initcode.c b/cpu/blackfin/initcode.c index 7bd4b227e..3120447c5 100644 --- a/cpu/blackfin/initcode.c +++ b/cpu/blackfin/initcode.c @@ -249,6 +249,8 @@ static inline void serial_putc(char c) BOOTROM_CALLED_FUNC_ATTR void initcode(ADI_BOOT_DATA *bootstruct) { + ADI_BOOT_DATA bootstruct_scratch; + /* Save the clock pieces that are used in baud rate calculation */ unsigned int sdivB, divB, vcoB; serial_init(); @@ -260,6 +262,13 @@ void initcode(ADI_BOOT_DATA *bootstruct) serial_putc('A'); + /* If the bootstruct is NULL, then it's because we're loading + * dynamically and not via LDR (bootrom). So set the struct to + * some scratch space. + */ + if (!bootstruct) + bootstruct = &bootstruct_scratch; + #ifdef CONFIG_HW_WATCHDOG # ifndef CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE # define CONFIG_HW_WATCHDOG_TIMEOUT_INITCODE 20000 diff --git a/cpu/blackfin/serial.c b/cpu/blackfin/serial.c index 42534bd9b..386195556 100644 --- a/cpu/blackfin/serial.c +++ b/cpu/blackfin/serial.c @@ -115,10 +115,6 @@ void serial_putc(const char c) SSYNC(); WATCHDOG_RESET(); - - /* wait for the byte to be shifted over the line */ - while (!(uart_lsr_read() & TEMT)) - continue; } int serial_tstc(void) diff --git a/cpu/blackfin/start.S b/cpu/blackfin/start.S index 506fea58c..7cbd63220 100644 --- a/cpu/blackfin/start.S +++ b/cpu/blackfin/start.S @@ -131,6 +131,7 @@ ENTRY(_start) r3.h = 0x2000; cc = r5 < r3 (iu); if cc jump .Ldma_and_reprogram; + r0 = 0 (x); /* set bootstruct to NULL */ call _initcode; jump .Lprogrammed; @@ -147,6 +148,7 @@ ENTRY(_start) r1 = r1 + r5; /* ... to current (not load) address of initcode */ p3 = r0; call _dma_memcpy_nocache; + r0 = 0 (x); /* set bootstruct to NULL */ call (p3); /* Since we reprogrammed SCLK, we need to update the serial divisor */ diff --git a/doc/feature-removal-schedule.txt b/doc/feature-removal-schedule.txt index 9ba7a0446..f97340336 100644 --- a/doc/feature-removal-schedule.txt +++ b/doc/feature-removal-schedule.txt @@ -8,16 +8,38 @@ file. --------------------------- What: "autoscr" command -When: August 2009 -Why: "autosrc" is an ugly and completely non-standard name. The "autoscr" - command is deprecated and will be replaced the "source" command as - used by other shells such as bash. Both commands will be supported - for a transition period of 6 months after which "autoscr" will be - removed. +When: Release 2009-09 + +Why: "autosrc" is an ugly and completely non-standard name. + The "autoscr" command is deprecated and will be replaced by + + the "source" command as used by other shells such as bash. + + Starting with March 2009, both commands will be supported for + a transition period of 6 months after which "autoscr" will be + removed. During the transition period existing scripts and + environment variable names remain untouched for maximum + compatibiltiy; thse will be changed when support for the + "autoscr" command get's finally dropped. + Who: Peter Tyser <ptyser@xes-inc.com> --------------------------- +What: GPL cleanup +When: August 2009 +Why: Over time, a couple of files have sneaked in into the U-Boot + source code that are either missing a valid GPL license + header or that carry a license that is incompatible with the + GPL. + Such files shall be removed from the U-Boot source tree. + See http://www.denx.de/wiki/pub/U-Boot/TaskGplCleanup/u-boot-1.1.2-files + for an old and probably incomplete list of such files. + +Who: Wolfgang Denk <wd@denx.de> and board maintainers + +--------------------------- + What: Individual I2C commands When: April 2009 Why: Per the U-Boot README, individual I2C commands such as "imd", "imm", diff --git a/drivers/input/ps2ser.c b/drivers/input/ps2ser.c index 1af3fde64..1a5e2d43d 100644 --- a/drivers/input/ps2ser.c +++ b/drivers/input/ps2ser.c @@ -1,6 +1,6 @@ /*********************************************************************** * - * (C) Copyright 2004 + * (C) Copyright 2004-2009 * DENX Software Engineering * Wolfgang Denk, wd@denx.de * All rights reserved. @@ -18,9 +18,11 @@ #include <asm/io.h> #include <asm/atomic.h> #include <ps2mult.h> -#if defined(CONFIG_SYS_NS16550) || defined(CONFIG_MPC85xx) -#include <ns16550.h> +/* This is needed for ns16550.h */ +#ifndef CONFIG_SYS_NS16550_REG_SIZE +#define CONFIG_SYS_NS16550_REG_SIZE 1 #endif +#include <ns16550.h> DECLARE_GLOBAL_DATA_PTR; @@ -128,12 +130,12 @@ int ps2ser_init(void) NS16550_t com_port = (NS16550_t)COM_BASE; com_port->ier = 0x00; - com_port->lcr = LCR_BKSE | LCR_8N1; + com_port->lcr = UART_LCR_BKSE | UART_LCR_8N1; com_port->dll = (CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) & 0xff; com_port->dlm = ((CONFIG_SYS_NS16550_CLK / 16 / PS2SER_BAUD) >> 8) & 0xff; - com_port->lcr = LCR_8N1; - com_port->mcr = (MCR_DTR | MCR_RTS); - com_port->fcr = (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR); + com_port->lcr = UART_LCR_8N1; + com_port->mcr = (UART_MCR_DTR | UART_MCR_RTS); + com_port->fcr = (UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR); return (0); } @@ -202,7 +204,7 @@ void ps2ser_putc(int chr) psc->psc_buffer_8 = chr; #elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555) - while ((com_port->lsr & LSR_THRE) == 0); + while ((com_port->lsr & UART_LSR_THRE) == 0); com_port->thr = chr; #else while (!(ps2ser_in(UART_LSR) & UART_LSR_THRE)); @@ -227,7 +229,7 @@ static int ps2ser_getc_hw(void) } #elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555) - if (com_port->lsr & LSR_DR) { + if (com_port->lsr & UART_LSR_DR) { res = com_port->rbr; } #else @@ -315,7 +317,7 @@ static void ps2ser_interrupt(void *dev_id) } while (status & PSC_SR_RXRDY); #elif defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \ defined(CONFIG_MPC8548) || defined(CONFIG_MPC8555) - } while (status & LSR_DR); + } while (status & UART_LSR_DR); #else } while (status & UART_IIR_RDI); #endif diff --git a/drivers/mmc/bfin_sdh.c b/drivers/mmc/bfin_sdh.c index 7d6b495f3..16c9695ba 100644 --- a/drivers/mmc/bfin_sdh.c +++ b/drivers/mmc/bfin_sdh.c @@ -293,7 +293,7 @@ mmc_bwrite(int dev, unsigned long start, lbaint_t blkcnt, const void *buffer) printf("MMC_CMD_SET_BLOCKLEN failed\n"); goto out; } - ret = mmc_cmd(MMC_CMD_WRITE_BLOCK, + ret = mmc_cmd(MMC_CMD_WRITE_SINGLE_BLOCK, start * mmc_blkdev.blksz, resp, MMC_RSP_R1); if (ret) { @@ -462,7 +462,7 @@ static int mmc_init_card(struct mmc_cid *cid, int verbose) return ret; } -int mmc_init(int verbose) +int mmc_legacy_init(int verbose) { __u16 pwr_ctl = 0; int ret; @@ -530,16 +530,6 @@ int mmc_init(int verbose) return 0; } -int mmc_read(ulong src, uchar *dst, int size) -{ - return -ENOSYS; -} - -int mmc_write(uchar *src, ulong dst, int size) -{ - return -ENOSYS; -} - int mmc2info(ulong addr) { return 0; diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile index 3d4f8923c..a71b16efc 100644 --- a/drivers/mtd/spi/Makefile +++ b/drivers/mtd/spi/Makefile @@ -27,6 +27,8 @@ LIB := $(obj)libspi_flash.a COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o +COBJS-$(CONFIG_SPI_FLASH_SPANSION) += spansion.o +COBJS-$(CONFIG_SPI_FLASH_SST) += sst.o COBJS-$(CONFIG_SPI_FLASH_STMICRO) += stmicro.o COBJS := $(COBJS-y) diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c index a5f51caf4..c3b936f16 100644 --- a/drivers/mtd/spi/atmel.c +++ b/drivers/mtd/spi/atmel.c @@ -3,7 +3,7 @@ * * Copyright (C) 2008 Atmel Corporation */ -#define DEBUG + #include <common.h> #include <malloc.h> #include <spi_flash.h> @@ -53,6 +53,54 @@ to_atmel_spi_flash(struct spi_flash *flash) static const struct atmel_spi_flash_params atmel_spi_flash_table[] = { { + .idcode1 = 0x22, + .l2_page_size = 8, + .pages_per_block = 8, + .blocks_per_sector = 16, + .nr_sectors = 4, + .name = "AT45DB011D", + }, + { + .idcode1 = 0x23, + .l2_page_size = 8, + .pages_per_block = 8, + .blocks_per_sector = 16, + .nr_sectors = 8, + .name = "AT45DB021D", + }, + { + .idcode1 = 0x24, + .l2_page_size = 8, + .pages_per_block = 8, + .blocks_per_sector = 32, + .nr_sectors = 8, + .name = "AT45DB041D", + }, + { + .idcode1 = 0x25, + .l2_page_size = 8, + .pages_per_block = 8, + .blocks_per_sector = 32, + .nr_sectors = 16, + .name = "AT45DB081D", + }, + { + .idcode1 = 0x26, + .l2_page_size = 9, + .pages_per_block = 8, + .blocks_per_sector = 32, + .nr_sectors = 16, + .name = "AT45DB161D", + }, + { + .idcode1 = 0x27, + .l2_page_size = 9, + .pages_per_block = 8, + .blocks_per_sector = 64, + .nr_sectors = 64, + .name = "AT45DB321D", + }, + { .idcode1 = 0x28, .l2_page_size = 10, .pages_per_block = 8, diff --git a/drivers/mtd/spi/spansion.c b/drivers/mtd/spi/spansion.c new file mode 100644 index 000000000..fdb791798 --- /dev/null +++ b/drivers/mtd/spi/spansion.c @@ -0,0 +1,350 @@ +/* + * Copyright (C) 2009 Freescale Semiconductor, Inc. + * + * Author: Mingkai Hu (Mingkai.hu@freescale.com) + * Based on stmicro.c by Wolfgang Denk (wd@denx.de), + * TsiChung Liew (Tsi-Chung.Liew@freescale.com), + * and Jason McMullan (mcmullan@netapp.com) + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> + +#include "spi_flash_internal.h" + +/* S25FLxx-specific commands */ +#define CMD_S25FLXX_READ 0x03 /* Read Data Bytes */ +#define CMD_S25FLXX_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ +#define CMD_S25FLXX_READID 0x90 /* Read Manufacture ID and Device ID */ +#define CMD_S25FLXX_WREN 0x06 /* Write Enable */ +#define CMD_S25FLXX_WRDI 0x04 /* Write Disable */ +#define CMD_S25FLXX_RDSR 0x05 /* Read Status Register */ +#define CMD_S25FLXX_WRSR 0x01 /* Write Status Register */ +#define CMD_S25FLXX_PP 0x02 /* Page Program */ +#define CMD_S25FLXX_SE 0xd8 /* Sector Erase */ +#define CMD_S25FLXX_BE 0xc7 /* Bulk Erase */ +#define CMD_S25FLXX_DP 0xb9 /* Deep Power-down */ +#define CMD_S25FLXX_RES 0xab /* Release from DP, and Read Signature */ + +#define SPSN_ID_S25FL008A 0x0213 +#define SPSN_ID_S25FL016A 0x0214 +#define SPSN_ID_S25FL032A 0x0215 +#define SPSN_ID_S25FL064A 0x0216 +#define SPSN_ID_S25FL128P 0x2018 +#define SPSN_EXT_ID_S25FL128P_256KB 0x0300 +#define SPSN_EXT_ID_S25FL128P_64KB 0x0301 + +#define SPANSION_SR_WIP (1 << 0) /* Write-in-Progress */ + +struct spansion_spi_flash_params { + u16 idcode1; + u16 idcode2; + u16 page_size; + u16 pages_per_sector; + u16 nr_sectors; + const char *name; +}; + +struct spansion_spi_flash { + struct spi_flash flash; + const struct spansion_spi_flash_params *params; +}; + +static inline struct spansion_spi_flash *to_spansion_spi_flash(struct spi_flash + *flash) +{ + return container_of(flash, struct spansion_spi_flash, flash); +} + +static const struct spansion_spi_flash_params spansion_spi_flash_table[] = { + { + .idcode1 = SPSN_ID_S25FL008A, + .idcode2 = 0, + .page_size = 256, + .pages_per_sector = 256, + .nr_sectors = 16, + .name = "S25FL008A", + }, + { + .idcode1 = SPSN_ID_S25FL016A, + .idcode2 = 0, + .page_size = 256, + .pages_per_sector = 256, + .nr_sectors = 32, + .name = "S25FL016A", + }, + { + .idcode1 = SPSN_ID_S25FL032A, + .idcode2 = 0, + .page_size = 256, + .pages_per_sector = 256, + .nr_sectors = 64, + .name = "S25FL032A", + }, + { + .idcode1 = SPSN_ID_S25FL064A, + .idcode2 = 0, + .page_size = 256, + .pages_per_sector = 256, + .nr_sectors = 128, + .name = "S25FL064A", + }, + { + .idcode1 = SPSN_ID_S25FL128P, + .idcode2 = SPSN_EXT_ID_S25FL128P_64KB, + .page_size = 256, + .pages_per_sector = 256, + .nr_sectors = 256, + .name = "S25FL128P_64K", + }, + { + .idcode1 = SPSN_ID_S25FL128P, + .idcode2 = SPSN_EXT_ID_S25FL128P_256KB, + .page_size = 256, + .pages_per_sector = 1024, + .nr_sectors = 64, + .name = "S25FL128P_256K", + }, +}; + +static int spansion_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 status; + + timebase = get_timer(0); + do { + ret = spi_flash_cmd(spi, CMD_S25FLXX_RDSR, &status, sizeof(status)); + if (ret) + return -1; + + if ((status & SPANSION_SR_WIP) == 0) + break; + + } while (get_timer(timebase) < timeout); + + + if ((status & SPANSION_SR_WIP) == 0) + return 0; + + /* Timed out */ + return -1; +} + +static int spansion_read_fast(struct spi_flash *flash, + u32 offset, size_t len, void *buf) +{ + struct spansion_spi_flash *spsn = to_spansion_spi_flash(flash); + unsigned long page_addr; + unsigned long page_size; + u8 cmd[5]; + + page_size = spsn->params->page_size; + page_addr = offset / page_size; + + cmd[0] = CMD_READ_ARRAY_FAST; + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = offset % page_size; + cmd[4] = 0x00; + + debug + ("READ: 0x%x => cmd = { 0x%02x 0x%02x%02x%02x%02x } len = 0x%x\n", + offset, cmd[0], cmd[1], cmd[2], cmd[3], cmd[4], len); + + return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); +} + +static int spansion_write(struct spi_flash *flash, + u32 offset, size_t len, const void *buf) +{ + struct spansion_spi_flash *spsn = to_spansion_spi_flash(flash); + unsigned long page_addr; + unsigned long byte_addr; + unsigned long page_size; + size_t chunk_len; + size_t actual; + int ret; + u8 cmd[4]; + + page_size = spsn->params->page_size; + page_addr = offset / page_size; + byte_addr = offset % page_size; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + ret = 0; + for (actual = 0; actual < len; actual += chunk_len) { + chunk_len = min(len - actual, page_size - byte_addr); + + cmd[0] = CMD_S25FLXX_PP; + cmd[1] = page_addr >> 8; + cmd[2] = page_addr; + cmd[3] = byte_addr; + + debug + ("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %d\n", + buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); + + ret = spi_flash_cmd(flash->spi, CMD_S25FLXX_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + break; + } + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, + buf + actual, chunk_len); + if (ret < 0) { + debug("SF: SPANSION Page Program failed\n"); + break; + } + + ret = spansion_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret < 0) { + debug("SF: SPANSION page programming timed out\n"); + break; + } + + page_addr++; + byte_addr = 0; + } + + debug("SF: SPANSION: Successfully programmed %u bytes @ 0x%x\n", + len, offset); + + spi_release_bus(flash->spi); + return ret; +} + +int spansion_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + struct spansion_spi_flash *spsn = to_spansion_spi_flash(flash); + unsigned long sector_size; + size_t actual; + int ret; + u8 cmd[4]; + + /* + * This function currently uses sector erase only. + * probably speed things up by using bulk erase + * when possible. + */ + + sector_size = spsn->params->page_size * spsn->params->pages_per_sector; + + if (offset % sector_size || len % sector_size) { + debug("SF: Erase offset/length not multiple of sector size\n"); + return -1; + } + + len /= sector_size; + cmd[0] = CMD_S25FLXX_SE; + cmd[2] = 0x00; + cmd[3] = 0x00; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + ret = 0; + for (actual = 0; actual < len; actual++) { + cmd[1] = (offset / sector_size) + actual; + + ret = spi_flash_cmd(flash->spi, CMD_S25FLXX_WREN, NULL, 0); + if (ret < 0) { + debug("SF: Enabling Write failed\n"); + break; + } + + ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0); + if (ret < 0) { + debug("SF: SPANSION page erase failed\n"); + break; + } + + /* Up to 2 seconds */ + ret = spansion_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); + if (ret < 0) { + debug("SF: SPANSION page erase timed out\n"); + break; + } + } + + debug("SF: SPANSION: Successfully erased %u bytes @ 0x%x\n", + len * sector_size, offset); + + spi_release_bus(flash->spi); + return ret; +} + +struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode) +{ + const struct spansion_spi_flash_params *params; + struct spansion_spi_flash *spsn; + unsigned int i; + unsigned short jedec, ext_jedec; + + jedec = idcode[1] << 8 | idcode[2]; + ext_jedec = idcode[3] << 8 | idcode[4]; + + for (i = 0; i < ARRAY_SIZE(spansion_spi_flash_table); i++) { + params = &spansion_spi_flash_table[i]; + if (params->idcode1 == jedec) { + if (params->idcode2 == ext_jedec) + break; + } + } + + if (i == ARRAY_SIZE(spansion_spi_flash_table)) { + debug("SF: Unsupported SPANSION ID %04x %04x\n", jedec, ext_jedec); + return NULL; + } + + spsn = malloc(sizeof(struct spansion_spi_flash)); + if (!spsn) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + spsn->params = params; + spsn->flash.spi = spi; + spsn->flash.name = params->name; + + spsn->flash.write = spansion_write; + spsn->flash.erase = spansion_erase; + spsn->flash.read = spansion_read_fast; + spsn->flash.size = params->page_size * params->pages_per_sector + * params->nr_sectors; + + debug("SF: Detected %s with page size %u, total %u bytes\n", + params->name, params->page_size, spsn->flash.size); + + return &spsn->flash; +} diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c index d1d81af0e..274895ad8 100644 --- a/drivers/mtd/spi/spi_flash.c +++ b/drivers/mtd/spi/spi_flash.c @@ -3,7 +3,7 @@ * * Copyright (C) 2008 Atmel Corporation */ -#define DEBUG + #include <common.h> #include <malloc.h> #include <spi.h> @@ -101,7 +101,7 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, struct spi_slave *spi; struct spi_flash *flash; int ret; - u8 idcode[3]; + u8 idcode[5]; spi = spi_setup_slave(bus, cs, max_hz, spi_mode); if (!spi) { @@ -120,8 +120,8 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, if (ret) goto err_read_id; - debug("SF: Got idcode %02x %02x %02x\n", idcode[0], - idcode[1], idcode[2]); + debug("SF: Got idcode %02x %02x %02x %02x %02x\n", idcode[0], + idcode[1], idcode[2], idcode[3], idcode[4]); switch (idcode[0]) { #ifdef CONFIG_SPI_FLASH_SPANSION @@ -139,6 +139,11 @@ struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs, flash = spi_flash_probe_stmicro(spi, idcode); break; #endif +#ifdef CONFIG_SPI_FLASH_SST + case 0xBF: + flash = spi_flash_probe_sst(spi, idcode); + break; +#endif default: debug("SF: Unsupported manufacturer %02X\n", idcode[0]); flash = NULL; diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h index 75f5900dc..5d1e395af 100644 --- a/drivers/mtd/spi/spi_flash_internal.h +++ b/drivers/mtd/spi/spi_flash_internal.h @@ -4,9 +4,12 @@ * Copyright (C) 2008 Atmel Corporation */ -/* Common parameters */ -#define SPI_FLASH_PROG_TIMEOUT ((10 * CONFIG_SYS_HZ) / 1000) -#define SPI_FLASH_PAGE_ERASE_TIMEOUT ((50 * CONFIG_SYS_HZ) / 1000) +/* Common parameters -- kind of high, but they should only occur when there + * is a problem (and well your system already is broken), so err on the side + * of caution in case we're dealing with slower SPI buses and/or processors. + */ +#define SPI_FLASH_PROG_TIMEOUT (2 * CONFIG_SYS_HZ) +#define SPI_FLASH_PAGE_ERASE_TIMEOUT (5 * CONFIG_SYS_HZ) #define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CONFIG_SYS_HZ) /* Common commands */ @@ -43,4 +46,5 @@ int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, /* Manufacturer-specific probe functions */ struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode); +struct spi_flash *spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode); struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 *idcode); diff --git a/drivers/mtd/spi/sst.c b/drivers/mtd/spi/sst.c new file mode 100644 index 000000000..62236d495 --- /dev/null +++ b/drivers/mtd/spi/sst.c @@ -0,0 +1,358 @@ +/* + * Driver for SST serial flashes + * + * (C) Copyright 2000-2002 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * Copyright 2008, Network Appliance Inc. + * Jason McMullan <mcmullan@netapp.com> + * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. + * TsiChung Liew (Tsi-Chung.Liew@freescale.com) + * Copyright (c) 2008-2009 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include <common.h> +#include <malloc.h> +#include <spi_flash.h> + +#include "spi_flash_internal.h" + +#define CMD_SST_WREN 0x06 /* Write Enable */ +#define CMD_SST_WRDI 0x04 /* Write Disable */ +#define CMD_SST_RDSR 0x05 /* Read Status Register */ +#define CMD_SST_WRSR 0x01 /* Write Status Register */ +#define CMD_SST_READ 0x03 /* Read Data Bytes */ +#define CMD_SST_FAST_READ 0x0b /* Read Data Bytes at Higher Speed */ +#define CMD_SST_BP 0x02 /* Byte Program */ +#define CMD_SST_AAI_WP 0xAD /* Auto Address Increment Word Program */ +#define CMD_SST_SE 0x20 /* Sector Erase */ + +#define SST_SR_WIP (1 << 0) /* Write-in-Progress */ +#define SST_SR_WEL (1 << 1) /* Write enable */ +#define SST_SR_BP0 (1 << 2) /* Block Protection 0 */ +#define SST_SR_BP1 (1 << 3) /* Block Protection 1 */ +#define SST_SR_BP2 (1 << 4) /* Block Protection 2 */ +#define SST_SR_AAI (1 << 6) /* Addressing mode */ +#define SST_SR_BPL (1 << 7) /* BP bits lock */ + +struct sst_spi_flash_params { + u8 idcode1; + u16 nr_sectors; + const char *name; +}; + +struct sst_spi_flash { + struct spi_flash flash; + const struct sst_spi_flash_params *params; +}; + +static inline struct sst_spi_flash *to_sst_spi_flash(struct spi_flash *flash) +{ + return container_of(flash, struct sst_spi_flash, flash); +} + +#define SST_SECTOR_SIZE (4 * 1024) +static const struct sst_spi_flash_params sst_spi_flash_table[] = { + { + .idcode1 = 0x01, + .nr_sectors = 128, + .name = "SST25WF512", + },{ + .idcode1 = 0x02, + .nr_sectors = 256, + .name = "SST25WF010", + },{ + .idcode1 = 0x03, + .nr_sectors = 512, + .name = "SST25WF020", + },{ + .idcode1 = 0x04, + .nr_sectors = 1024, + .name = "SST25WF040", + }, +}; + +static int +sst_wait_ready(struct spi_flash *flash, unsigned long timeout) +{ + struct spi_slave *spi = flash->spi; + unsigned long timebase; + int ret; + u8 byte = CMD_SST_RDSR; + + ret = spi_xfer(spi, sizeof(byte) * 8, &byte, NULL, SPI_XFER_BEGIN); + if (ret) { + debug("SF: Failed to send command %02x: %d\n", byte, ret); + return ret; + } + + timebase = get_timer(0); + do { + ret = spi_xfer(spi, sizeof(byte) * 8, NULL, &byte, 0); + if (ret) + break; + + if ((byte & SST_SR_WIP) == 0) + break; + + } while (get_timer(timebase) < timeout); + + spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); + + if (!ret && (byte & SST_SR_WIP) != 0) + ret = -1; + + if (ret) + debug("SF: sst wait for ready timed out\n"); + return ret; +} + +static int +sst_enable_writing(struct spi_flash *flash) +{ + int ret = spi_flash_cmd(flash->spi, CMD_SST_WREN, NULL, 0); + if (ret) + debug("SF: Enabling Write failed\n"); + return ret; +} + +static int +sst_disable_writing(struct spi_flash *flash) +{ + int ret = spi_flash_cmd(flash->spi, CMD_SST_WRDI, NULL, 0); + if (ret) + debug("SF: Disabling Write failed\n"); + return ret; +} + +static int +sst_read_fast(struct spi_flash *flash, u32 offset, size_t len, void *buf) +{ + u8 cmd[5] = { + CMD_READ_ARRAY_FAST, + offset >> 16, + offset >> 8, + offset, + 0x00, + }; + return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len); +} + +static int +sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) +{ + int ret; + u8 cmd[4] = { + CMD_SST_BP, + offset >> 16, + offset >> 8, + offset, + }; + + debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", + spi_w8r8(flash->spi, CMD_SST_RDSR), buf, cmd[0], offset); + + ret = sst_enable_writing(flash); + if (ret) + return ret; + + ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1); + if (ret) + return ret; + + return sst_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); +} + +static int +sst_write(struct spi_flash *flash, u32 offset, size_t len, const void *buf) +{ + size_t actual, cmd_len; + int ret; + u8 cmd[4]; + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + /* If the data is not word aligned, write out leading single byte */ + actual = offset % 2; + if (actual) { + ret = sst_byte_write(flash, offset, buf); + if (ret) + goto done; + } + offset += actual; + + ret = sst_enable_writing(flash); + if (ret) + goto done; + + cmd_len = 4; + cmd[0] = CMD_SST_AAI_WP; + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + cmd[3] = offset; + + for (; actual < len - 1; actual += 2) { + debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", + spi_w8r8(flash->spi, CMD_SST_RDSR), buf + actual, cmd[0], + offset); + + ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, + buf + actual, 2); + if (ret) { + debug("SF: sst word program failed\n"); + break; + } + + ret = sst_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); + if (ret) + break; + + cmd_len = 1; + offset += 2; + } + + if (!ret) + ret = sst_disable_writing(flash); + + /* If there is a single trailing byte, write it out */ + if (!ret && actual != len) + ret = sst_byte_write(flash, offset, buf + actual); + + done: + debug("SF: sst: program %s %zu bytes @ 0x%zx\n", + ret ? "failure" : "success", len, offset - actual); + + spi_release_bus(flash->spi); + return ret; +} + +int +sst_erase(struct spi_flash *flash, u32 offset, size_t len) +{ + unsigned long sector_size; + u32 start, end; + int ret; + u8 cmd[4]; + + /* + * This function currently uses sector erase only. + * Probably speed things up by using bulk erase + * when possible. + */ + + sector_size = SST_SECTOR_SIZE; + + if (offset % sector_size) { + debug("SF: Erase offset not multiple of sector size\n"); + return -1; + } + + ret = spi_claim_bus(flash->spi); + if (ret) { + debug("SF: Unable to claim SPI bus\n"); + return ret; + } + + cmd[0] = CMD_SST_SE; + cmd[3] = 0; + start = offset; + end = start + len; + + ret = 0; + while (offset < end) { + cmd[1] = offset >> 16; + cmd[2] = offset >> 8; + offset += sector_size; + + debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], + cmd[2], cmd[3], offset); + + ret = sst_enable_writing(flash); + if (ret) + break; + + ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), NULL, 0); + if (ret) { + debug("SF: sst page erase failed\n"); + break; + } + + ret = sst_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); + if (ret) + break; + } + + debug("SF: sst: Successfully erased %lu bytes @ 0x%x\n", + len * sector_size, start); + + spi_release_bus(flash->spi); + return ret; +} + +static int +sst_unlock(struct spi_flash *flash) +{ + int ret; + u8 cmd, status; + + ret = sst_enable_writing(flash); + if (ret) + return ret; + + cmd = CMD_SST_WRSR; + status = 0; + ret = spi_flash_cmd_write(flash->spi, &cmd, 1, &status, 1); + if (ret) + debug("SF: Unable to set status byte\n"); + + debug("SF: sst: status = %x\n", spi_w8r8(flash->spi, CMD_SST_RDSR)); + + return ret; +} + +struct spi_flash * +spi_flash_probe_sst(struct spi_slave *spi, u8 *idcode) +{ + const struct sst_spi_flash_params *params; + struct sst_spi_flash *stm; + size_t i; + + for (i = 0; i < ARRAY_SIZE(sst_spi_flash_table); ++i) { + params = &sst_spi_flash_table[i]; + if (params->idcode1 == idcode[2]) + break; + } + + if (i == ARRAY_SIZE(sst_spi_flash_table)) { + debug("SF: Unsupported SST ID %02x\n", idcode[1]); + return NULL; + } + + stm = malloc(sizeof(*stm)); + if (!stm) { + debug("SF: Failed to allocate memory\n"); + return NULL; + } + + stm->params = params; + stm->flash.spi = spi; + stm->flash.name = params->name; + + stm->flash.write = sst_write; + stm->flash.erase = sst_erase; + stm->flash.read = sst_read_fast; + stm->flash.size = SST_SECTOR_SIZE * params->nr_sectors; + + debug("SF: Detected %s with page size %u, total %u bytes\n", + params->name, SST_SECTOR_SIZE, stm->flash.size); + + /* Flash powers up read-only, so clear BP# bits */ + sst_unlock(&stm->flash); + + return &stm->flash; +} diff --git a/drivers/mtd/spi/stmicro.c b/drivers/mtd/spi/stmicro.c index e7dda91a4..9b910c13f 100644 --- a/drivers/mtd/spi/stmicro.c +++ b/drivers/mtd/spi/stmicro.c @@ -133,12 +133,12 @@ static int stmicro_wait_ready(struct spi_flash *flash, unsigned long timeout) struct spi_slave *spi = flash->spi; unsigned long timebase; int ret; + u8 cmd = CMD_M25PXX_RDSR; u8 status; - u8 cmd[4] = { CMD_M25PXX_RDSR, 0xff, 0xff, 0xff }; - ret = spi_xfer(spi, 32, &cmd[0], NULL, SPI_XFER_BEGIN); + ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); if (ret) { - debug("SF: Failed to send command %02x: %d\n", cmd[0], ret); + debug("SF: Failed to send command %02x: %d\n", cmd, ret); return ret; } @@ -295,8 +295,7 @@ int stmicro_erase(struct spi_flash *flash, u32 offset, size_t len) break; } - /* Up to 2 seconds */ - ret = stmicro_wait_ready(flash, 2 * CONFIG_SYS_HZ); + ret = stmicro_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT); if (ret < 0) { debug("SF: STMicro page erase timed out\n"); break; @@ -315,12 +314,6 @@ struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode) const struct stmicro_spi_flash_params *params; struct stmicro_spi_flash *stm; unsigned int i; - int ret; - u8 id[3]; - - ret = spi_flash_cmd(spi, CMD_READ_ID, id, sizeof(id)); - if (ret) - return NULL; for (i = 0; i < ARRAY_SIZE(stmicro_spi_flash_table); i++) { params = &stmicro_spi_flash_table[i]; @@ -330,7 +323,7 @@ struct spi_flash *spi_flash_probe_stmicro(struct spi_slave *spi, u8 * idcode) } if (i == ARRAY_SIZE(stmicro_spi_flash_table)) { - debug("SF: Unsupported STMicro ID %02x\n", id[1]); + debug("SF: Unsupported STMicro ID %02x\n", idcode[1]); return NULL; } diff --git a/drivers/serial/ns16550.c b/drivers/serial/ns16550.c index 397f5df5d..657c9dadf 100644 --- a/drivers/serial/ns16550.c +++ b/drivers/serial/ns16550.c @@ -7,9 +7,12 @@ #include <config.h> #include <ns16550.h> -#define LCRVAL LCR_8N1 /* 8 data, 1 stop, no parity */ -#define MCRVAL (MCR_DTR | MCR_RTS) /* RTS/DTR */ -#define FCRVAL (FCR_FIFO_EN | FCR_RXSR | FCR_TXSR) /* Clear & enable FIFOs */ +#define UART_LCRVAL UART_LCR_8N1 /* 8 data, 1 stop, no parity */ +#define UART_MCRVAL (UART_MCR_DTR | \ + UART_MCR_RTS) /* RTS/DTR */ +#define UART_FCRVAL (UART_FCR_FIFO_EN | \ + UART_FCR_RXSR | \ + UART_FCR_TXSR) /* Clear & enable FIFOs */ void NS16550_init (NS16550_t com_port, int baud_divisor) { @@ -17,16 +20,16 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) #ifdef CONFIG_OMAP com_port->mdr1 = 0x7; /* mode select reset TL16C750*/ #endif - com_port->lcr = LCR_BKSE | LCRVAL; + com_port->lcr = UART_LCR_BKSE | UART_LCRVAL; com_port->dll = 0; com_port->dlm = 0; - com_port->lcr = LCRVAL; - com_port->mcr = MCRVAL; - com_port->fcr = FCRVAL; - com_port->lcr = LCR_BKSE | LCRVAL; + com_port->lcr = UART_LCRVAL; + com_port->mcr = UART_MCRVAL; + com_port->fcr = UART_FCRVAL; + com_port->lcr = UART_LCR_BKSE | UART_LCRVAL; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = LCRVAL; + com_port->lcr = UART_LCRVAL; #if defined(CONFIG_OMAP) #if defined(CONFIG_APTIX) com_port->mdr1 = 3; /* /13 mode so Aptix 6MHz can hit 115200 */ @@ -40,29 +43,29 @@ void NS16550_init (NS16550_t com_port, int baud_divisor) void NS16550_reinit (NS16550_t com_port, int baud_divisor) { com_port->ier = 0x00; - com_port->lcr = LCR_BKSE | LCRVAL; + com_port->lcr = UART_LCR_BKSE | UART_LCRVAL; com_port->dll = 0; com_port->dlm = 0; - com_port->lcr = LCRVAL; - com_port->mcr = MCRVAL; - com_port->fcr = FCRVAL; - com_port->lcr = LCR_BKSE; + com_port->lcr = UART_LCRVAL; + com_port->mcr = UART_MCRVAL; + com_port->fcr = UART_FCRVAL; + com_port->lcr = UART_LCR_BKSE; com_port->dll = baud_divisor & 0xff; com_port->dlm = (baud_divisor >> 8) & 0xff; - com_port->lcr = LCRVAL; + com_port->lcr = UART_LCRVAL; } #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ void NS16550_putc (NS16550_t com_port, char c) { - while ((com_port->lsr & LSR_THRE) == 0); + while ((com_port->lsr & UART_LSR_THRE) == 0); com_port->thr = c; } #ifndef CONFIG_NS16550_MIN_FUNCTIONS char NS16550_getc (NS16550_t com_port) { - while ((com_port->lsr & LSR_DR) == 0) { + while ((com_port->lsr & UART_LSR_DR) == 0) { #ifdef CONFIG_USB_TTY extern void usbtty_poll(void); usbtty_poll(); @@ -73,7 +76,7 @@ char NS16550_getc (NS16550_t com_port) int NS16550_tstc (NS16550_t com_port) { - return ((com_port->lsr & LSR_DR) != 0); + return ((com_port->lsr & UART_LSR_DR) != 0); } #endif /* CONFIG_NS16550_MIN_FUNCTIONS */ diff --git a/drivers/spi/bfin_spi.c b/drivers/spi/bfin_spi.c index 0472c1a72..bc3394ad5 100644 --- a/drivers/spi/bfin_spi.c +++ b/drivers/spi/bfin_spi.c @@ -36,6 +36,11 @@ MAKE_SPI_FUNC(SPI_BAUD, 0x14) __attribute__((weak)) int spi_cs_is_valid(unsigned int bus, unsigned int cs) { +#if defined(__ADSPBF538__) || defined(__ADSPBF539__) + /* The SPI1/SPI2 buses are weird ... only 1 CS */ + if (bus > 0 && cs != 1) + return 0; +#endif return (cs >= 1 && cs <= 7); } @@ -204,6 +209,19 @@ static void spi_portmux(struct spi_slave *slave) } bfin_write_PORT_MUX(mux); bfin_write_PORTF_FER(f_fer); +#elif defined(__ADSPBF538__) || defined(__ADSPBF539__) + u16 fer, pins; + if (slave->bus == 1) + pins = PD0 | PD1 | PD2 | (slave->cs == 1 ? PD4 : 0); + else if (slave->bus == 2) + pins = PD5 | PD6 | PD7 | (slave->cs == 1 ? PD9 : 0); + else + pins = 0; + if (pins) { + fer = bfin_read_PORTDIO_FER(); + fer &= ~pins; + bfin_write_PORTDIO_FER(fer); + } #elif defined(__ADSPBF54x__) #define DO_MUX(port, pin) \ mux = ((mux & ~PORT_x_MUX_##pin##_MASK) | PORT_x_MUX_##pin##_FUNC_1); \ diff --git a/include/asm-blackfin/blackfin-config-post.h b/include/asm-blackfin/blackfin-config-post.h index fea473712..623fdc74c 100644 --- a/include/asm-blackfin/blackfin-config-post.h +++ b/include/asm-blackfin/blackfin-config-post.h @@ -135,9 +135,13 @@ #ifndef CONFIG_SYS_MAXARGS # define CONFIG_SYS_MAXARGS 16 #endif -#ifndef CONFIG_SYS_HZ -# define CONFIG_SYS_HZ 1000 +#if defined(CONFIG_SYS_HZ) +# if (CONFIG_SYS_HZ != 1000) +# warning "CONFIG_SYS_HZ must always be 1000" +# endif +# undef CONFIG_SYS_HZ #endif +#define CONFIG_SYS_HZ 1000 #ifndef CONFIG_SYS_BAUDRATE_TABLE # define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } #endif diff --git a/include/common.h b/include/common.h index 952ddfffa..20c058a81 100644 --- a/include/common.h +++ b/include/common.h @@ -234,8 +234,8 @@ int mac_read_from_eeprom(void); /* common/flash.c */ void flash_perror (int); -/* common/cmd_autoscript.c */ -int autoscript (ulong addr, const char *fit_uname); +/* common/cmd_source.c */ +int source (ulong addr, const char *fit_uname); extern ulong load_addr; /* Default Load Address */ diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h index db1f55c84..c5e0d268e 100644 --- a/include/config_cmd_all.h +++ b/include/config_cmd_all.h @@ -15,7 +15,6 @@ #define CONFIG_CMD_AMBAPP /* AMBA Plug & Play Bus print utility */ #define CONFIG_CMD_ASKENV /* ask for env variable */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */ #define CONFIG_CMD_BMP /* BMP support */ @@ -76,6 +75,7 @@ #define CONFIG_CMD_SETEXPR /* setexpr support */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ #define CONFIG_CMD_SNTP /* SNTP support */ +#define CONFIG_CMD_SOURCE /* "source" command support */ #define CONFIG_CMD_SPI /* SPI utility */ #define CONFIG_CMD_TERMINAL /* built-in Serial Terminal */ #define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */ diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h index 366760289..0376e44bd 100644 --- a/include/config_cmd_default.h +++ b/include/config_cmd_default.h @@ -16,7 +16,6 @@ * hardware, not fully tested, etc.). */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_CONSOLE /* coninfo */ @@ -37,6 +36,7 @@ #define CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_RUN /* run command in env variable */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ #endif /* _CONFIG_CMD_DEFAULT_H */ diff --git a/include/configs/APC405.h b/include/configs/APC405.h index 7453518bf..41eaaabfc 100644 --- a/include/configs/APC405.h +++ b/include/configs/APC405.h @@ -124,19 +124,19 @@ */ #include <config_cmd_default.h> +#define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_IDE -#define CONFIG_CMD_FAT +#define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF -#define CONFIG_CMD_DATE +#define CONFIG_CMD_FAT #define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IRQ #define CONFIG_CMD_MII +#define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_SOURCE #define CONFIG_CMD_USB -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 527c84650..150bd29e0 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -74,32 +74,32 @@ #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CONFIG_SYS_HUSH_PARSER 1 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " -#define CONFIG_AUTOSCRIPT 1 +#define CONFIG_SOURCE 1 /* * Command line configuration. */ +#define CONFIG_CMD_ASKENV #define CONFIG_CMD_BDI -#define CONFIG_CMD_IMI -#define CONFIG_CMD_FLASH -#define CONFIG_CMD_MEMORY -#define CONFIG_CMD_NET -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_CONSOLE -#define CONFIG_CMD_ASKENV +#define CONFIG_CMD_DATE +#define CONFIG_CMD_DHCP +#define CONFIG_CMD_DIAG #define CONFIG_CMD_ECHO +#define CONFIG_CMD_EEPROM +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IMI #define CONFIG_CMD_IMMAP +#define CONFIG_CMD_MEMORY +#define CONFIG_CMD_NET #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_DHCP -#define CONFIG_CMD_DATE #define CONFIG_CMD_RUN -#define CONFIG_CMD_I2C -#define CONFIG_CMD_EEPROM -#define CONFIG_CMD_DIAG -#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_SETGETDCR +#define CONFIG_CMD_SOURCE /* diff --git a/include/configs/DU440.h b/include/configs/DU440.h index 85c0e612b..e6abbdc5f 100644 --- a/include/configs/DU440.h +++ b/include/configs/DU440.h @@ -290,14 +290,13 @@ int du440_phy_addr(int devnum); #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_BSP +#define CONFIG_CMD_ASKENV #define CONFIG_CMD_BMP +#define CONFIG_CMD_BSP #define CONFIG_CMD_DATE -#define CONFIG_CMD_ASKENV #define CONFIG_CMD_DHCP -#define CONFIG_CMD_DTT #define CONFIG_CMD_DIAG +#define CONFIG_CMD_DTT #define CONFIG_CMD_EEPROM #define CONFIG_CMD_ELF #define CONFIG_CMD_FAT @@ -309,9 +308,10 @@ int du440_phy_addr(int devnum); #define CONFIG_CMD_NFS #define CONFIG_CMD_PCI #define CONFIG_CMD_PING -#define CONFIG_CMD_USB #define CONFIG_CMD_REGINFO #define CONFIG_CMD_SDRAM +#define CONFIG_CMD_SOURCE +#define CONFIG_CMD_USB #define CONFIG_SUPPORT_VFAT @@ -428,7 +428,7 @@ int du440_phy_addr(int devnum); #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ #endif -#define CONFIG_AUTOSCRIPT 1 +#define CONFIG_SOURCE 1 #define CONFIG_OF_LIBFDT #define CONFIG_OF_BOARD_SETUP diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h index a0904d464..8941e4df5 100644 --- a/include/configs/EP1C20.h +++ b/include/configs/EP1C20.h @@ -180,7 +180,6 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_SAVES -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_BOOTD #undef CONFIG_CMD_CONSOLE #undef CONFIG_CMD_FPGA @@ -188,6 +187,7 @@ #undef CONFIG_CMD_ITEST #undef CONFIG_CMD_NFS #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index a399d22a7..8f18ab242 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -152,7 +152,7 @@ /* * Set default IP stuff just to get bootstrap entries into the - * environment so that we can autoscript the full default environment. + * environment so that we can source the full default environment. */ #define CONFIG_ETHADDR 9a:52:63:15:85:25 #define CONFIG_SERVERIP 10.0.4.201 diff --git a/include/configs/MVBC_P.h b/include/configs/MVBC_P.h index cd910ea05..edbc701d9 100644 --- a/include/configs/MVBC_P.h +++ b/include/configs/MVBC_P.h @@ -73,8 +73,8 @@ #define MV_INITRD_LENGTH 0x00300000 #define MV_SCRATCH_ADDR 0x00000000 #define MV_SCRATCH_LENGTH MV_INITRD_LENGTH -#define MV_AUTOSCR_ADDR 0xff840000 -#define MV_AUTOSCR_ADDR2 0xff850000 +#define MV_SOURCE_ADDR 0xff840000 +#define MV_SOURCE_ADDR2 0xff850000 #define MV_DTB_ADDR 0xfffc0000 #define CONFIG_SHOW_BOOT_PROGRESS 1 @@ -130,8 +130,8 @@ #define CONFIG_RESET_TO_RETRY 1000 #define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ - then autoscr ${autoscr_addr}; \ - else autoscr ${autoscr_addr2}; \ + then source ${autoscr_addr}; \ + else source ${autoscr_addr2}; \ fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" @@ -149,8 +149,8 @@ "fpga=0\0" \ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ - "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \ - "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \ + "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0" \ + "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0" \ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ diff --git a/include/configs/MVBLM7.h b/include/configs/MVBLM7.h index b321825c9..8f741f58b 100644 --- a/include/configs/MVBLM7.h +++ b/include/configs/MVBLM7.h @@ -412,8 +412,8 @@ #define MV_FPGA_SIZE 0x00076ca2 #define MV_KERNEL_ADDR 0xff810000 #define MV_INITRD_ADDR 0xffb00000 -#define MV_AUTOSCR_ADDR 0xff804000 -#define MV_AUTOSCR_ADDR2 0xff806000 +#define MV_SOURCE_ADDR 0xff804000 +#define MV_SOURCE_ADDR2 0xff806000 #define MV_DTB_ADDR 0xff808000 #define MV_INITRD_LENGTH 0x00400000 @@ -424,8 +424,8 @@ #define MV_INITRD_ADDR_RAM 0x01000000 #define CONFIG_BOOTCOMMAND "if imi ${autoscr_addr}; \ - then autoscr ${autoscr_addr}; \ - else autoscr ${autoscr_addr2}; \ + then source ${autoscr_addr}; \ + else source ${autoscr_addr2}; \ fi;" #define CONFIG_BOOTARGS "root=/dev/ram ro rootfstype=squashfs" @@ -438,8 +438,8 @@ "fpga=0\0" \ "fpgadata=" MK_STR(MV_FPGA_DATA) "\0" \ "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0" \ - "autoscr_addr=" MK_STR(MV_AUTOSCR_ADDR) "\0" \ - "autoscr_addr2=" MK_STR(MV_AUTOSCR_ADDR2) "\0" \ + "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0" \ + "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0" \ "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0" \ "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0" \ "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0" \ diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h index 2d04d8925..796938a51 100644 --- a/include/configs/NETPHONE.h +++ b/include/configs/NETPHONE.h @@ -71,7 +71,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off;" \ "bootm" -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h index 4a2702791..a14b2dd89 100644 --- a/include/configs/NETTA2.h +++ b/include/configs/NETTA2.h @@ -71,7 +71,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ "bootm" -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/NX823.h b/include/configs/NX823.h index 9182223c6..5054d5e61 100644 --- a/include/configs/NX823.h +++ b/include/configs/NX823.h @@ -55,7 +55,7 @@ #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ #undef CONFIG_WATCHDOG /* watchdog disabled, for now */ -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE /* * BOOTP options @@ -72,7 +72,7 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT +#define CONFIG_CMD_SOURCE /* call various generic functions */ diff --git a/include/configs/PN62.h b/include/configs/PN62.h index 06c11e69b..562c5c3a1 100644 --- a/include/configs/PN62.h +++ b/include/configs/PN62.h @@ -59,11 +59,11 @@ #define CONFIG_CMD_PCI #define CONFIG_CMD_BSP -#undef CONFIG_CMD_AUTOSCRIPT -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SAVEENV #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_SOURCE #define CONFIG_BAUDRATE 19200 /* console baudrate */ diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h index 8c2befbf0..b9e450df6 100644 --- a/include/configs/TOP860.h +++ b/include/configs/TOP860.h @@ -125,7 +125,7 @@ #define CONFIG_CMD_BEDBUG -#define CONFIG_AUTOSCRIPT 1 +#define CONFIG_SOURCE 1 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 #undef CONFIG_LOADS_ECHO /* NO echo on for serial download */ @@ -419,15 +419,12 @@ /* * Set default IP stuff just to get bootstrap entries into the - * environment so that we can autoscript the full default environment. + * environment so that we can source the full default environment. */ #define CONFIG_ETHADDR 9a:52:63:15:85:25 #define CONFIG_SERVERIP 10.0.4.200 #define CONFIG_IPADDR 10.0.4.111 -/*----------------------------------------------------------------------- - * Defaults for Autoscript - */ #define CONFIG_SYS_LOAD_ADDR 0x00100000 /* default load address */ #define CONFIG_SYS_TFTP_LOADADDR 0x00100000 @@ -438,5 +435,4 @@ */ #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ - #endif /* __CONFIG_H */ diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h index d374981ab..fe1d10290 100644 --- a/include/configs/TQM5200.h +++ b/include/configs/TQM5200.h @@ -253,7 +253,7 @@ #define CUSTOM_ENV_SETTINGS \ "bootfile=cam5200/uImage\0" \ "u-boot=cam5200/u-boot.bin\0" \ - "setup=tftp 200000 cam5200/setup.img; autoscr 200000\0" + "setup=tftp 200000 cam5200/setup.img; source 200000\0" #endif #if defined(CONFIG_TQM5200_B) diff --git a/include/configs/VoVPN-GW.h b/include/configs/VoVPN-GW.h index 5f9a17f3d..b2d75e3c1 100644 --- a/include/configs/VoVPN-GW.h +++ b/include/configs/VoVPN-GW.h @@ -150,11 +150,9 @@ * Command line configuration. */ -#define CONFIG_CMD_AUTOSCRIPT #define CONFIG_CMD_BDI #define CONFIG_CMD_CONSOLE #define CONFIG_CMD_ECHO -#define CONFIG_CMD_SAVEENV #define CONFIG_CMD_FLASH #define CONFIG_CMD_IMI #define CONFIG_CMD_IMLS @@ -164,6 +162,8 @@ #define CONFIG_CMD_NET #define CONFIG_CMD_PING #define CONFIG_CMD_RUN +#define CONFIG_CMD_SAVEENV +#define CONFIG_CMD_SOURCE /* diff --git a/include/configs/afeb9260.h b/include/configs/afeb9260.h index 33a67ca83..fa2711913 100644 --- a/include/configs/afeb9260.h +++ b/include/configs/afeb9260.h @@ -69,11 +69,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/apollon.h b/include/configs/apollon.h index 04da083e6..c14f87135 100644 --- a/include/configs/apollon.h +++ b/include/configs/apollon.h @@ -127,7 +127,7 @@ #define CONFIG_MTD_PARTITIONS #endif -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_SOURCE #ifndef CONFIG_SYS_USE_NOR # undef CONFIG_CMD_FLASH diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h index 7e7f124b9..2ddbd172a 100644 --- a/include/configs/at91cap9adk.h +++ b/include/configs/at91cap9adk.h @@ -91,10 +91,10 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h index 1fae3a3b8..1a5f9a48b 100644 --- a/include/configs/at91sam9260ek.h +++ b/include/configs/at91sam9260ek.h @@ -86,11 +86,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h index 752d7e9cc..4d5093203 100644 --- a/include/configs/at91sam9261ek.h +++ b/include/configs/at91sam9261ek.h @@ -90,11 +90,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9263ek.h b/include/configs/at91sam9263ek.h index dd500caf6..78e00810d 100644 --- a/include/configs/at91sam9263ek.h +++ b/include/configs/at91sam9263ek.h @@ -91,11 +91,11 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE #define CONFIG_CMD_PING 1 #define CONFIG_CMD_DHCP 1 diff --git a/include/configs/at91sam9rlek.h b/include/configs/at91sam9rlek.h index 7a4039c55..a48f2cba5 100644 --- a/include/configs/at91sam9rlek.h +++ b/include/configs/at91sam9rlek.h @@ -82,12 +82,12 @@ */ #include <config_cmd_default.h> #undef CONFIG_CMD_BDI -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_IMI #undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_NET +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_USB #define CONFIG_CMD_NAND 1 diff --git a/include/configs/atngw100.h b/include/configs/atngw100.h index c998952fb..4ed5514d3 100644 --- a/include/configs/atngw100.h +++ b/include/configs/atngw100.h @@ -117,9 +117,9 @@ #define CONFIG_CMD_SF #define CONFIG_CMD_SPI -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h index 2284277da..b258f2df4 100644 --- a/include/configs/atstk1002.h +++ b/include/configs/atstk1002.h @@ -142,9 +142,9 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/atstk1006.h b/include/configs/atstk1006.h index 8cfa31269..f93118edb 100644 --- a/include/configs/atstk1006.h +++ b/include/configs/atstk1006.h @@ -142,9 +142,9 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/bf518f-ezbrd.h b/include/configs/bf518f-ezbrd.h new file mode 100644 index 000000000..77b94a8ba --- /dev/null +++ b/include/configs/bf518f-ezbrd.h @@ -0,0 +1,147 @@ +/* + * U-boot - Configuration file for BF518F EZBrd board + */ + +#ifndef __CONFIG_BF518F_EZBRD_H__ +#define __CONFIG_BF518F_EZBRD_H__ + +#include <asm/blackfin-config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf518-0.0 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 16 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +/* This board has a 64meg MT48H32M16 */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL 0x0096 +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS) + +#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) + +#define CONFIG_SYS_MONITOR_LEN (384 * 1024) +#define CONFIG_SYS_MALLOC_LEN (384 * 1024) + + +/* + * Network Settings + */ +#if !defined(__ADSPBF512__) && !defined(__ADSPBF514__) +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME bf518f-ezbrd +#define CONFIG_PHY_ADDR 3 +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 71 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#else +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#endif +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * SDH Settings + */ +#if !defined(__ADSPBF512__) +#define CONFIG_MMC +#define CONFIG_BFIN_SDH +#endif + + +/* + * Misc Settings + */ +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#include <asm/blackfin-config-post.h> + +#endif diff --git a/include/configs/bf526-ezbrd.h b/include/configs/bf526-ezbrd.h new file mode 100644 index 000000000..afd9bb225 --- /dev/null +++ b/include/configs/bf526-ezbrd.h @@ -0,0 +1,190 @@ +/* + * U-boot - Configuration file for BF526 EZBrd board + */ + +#ifndef __CONFIG_BF526_EZBRD_H__ +#define __CONFIG_BF526_EZBRD_H__ + +#include <asm/blackfin-config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf526-0.0 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 16 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 5 + + +/* + * Memory Settings + */ +/* This board has a 64meg MT48H32M16 */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL 0x0267 +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_2 | PASR_ALL | TRAS_6 | TRP_4 | TRCD_2 | TWR_2 | PSS) + +#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) + +#define CONFIG_SYS_MONITOR_LEN (512 * 1024) +#define CONFIG_SYS_MALLOC_LEN (512 * 1024) + + +/* + * NAND Settings + * (can't be used same time as ethernet) + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) +#define CONFIG_BFIN_NFC +#endif +#ifdef CONFIG_BFIN_NFC +#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 +#define CONFIG_DRIVER_NAND_BFIN +#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_CMD_NAND +#endif + + +/* + * Network Settings + */ +#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ + !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_RMII +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME bf526-ezbrd +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 71 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SST + + +/* + * Env Storage Settings + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#else +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#endif +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * USB Settings + */ +#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) +#define CONFIG_USB +#define CONFIG_MUSB_HCD +#define CONFIG_USB_BLACKFIN +#define CONFIG_USB_STORAGE +#define CONFIG_MUSB_TIMEOUT 100000 +#endif + + +/* + * Misc Settings + */ +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 1 + +/* define to enable run status via led */ +/* #define CONFIG_STATUS_LED */ +#ifdef CONFIG_STATUS_LED +#define CONFIG_BOARD_SPECIFIC_LED +#ifndef __ASSEMBLY__ +typedef unsigned int led_id_t; +void __led_init(led_id_t mask, int state); +void __led_set(led_id_t mask, int state); +void __led_toggle(led_id_t mask); +#endif +/* use LED0 to indicate booting/alive */ +#define STATUS_LED_BOOT 0 +#define STATUS_LED_BIT 1 +#define STATUS_LED_STATE STATUS_LED_ON +#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4) +/* use LED1 to indicate crash */ +#define STATUS_LED_CRASH 1 +#define STATUS_LED_BIT1 2 +#define STATUS_LED_STATE1 STATUS_LED_ON +#define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) +#endif + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#include <asm/blackfin-config-post.h> + +#endif diff --git a/include/configs/bf527-ezkit.h b/include/configs/bf527-ezkit.h new file mode 100644 index 000000000..42cb0a8d7 --- /dev/null +++ b/include/configs/bf527-ezkit.h @@ -0,0 +1,172 @@ +/* + * U-boot - Configuration file for BF537 STAMP board + */ + +#ifndef __CONFIG_BF527_EZKIT_H__ +#define __CONFIG_BF527_EZKIT_H__ + +#include <asm/blackfin-config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf527-0.0 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL 0x03F6 +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_3 | PASR_ALL | TRAS_6 | TRP_3 | TRCD_3 | TWR_2 | PSS) + +#define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) + +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) +#define CONFIG_SYS_MALLOC_LEN (640 * 1024) + + +/* + * NAND Settings + * (can't be used same time as ethernet) + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) +#define CONFIG_BFIN_NFC +#endif +#ifdef CONFIG_BFIN_NFC +#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 +#define CONFIG_DRIVER_NAND_BFIN +#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_CMD_NAND +#endif + + +/* + * Network Settings + */ +#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ + !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) +#define ADI_CMDS_NETWORK 1 +#define CONFIG_BFIN_MAC +#define CONFIG_RMII +#define CONFIG_NETCONSOLE 1 +#define CONFIG_NET_MULTI 1 +#endif +#define CONFIG_HOSTNAME bf527-ezkit +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 259 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#else +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#endif +#define ENV_IS_EMBEDDED_CUSTOM + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * USB Settings + */ +#if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) +#define CONFIG_USB +#define CONFIG_MUSB_HCD +#define CONFIG_USB_BLACKFIN +#define CONFIG_USB_STORAGE +#define CONFIG_MUSB_TIMEOUT 100000 +#endif + + +/* + * Misc Settings + */ +#define CONFIG_MISC_INIT_R +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 1 + +/* Don't waste time transferring a logo over the UART */ +#if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART) +# define CONFIG_VIDEO +#endif + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#include <asm/blackfin-config-post.h> + +#endif diff --git a/include/configs/bf538f-ezkit.h b/include/configs/bf538f-ezkit.h new file mode 100644 index 000000000..a7fb92e62 --- /dev/null +++ b/include/configs/bf538f-ezkit.h @@ -0,0 +1,139 @@ +/* + * U-boot - Configuration file for BF538F EZ-Kit Lite board + */ + +#ifndef __CONFIG_BF538F_EZKIT_H__ +#define __CONFIG_BF538F_EZKIT_H__ + +#include <asm/blackfin-config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf538-0.4 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_SDRRC_VAL (0x03F6) +#define CONFIG_EBIU_SDGCTL_VAL (SCTLE | PSS | TWR_2 | TRCD_3 | TRP_3 | TRAS_6 | PASR_ALL | CL_3) + +#define CONFIG_EBIU_AMGCTL_VAL (CDPRIO | AMBEN_ALL | AMCKEN) +#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) +#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) + +#define CONFIG_SYS_MONITOR_LEN (256 * 1024) +#define CONFIG_SYS_MALLOC_LEN (384 * 1024) + + +/* + * Network Settings + */ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_DRIVER_SMC91111 1 +#define CONFIG_SMC91111_BASE 0x20310300 +#define CONFIG_HOSTNAME bf538f-ezkit +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 71 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_ATMEL +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_SPI_FLASH_STMICRO +#define CONFIG_SPI_FLASH_WINBOND + + +/* + * Env Storage Settings + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#else +#define CONFIG_ENV_IS_IN_FLASH +#define CONFIG_ENV_OFFSET 0x4000 +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x2000 +#endif +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) +#define ENV_IS_EMBEDDED +#else +#define ENV_IS_EMBEDDED_CUSTOM +#endif + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * Misc Settings + */ +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 0 + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#include <asm/blackfin-config-post.h> + +#endif diff --git a/include/configs/bf548-ezkit.h b/include/configs/bf548-ezkit.h new file mode 100644 index 000000000..ae9fb3674 --- /dev/null +++ b/include/configs/bf548-ezkit.h @@ -0,0 +1,211 @@ +/* + * U-boot - Configuration file for BF548 STAMP board + */ + +#ifndef __CONFIG_BF548_EZKIT_H__ +#define __CONFIG_BF548_EZKIT_H__ + +#include <asm/blackfin-config-pre.h> + + +/* + * Processor Settings + */ +#define CONFIG_BFIN_CPU bf548-0.0 +#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA + + +/* + * Clock Settings + * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV + * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV + */ +/* CONFIG_CLKIN_HZ is any value in Hz */ +#define CONFIG_CLKIN_HZ 25000000 +/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ +/* 1 = CLKIN / 2 */ +#define CONFIG_CLKIN_HALF 0 +/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ +/* 1 = bypass PLL */ +#define CONFIG_PLL_BYPASS 0 +/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ +/* Values can range from 0-63 (where 0 means 64) */ +#define CONFIG_VCO_MULT 21 +/* CCLK_DIV controls the core clock divider */ +/* Values can be 1, 2, 4, or 8 ONLY */ +#define CONFIG_CCLK_DIV 1 +/* SCLK_DIV controls the system clock divider */ +/* Values can range from 1-15 */ +#define CONFIG_SCLK_DIV 4 + + +/* + * Memory Settings + */ +#define CONFIG_MEM_ADD_WDTH 10 +#define CONFIG_MEM_SIZE 64 + +#define CONFIG_EBIU_DDRCTL0_VAL 0x218A83FE +#define CONFIG_EBIU_DDRCTL1_VAL 0x20022222 +#define CONFIG_EBIU_DDRCTL2_VAL 0x00000021 + +/* Default EZ-Kit bank mapping: + * Async Bank 0 - 32MB Burst Flash + * Async Bank 1 - Ethernet + * Async Bank 2 - Nothing + * Async Bank 3 - Nothing + */ +#define CONFIG_EBIU_AMGCTL_VAL 0xFF +#define CONFIG_EBIU_AMBCTL0_VAL 0x7BB07BB0 +#define CONFIG_EBIU_AMBCTL1_VAL 0xFFC27BB0 +#define CONFIG_EBIU_FCTL_VAL (BCLK_4) +#define CONFIG_EBIU_MODE_VAL (B0MODE_FLASH) + +#define CONFIG_SYS_MONITOR_LEN (768 * 1024) +#define CONFIG_SYS_MALLOC_LEN (768 * 1024) + + +/* + * Network Settings + */ +#define ADI_CMDS_NETWORK 1 +#define CONFIG_DRIVER_SMC911X 1 +#define CONFIG_DRIVER_SMC911X_BASE 0x24000000 +#define CONFIG_DRIVER_SMC911X_16_BIT +#define CONFIG_HOSTNAME bf548-ezkit +/* Uncomment next line to use fixed MAC address */ +/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ + + +/* + * Flash Settings + */ +#define CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_BASE 0x20000000 +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_PROTECTION +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 259 + + +/* + * SPI Settings + */ +#define CONFIG_BFIN_SPI +#define CONFIG_ENV_SPI_MAX_HZ 30000000 +#define CONFIG_SF_DEFAULT_HZ 30000000 +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_STMICRO + + +/* + * Env Storage Settings + */ +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) +#define CONFIG_ENV_IS_IN_SPI_FLASH +#define CONFIG_ENV_OFFSET 0x10000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE 0x10000 +#define ENV_IS_EMBEDDED_CUSTOM +#elif (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) +#define CONFIG_ENV_IS_IN_NAND +#define CONFIG_ENV_OFFSET 0x40000 +#define CONFIG_ENV_SIZE 0x20000 +#else +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_ADDR 0x20002000 +#define CONFIG_ENV_OFFSET 0x2000 +#define CONFIG_ENV_SIZE 0x2000 +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define ENV_IS_EMBEDDED_CUSTOM +#endif + + +/* + * NAND Settings + */ +#define CONFIG_BFIN_NFC_CTL_VAL 0x0033 +#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) +# define CONFIG_BFIN_NFC_BOOTROM_ECC +#endif +#define CONFIG_DRIVER_NAND_BFIN +#define CONFIG_SYS_NAND_BASE 0 /* not actually used */ +#define CONFIG_SYS_MAX_NAND_DEVICE 1 +#define NAND_MAX_CHIPS 1 +#define CONFIG_CMD_NAND + + +/* + * I2C Settings + */ +#define CONFIG_BFIN_TWI_I2C 1 +#define CONFIG_HARD_I2C 1 +#define CONFIG_SYS_I2C_SPEED 50000 +#define CONFIG_SYS_I2C_SLAVE 0 + + +/* + * SATA + */ +#if !defined(__ADSPBF544__) +#define CONFIG_LIBATA +#define CONFIG_SYS_SATA_MAX_DEVICE 1 +#define CONFIG_LBA48 +#define CONFIG_PATA_BFIN +#define CONFIG_BFIN_ATAPI_BASE_ADDR 0xFFC03800 +#define CONFIG_BFIN_ATA_MODE XFER_PIO_4 +#endif + + +/* + * SDH Settings + */ +#if !defined(__ADSPBF544__) +#define CONFIG_MMC +#define CONFIG_BFIN_SDH +#endif + + +/* + * USB Settings + */ +#if !defined(__ADSPBF544__) +#define CONFIG_USB +#define CONFIG_MUSB_HCD +#define CONFIG_USB_BLACKFIN +#define CONFIG_USB_STORAGE +#define CONFIG_MUSB_TIMEOUT 100000 +#endif + + +/* + * Misc Settings + */ +#define CONFIG_BOARD_EARLY_INIT_F +#define CONFIG_RTC_BFIN +#define CONFIG_UART_CONSOLE 1 + +#ifndef __ADSPBF542__ +/* Don't waste time transferring a logo over the UART */ +# if (CONFIG_BFIN_BOOT_MODE != BFIN_BOOT_UART) +# define CONFIG_VIDEO +# endif +# define CONFIG_DEB_DMA_URGENT +#endif + +/* Define if want to do post memory test */ +#undef CONFIG_POST +#ifdef CONFIG_POST +#define FLASH_START_POST_BLOCK 11 /* Should > = 11 */ +#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */ +#endif + + +/* + * Pull in common ADI header for remaining command/environment setup + */ +#include <configs/bfin_adi_common.h> + +#include <asm/blackfin-config-post.h> + +#endif diff --git a/include/configs/eNET.h b/include/configs/eNET.h index f7e6608ba..dde4c8321 100644 --- a/include/configs/eNET.h +++ b/include/configs/eNET.h @@ -70,16 +70,15 @@ */ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ #define CONFIG_CMD_BDI /* bdinfo */ #define CONFIG_CMD_BOOTD /* bootd */ #define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_FLASH /* flinfo, erase, protect */ #define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IMI /* iminfo */ #define CONFIG_CMD_IMLS /* List all found images */ +#define CONFIG_CMD_IRQ /* IRQ Information */ #define CONFIG_CMD_ITEST /* Integer (and string) test */ #define CONFIG_CMD_LOADB /* loadb */ #define CONFIG_CMD_LOADS /* loads */ @@ -88,9 +87,10 @@ #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #undef CONFIG_CMD_NFS /* NFS support */ #define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SAVEENV /* saveenv */ #define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command Support */ #define CONFIG_CMD_XIMG /* Load part of Multi Image */ -#define CONFIG_CMD_IRQ /* IRQ Information */ #define CONFIG_BOOTDELAY 15 #define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600" diff --git a/include/configs/favr-32-ezkit.h b/include/configs/favr-32-ezkit.h index 21802df1d..739ff0d62 100644 --- a/include/configs/favr-32-ezkit.h +++ b/include/configs/favr-32-ezkit.h @@ -139,9 +139,9 @@ #define CONFIG_CMD_JFFS2 #define CONFIG_CMD_MMC -#undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_SETGETDCR +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_XIMG #define CONFIG_ATMEL_USART 1 diff --git a/include/configs/grsim.h b/include/configs/grsim.h index a9eaa4a2c..c3f1a3106 100644 --- a/include/configs/grsim.h +++ b/include/configs/grsim.h @@ -65,23 +65,23 @@ /* * Supported commands */ -#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_AMBAPP /* AMBA Plyg&Play information */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DIAG -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MISC /* Misc functions like sleep etc */ -#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ +#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */ #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ /* * Autobooting diff --git a/include/configs/grsim_leon2.h b/include/configs/grsim_leon2.h index 58f26fd5a..7ebbf2501 100644 --- a/include/configs/grsim_leon2.h +++ b/include/configs/grsim_leon2.h @@ -64,21 +64,21 @@ /* * Supported commands */ -#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */ -#define CONFIG_CMD_BDI /* bdinfo */ -#define CONFIG_CMD_CONSOLE /* coninfo */ +#define CONFIG_CMD_BDI /* bdinfo */ +#define CONFIG_CMD_CONSOLE /* coninfo */ #define CONFIG_CMD_DIAG -#define CONFIG_CMD_ECHO /* echo arguments */ -#define CONFIG_CMD_FPGA /* FPGA configuration Support */ +#define CONFIG_CMD_ECHO /* echo arguments */ +#define CONFIG_CMD_FPGA /* FPGA configuration Support */ #define CONFIG_CMD_IRQ -#define CONFIG_CMD_ITEST /* Integer (and string) test */ -#define CONFIG_CMD_LOADB /* loadb */ -#define CONFIG_CMD_LOADS /* loads */ +#define CONFIG_CMD_ITEST /* Integer (and string) test */ +#define CONFIG_CMD_LOADB /* loadb */ +#define CONFIG_CMD_LOADS /* loads */ #define CONFIG_CMD_MISC /* Misc functions like sleep etc */ #define CONFIG_CMD_REGINFO -#define CONFIG_CMD_RUN /* run command in env variable */ -#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ -#define CONFIG_CMD_XIMG /* Load part of Multi Image */ +#define CONFIG_CMD_RUN /* run command in env variable */ +#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */ +#define CONFIG_CMD_SOURCE /* "source" command support */ +#define CONFIG_CMD_XIMG /* Load part of Multi Image */ /* * Autobooting diff --git a/include/configs/gth2.h b/include/configs/gth2.h index b1b4842e0..677baea5b 100644 --- a/include/configs/gth2.h +++ b/include/configs/gth2.h @@ -90,18 +90,18 @@ #define CONFIG_CMD_IDE #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_ELF #undef CONFIG_CMD_FAT #undef CONFIG_CMD_FLASH #undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_MII -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_ELF -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_MII #undef CONFIG_CMD_NFS -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_SAVEENV +#undef CONFIG_CMD_SOURCE /* diff --git a/include/configs/keymile-common.h b/include/configs/keymile-common.h index 58b95f463..b2e37ec22 100644 --- a/include/configs/keymile-common.h +++ b/include/configs/keymile-common.h @@ -240,7 +240,7 @@ "new_esw_0x${IVM_BoardId}_0x${IVM_HWKey}.scr \0" \ "new_esw=run set_new_esw_script; " \ "tftp ${autoscr_ws} ${new_esw_script}; " \ - "iminfo ${autoscr_ws}; autoscr ${autoscr_ws} \0" \ + "iminfo ${autoscr_ws}; source ${autoscr_ws} \0" \ "bootlimit=0 \0" \ CONFIG_KM_DEF_ENV_IOMUX \ CONFIG_KM_DEF_ENV_PRIVATE \ diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h index d52a5e0cf..8f0077321 100644 --- a/include/configs/lwmon.h +++ b/include/configs/lwmon.h @@ -93,7 +93,7 @@ * 3 = 0x3C+0x3F = F3 + F6 : enable test mode */ -#define CONFIG_BOOTCOMMAND "autoscr 40040000;saveenv" +#define CONFIG_BOOTCOMMAND "source 40040000;saveenv" /* "gatewayip=10.8.211.250\0" \ */ #define CONFIG_EXTRA_ENV_SETTINGS \ @@ -108,7 +108,7 @@ "key_magic2=3A+3C\0" \ "key_cmd2=echo *** Entering Update Mode ***;" \ "if fatload ide 0:3 10000 update.scr;" \ - "then autoscr 10000;" \ + "then source 10000;" \ "else echo *** UPDATE FAILED ***;" \ "fi\0" \ "key_magic3=3C+3F\0" \ diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h index 05055c89a..777a4d6cf 100644 --- a/include/configs/lwmon5.h +++ b/include/configs/lwmon5.h @@ -313,7 +313,7 @@ "cp.b 200000 FFF80000 80000\0" \ "upd=run load update\0" \ "lwe_env=tftp 200000 /tftpboot.dev/lwmon5/env_uboot.bin;" \ - "autoscr 200000\0" \ + "source 200000\0" \ "" #define CONFIG_BOOTCOMMAND "run flash_self" diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h index 9ac7e9afb..edaa17403 100644 --- a/include/configs/mp2usb.h +++ b/include/configs/mp2usb.h @@ -163,15 +163,15 @@ #else - #define CONFIG_CMD_USB #define CONFIG_CMD_CACHE + #define CONFIG_CMD_USB - #undef CONFIG_CMD_AUTOSCRIPT #undef CONFIG_CMD_BDI #undef CONFIG_CMD_FPGA #undef CONFIG_CMD_IMI #undef CONFIG_CMD_LOADS #undef CONFIG_CMD_MISC + #undef CONFIG_CMD_SOURCE #endif diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h index 431e6695e..24fa144ec 100644 --- a/include/configs/mx1fs2.h +++ b/include/configs/mx1fs2.h @@ -51,12 +51,12 @@ #define CONFIG_CMD_JFFS2 -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_NET #undef CONFIG_CMD_PING -#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_SOURCE /* diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 331bf4530..1803b1346 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -135,7 +135,7 @@ #define CONFIG_CMD_I2C #define CONFIG_CMD_JFFS2 - #undef CONFIG_CMD_AUTOSCRIPT + #undef CONFIG_CMD_SOURCE #endif diff --git a/include/configs/omap3_beagle.h b/include/configs/omap3_beagle.h index 7db1eb754..5a948e4cd 100644 --- a/include/configs/omap3_beagle.h +++ b/include/configs/omap3_beagle.h @@ -174,7 +174,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ diff --git a/include/configs/omap3_evm.h b/include/configs/omap3_evm.h index 2f532d592..8cd8a1b90 100644 --- a/include/configs/omap3_evm.h +++ b/include/configs/omap3_evm.h @@ -167,7 +167,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ diff --git a/include/configs/omap3_overo.h b/include/configs/omap3_overo.h index 0c32100a0..51b04b642 100644 --- a/include/configs/omap3_overo.h +++ b/include/configs/omap3_overo.h @@ -161,7 +161,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ diff --git a/include/configs/omap3_pandora.h b/include/configs/omap3_pandora.h index fb4e50dbd..40107a60d 100644 --- a/include/configs/omap3_pandora.h +++ b/include/configs/omap3_pandora.h @@ -163,7 +163,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ diff --git a/include/configs/omap3_zoom1.h b/include/configs/omap3_zoom1.h index 883234a50..c60778c0f 100644 --- a/include/configs/omap3_zoom1.h +++ b/include/configs/omap3_zoom1.h @@ -171,7 +171,7 @@ "rootfstype=jffs2\0" \ "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \ "bootscript=echo Running bootscript from mmc ...; " \ - "autoscr ${loadaddr}\0" \ + "source ${loadaddr}\0" \ "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \ "mmcboot=echo Booting from mmc ...; " \ "run mmcargs; " \ diff --git a/include/configs/sc3.h b/include/configs/sc3.h index 5b68ef987..97e1da22b 100644 --- a/include/configs/sc3.h +++ b/include/configs/sc3.h @@ -122,7 +122,7 @@ "rootpath=/opt/eldk/ppc_4xx\0" \ "bootfile=/tftpboot/sc3/uImage\0" \ "u-boot=/tftpboot/sc3/u-boot.bin\0" \ - "setup=tftp 200000 /tftpboot/sc3/setup.img;autoscr 200000\0" \ + "setup=tftp 200000 /tftpboot/sc3/setup.img;source 200000\0" \ "kernel_addr=FFE08000\0" \ "" #undef CONFIG_BOOTCOMMAND @@ -186,20 +186,20 @@ #include <config_cmd_default.h> -#define CONFIG_CMD_AUTOSCRIPT -#define CONFIG_CMD_PCI -#define CONFIG_CMD_IRQ -#define CONFIG_CMD_NET -#define CONFIG_CMD_MII -#define CONFIG_CMD_PING -#define CONFIG_CMD_NAND -#define CONFIG_CMD_JFFS2 -#define CONFIG_CMD_I2C -#define CONFIG_CMD_IDE +#define CONFIG_CMD_CACHE #define CONFIG_CMD_DATE #define CONFIG_CMD_DHCP -#define CONFIG_CMD_CACHE #define CONFIG_CMD_ELF +#define CONFIG_CMD_I2C +#define CONFIG_CMD_IDE +#define CONFIG_CMD_IRQ +#define CONFIG_CMD_JFFS2 +#define CONFIG_CMD_MII +#define CONFIG_CMD_NAND +#define CONFIG_CMD_NET +#define CONFIG_CMD_PCI +#define CONFIG_CMD_PING +#define CONFIG_CMD_SOURCE #undef CONFIG_WATCHDOG /* watchdog disabled */ diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h index 2f166c9d8..893c3d3c2 100644 --- a/include/configs/scb9328.h +++ b/include/configs/scb9328.h @@ -54,9 +54,9 @@ #define CONFIG_CMD_PING #define CONFIG_CMD_DHCP -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE /* diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index 5a5f7728f..147233df1 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -68,7 +68,7 @@ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off; " \ "bootm" -#define CONFIG_AUTOSCRIPT +#define CONFIG_SOURCE #define CONFIG_LOADS_ECHO 0 /* echo off for serial download */ #undef CONFIG_SYS_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/vct.h b/include/configs/vct.h index 5371e2d7f..d202522bd 100644 --- a/include/configs/vct.h +++ b/include/configs/vct.h @@ -301,38 +301,38 @@ int vct_gpio_get(int pin); * (NOR/OneNAND) usage and Linux kernel booting. */ #if defined(CONFIG_VCT_SMALL_IMAGE) +#undef CONFIG_CMD_ASKENV +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_BEDBUG +#undef CONFIG_CMD_CACHE +#undef CONFIG_CMD_CONSOLE +#undef CONFIG_CMD_CRC32 +#undef CONFIG_CMD_DHCP +#undef CONFIG_CMD_EEPROM #undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_PING -#undef CONFIG_CMD_SNTP #undef CONFIG_CMD_ELF -#undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_CACHE -#undef CONFIG_CMD_BEDBUG -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_FAT +#undef CONFIG_CMD_I2C +#undef CONFIG_CMD_I2C #undef CONFIG_CMD_IRQ #undef CONFIG_CMD_ITEST +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_LOADY #undef CONFIG_CMD_MII #undef CONFIG_CMD_MISC +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_PING #undef CONFIG_CMD_REGINFO +#undef CONFIG_CMD_SNTP +#undef CONFIG_CMD_SOURCE #undef CONFIG_CMD_STRINGS #undef CONFIG_CMD_TERMINAL -#undef CONFIG_CMD_ASKENV -#undef CONFIG_CMD_CRC32 -#undef CONFIG_CMD_DHCP -#undef CONFIG_CMD_EEPROM -#undef CONFIG_CMD_I2C -#undef CONFIG_CMD_LOADB -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_LOADY -#undef CONFIG_CMD_BDI #undef CONFIG_CMD_USB -#undef CONFIG_CMD_FAT #undef CONFIG_DRIVER_SMC911X #undef CONFIG_SOFT_I2C -#undef CONFIG_AUTOSCRIPT +#undef CONFIG_SOURCE #undef CONFIG_SYS_LONGHELP #undef CONFIG_TIMESTAMP #endif /* CONFIG_VCT_SMALL_IMAGE */ diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h index 717577f39..e74303da8 100644 --- a/include/configs/wepep250.h +++ b/include/configs/wepep250.h @@ -49,10 +49,10 @@ */ #include <config_cmd_default.h> -#undef CONFIG_CMD_NET -#undef CONFIG_CMD_LOADS #undef CONFIG_CMD_CONSOLE -#undef CONFIG_CMD_AUTOSCRIPT +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NET +#undef CONFIG_CMD_SOURCE /* diff --git a/include/libfdt.h b/include/libfdt.h index ce374fded..d23d40e07 100644 --- a/include/libfdt.h +++ b/include/libfdt.h @@ -156,7 +156,7 @@ int fdt_next_node(const void *fdt, int offset, int *depth); #define __fdt_set_hdr(name) \ static inline void fdt_set_##name(void *fdt, uint32_t val) \ { \ - struct fdt_header *fdth = fdt; \ + struct fdt_header *fdth = (struct fdt_header*)fdt; \ fdth->name = cpu_to_fdt32(val); \ } __fdt_set_hdr(magic); diff --git a/include/ns16550.h b/include/ns16550.h index edfbc53a5..87624bf42 100644 --- a/include/ns16550.h +++ b/include/ns16550.h @@ -1,6 +1,10 @@ /* * NS16550 Serial Port * originally from linux source (arch/ppc/boot/ns16550.h) + * + * Cleanup and unification + * (C) 2009 by Detlev Zundel, DENX Software Engineering GmbH + * * modified slightly to * have addresses as offsets from CONFIG_SYS_ISA_BASE * added a few more definitions @@ -115,53 +119,100 @@ struct NS16550 { typedef volatile struct NS16550 *NS16550_t; -#define FCR_FIFO_EN 0x01 /* Fifo enable */ -#define FCR_RXSR 0x02 /* Receiver soft reset */ -#define FCR_TXSR 0x04 /* Transmitter soft reset */ +/* + * These are the definitions for the FIFO Control Register + */ +#define UART_FCR_FIFO_EN 0x01 /* Fifo enable */ +#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ +#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ +#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ +#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ +#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ +#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ +#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ +#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ -#define MCR_DTR 0x01 -#define MCR_RTS 0x02 -#define MCR_DMA_EN 0x04 -#define MCR_TX_DFR 0x08 -#define MCR_LOOP 0x10 /* Enable loopback test mode */ +#define UART_FCR_RXSR 0x02 /* Receiver soft reset */ +#define UART_FCR_TXSR 0x04 /* Transmitter soft reset */ -#define LCR_WLS_MSK 0x03 /* character length select mask */ -#define LCR_WLS_5 0x00 /* 5 bit character length */ -#define LCR_WLS_6 0x01 /* 6 bit character length */ -#define LCR_WLS_7 0x02 /* 7 bit character length */ -#define LCR_WLS_8 0x03 /* 8 bit character length */ -#define LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ -#define LCR_PEN 0x08 /* Parity eneble */ -#define LCR_EPS 0x10 /* Even Parity Select */ -#define LCR_STKP 0x20 /* Stick Parity */ -#define LCR_SBRK 0x40 /* Set Break */ -#define LCR_BKSE 0x80 /* Bank select enable */ -#define LCR_DLAB 0x80 /* Divisor latch access bit */ +/* + * These are the definitions for the Modem Control Register + */ +#define UART_MCR_DTR 0x01 /* DTR */ +#define UART_MCR_RTS 0x02 /* RTS */ +#define UART_MCR_OUT1 0x04 /* Out 1 */ +#define UART_MCR_OUT2 0x08 /* Out 2 */ +#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ + +#define UART_MCR_DMA_EN 0x04 +#define UART_MCR_TX_DFR 0x08 + +/* + * These are the definitions for the Line Control Register + * + * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting + * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. + */ +#define UART_LCR_WLS_MSK 0x03 /* character length select mask */ +#define UART_LCR_WLS_5 0x00 /* 5 bit character length */ +#define UART_LCR_WLS_6 0x01 /* 6 bit character length */ +#define UART_LCR_WLS_7 0x02 /* 7 bit character length */ +#define UART_LCR_WLS_8 0x03 /* 8 bit character length */ +#define UART_LCR_STB 0x04 /* Number of stop Bits, off = 1, on = 1.5 or 2) */ +#define UART_LCR_PEN 0x08 /* Parity eneble */ +#define UART_LCR_EPS 0x10 /* Even Parity Select */ +#define UART_LCR_STKP 0x20 /* Stick Parity */ +#define UART_LCR_SBRK 0x40 /* Set Break */ +#define UART_LCR_BKSE 0x80 /* Bank select enable */ +#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define LSR_DR 0x01 /* Data ready */ -#define LSR_OE 0x02 /* Overrun */ -#define LSR_PE 0x04 /* Parity error */ -#define LSR_FE 0x08 /* Framing error */ -#define LSR_BI 0x10 /* Break */ -#define LSR_THRE 0x20 /* Xmit holding register empty */ -#define LSR_TEMT 0x40 /* Xmitter empty */ -#define LSR_ERR 0x80 /* Error */ +/* + * These are the definitions for the Line Status Register + */ +#define UART_LSR_DR 0x01 /* Data ready */ +#define UART_LSR_OE 0x02 /* Overrun */ +#define UART_LSR_PE 0x04 /* Parity error */ +#define UART_LSR_FE 0x08 /* Framing error */ +#define UART_LSR_BI 0x10 /* Break */ +#define UART_LSR_THRE 0x20 /* Xmit holding register empty */ +#define UART_LSR_TEMT 0x40 /* Xmitter empty */ +#define UART_LSR_ERR 0x80 /* Error */ + +#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ +#define UART_MSR_RI 0x40 /* Ring Indicator */ +#define UART_MSR_DSR 0x20 /* Data Set Ready */ +#define UART_MSR_CTS 0x10 /* Clear to Send */ +#define UART_MSR_DDCD 0x08 /* Delta DCD */ +#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ +#define UART_MSR_DDSR 0x02 /* Delta DSR */ +#define UART_MSR_DCTS 0x01 /* Delta CTS */ + +/* + * These are the definitions for the Interrupt Identification Register + */ +#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ +#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ + +#define UART_IIR_MSI 0x00 /* Modem status interrupt */ +#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ +#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ +#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ + +/* + * These are the definitions for the Interrupt Enable Register + */ +#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ +#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ +#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ +#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ -#define MSR_DCD 0x80 /* Data Carrier Detect */ -#define MSR_RI 0x40 /* Ring Indicator */ -#define MSR_DSR 0x20 /* Data Set Ready */ -#define MSR_CTS 0x10 /* Clear to Send */ -#define MSR_DDCD 0x08 /* Delta DCD */ -#define MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define MSR_DDSR 0x02 /* Delta DSR */ -#define MSR_DCTS 0x01 /* Delta CTS */ #ifdef CONFIG_OMAP1510 -#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */ +#define OSC_12M_SEL 0x01 /* selects 6.5 * current clk div */ #endif /* useful defaults for LCR */ -#define LCR_8N1 0x03 +#define UART_LCR_8N1 0x03 void NS16550_init (NS16550_t com_port, int baud_divisor); void NS16550_putc (NS16550_t com_port, char c); diff --git a/include/ps2mult.h b/include/ps2mult.h index 599cb6dc4..1a38733b7 100644 --- a/include/ps2mult.h +++ b/include/ps2mult.h @@ -53,103 +53,4 @@ struct serial_state { u8 *iomem_base; }; -#define UART_RX 0 /* In: Receive buffer (DLAB=0) */ -#define UART_TX 0 /* Out: Transmit buffer (DLAB=0) */ -#define UART_DLL 0 /* Out: Divisor Latch Low (DLAB=1) */ - -#define UART_DLM 1 /* Out: Divisor Latch High (DLAB=1) */ -#define UART_IER 1 /* Out: Interrupt Enable Register */ - -#define UART_IIR 2 /* In: Interrupt ID Register */ -#define UART_FCR 2 /* Out: FIFO Control Register */ - -#define UART_LCR 3 /* Out: Line Control Register */ -#define UART_MCR 4 /* Out: Modem Control Register */ -#define UART_LSR 5 /* In: Line Status Register */ -#define UART_MSR 6 /* In: Modem Status Register */ -#define UART_SCR 7 /* I/O: Scratch Register */ - -/* - * These are the definitions for the FIFO Control Register - * (16650 only) - */ -#define UART_FCR_ENABLE_FIFO 0x01 /* Enable the FIFO */ -#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */ -#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */ -#define UART_FCR_DMA_SELECT 0x08 /* For DMA applications */ -#define UART_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ - -/* - * These are the definitions for the Line Control Register - * - * Note: if the word length is 5 bits (UART_LCR_WLEN5), then setting - * UART_LCR_STOP will select 1.5 stop bits, not 2 stop bits. - */ -#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */ -#define UART_LCR_SBC 0x40 /* Set break control */ -#define UART_LCR_SPAR 0x20 /* Stick parity (?) */ -#define UART_LCR_EPAR 0x10 /* Even parity select */ -#define UART_LCR_PARITY 0x08 /* Parity Enable */ -#define UART_LCR_STOP 0x04 /* Stop bits: 0=1 stop bit, 1= 2 stop bits */ -#define UART_LCR_WLEN5 0x00 /* Wordlength: 5 bits */ -#define UART_LCR_WLEN6 0x01 /* Wordlength: 6 bits */ -#define UART_LCR_WLEN7 0x02 /* Wordlength: 7 bits */ -#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */ - -/* - * These are the definitions for the Line Status Register - */ -#define UART_LSR_TEMT 0x40 /* Transmitter empty */ -#define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */ -#define UART_LSR_BI 0x10 /* Break interrupt indicator */ -#define UART_LSR_FE 0x08 /* Frame error indicator */ -#define UART_LSR_PE 0x04 /* Parity error indicator */ -#define UART_LSR_OE 0x02 /* Overrun error indicator */ -#define UART_LSR_DR 0x01 /* Receiver data ready */ - -/* - * These are the definitions for the Interrupt Identification Register - */ -#define UART_IIR_NO_INT 0x01 /* No interrupts pending */ -#define UART_IIR_ID 0x06 /* Mask for the interrupt ID */ - -#define UART_IIR_MSI 0x00 /* Modem status interrupt */ -#define UART_IIR_THRI 0x02 /* Transmitter holding register empty */ -#define UART_IIR_RDI 0x04 /* Receiver data interrupt */ -#define UART_IIR_RLSI 0x06 /* Receiver line status interrupt */ - -/* - * These are the definitions for the Interrupt Enable Register - */ -#define UART_IER_MSI 0x08 /* Enable Modem status interrupt */ -#define UART_IER_RLSI 0x04 /* Enable receiver line status interrupt */ -#define UART_IER_THRI 0x02 /* Enable Transmitter holding register int. */ -#define UART_IER_RDI 0x01 /* Enable receiver data interrupt */ - -/* - * These are the definitions for the Modem Control Register - */ -#define UART_MCR_LOOP 0x10 /* Enable loopback test mode */ -#define UART_MCR_OUT2 0x08 /* Out2 complement */ -#define UART_MCR_OUT1 0x04 /* Out1 complement */ -#define UART_MCR_RTS 0x02 /* RTS complement */ -#define UART_MCR_DTR 0x01 /* DTR complement */ - -/* - * These are the definitions for the Modem Status Register - */ -#define UART_MSR_DCD 0x80 /* Data Carrier Detect */ -#define UART_MSR_RI 0x40 /* Ring Indicator */ -#define UART_MSR_DSR 0x20 /* Data Set Ready */ -#define UART_MSR_CTS 0x10 /* Clear to Send */ -#define UART_MSR_DDCD 0x08 /* Delta DCD */ -#define UART_MSR_TERI 0x04 /* Trailing edge ring indicator */ -#define UART_MSR_DDSR 0x02 /* Delta DSR */ -#define UART_MSR_DCTS 0x01 /* Delta CTS */ -#define UART_MSR_ANY_DELTA 0x0F /* Any of the delta bits! */ - #endif /* __LINUX_PS2MULT_H */ diff --git a/libfdt/fdt.c b/libfdt/fdt.c index a59a518b0..b09ea6f04 100644 --- a/libfdt/fdt.c +++ b/libfdt/fdt.c @@ -94,42 +94,53 @@ const void *fdt_offset_ptr(const void *fdt, int offset, unsigned int len) return p; } -uint32_t fdt_next_tag(const void *fdt, int offset, int *nextoffset) +uint32_t fdt_next_tag(const void *fdt, int startoffset, int *nextoffset) { const uint32_t *tagp, *lenp; uint32_t tag; + int offset = startoffset; const char *p; - if (offset % FDT_TAGSIZE) - return -1; - + *nextoffset = -FDT_ERR_TRUNCATED; tagp = fdt_offset_ptr(fdt, offset, FDT_TAGSIZE); - if (! tagp) + if (!tagp) return FDT_END; /* premature end */ tag = fdt32_to_cpu(*tagp); offset += FDT_TAGSIZE; + *nextoffset = -FDT_ERR_BADSTRUCTURE; switch (tag) { case FDT_BEGIN_NODE: /* skip name */ do { p = fdt_offset_ptr(fdt, offset++, 1); } while (p && (*p != '\0')); - if (! p) - return FDT_END; + if (!p) + return FDT_END; /* premature end */ break; + case FDT_PROP: lenp = fdt_offset_ptr(fdt, offset, sizeof(*lenp)); - if (! lenp) - return FDT_END; - /* skip name offset, length and value */ - offset += 2*FDT_TAGSIZE + fdt32_to_cpu(*lenp); + if (!lenp) + return FDT_END; /* premature end */ + /* skip-name offset, length and value */ + offset += sizeof(struct fdt_property) - FDT_TAGSIZE + + fdt32_to_cpu(*lenp); + break; + + case FDT_END: + case FDT_END_NODE: + case FDT_NOP: break; + + default: + return FDT_END; } - if (nextoffset) - *nextoffset = FDT_TAGALIGN(offset); + if (!fdt_offset_ptr(fdt, startoffset, offset - startoffset)) + return FDT_END; /* premature end */ + *nextoffset = FDT_TAGALIGN(offset); return tag; } @@ -166,15 +177,16 @@ int fdt_next_node(const void *fdt, int offset, int *depth) break; case FDT_END_NODE: - if (depth) - (*depth)--; + if (depth && ((--(*depth)) < 0)) + return nextoffset; break; case FDT_END: - return -FDT_ERR_NOTFOUND; - - default: - return -FDT_ERR_BADSTRUCTURE; + if ((nextoffset >= 0) + || ((nextoffset == -FDT_ERR_TRUNCATED) && !depth)) + return -FDT_ERR_NOTFOUND; + else + return nextoffset; } } while (tag != FDT_BEGIN_NODE); diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c index fdc9c29d2..1e1e32209 100644 --- a/libfdt/fdt_ro.c +++ b/libfdt/fdt_ro.c @@ -112,24 +112,20 @@ int fdt_num_mem_rsv(const void *fdt) int fdt_subnode_offset_namelen(const void *fdt, int offset, const char *name, int namelen) { - int depth = 0; + int depth; FDT_CHECK_HEADER(fdt); - for (depth = 0, offset = fdt_next_node(fdt, offset, &depth); - (offset >= 0) && (depth > 0); - offset = fdt_next_node(fdt, offset, &depth)) { - if (depth < 0) - return -FDT_ERR_NOTFOUND; - else if ((depth == 1) - && _fdt_nodename_eq(fdt, offset, name, namelen)) + for (depth = 0; + (offset >= 0) && (depth >= 0); + offset = fdt_next_node(fdt, offset, &depth)) + if ((depth == 1) + && _fdt_nodename_eq(fdt, offset, name, namelen)) return offset; - } - if (offset < 0) - return offset; /* error */ - else + if (depth < 0) return -FDT_ERR_NOTFOUND; + return offset; /* error */ } int fdt_subnode_offset(const void *fdt, int parentoffset, @@ -209,7 +205,6 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, { uint32_t tag; const struct fdt_property *prop; - int namestroff; int offset, nextoffset; int err; @@ -224,38 +219,24 @@ const struct fdt_property *fdt_get_property_namelen(const void *fdt, tag = fdt_next_tag(fdt, offset, &nextoffset); switch (tag) { case FDT_END: - err = -FDT_ERR_TRUNCATED; + if (nextoffset < 0) + err = nextoffset; + else + /* FDT_END tag with unclosed nodes */ + err = -FDT_ERR_BADSTRUCTURE; goto fail; - case FDT_BEGIN_NODE: - case FDT_END_NODE: - case FDT_NOP: - break; - case FDT_PROP: - err = -FDT_ERR_BADSTRUCTURE; - prop = fdt_offset_ptr(fdt, offset, sizeof(*prop)); - if (! prop) - goto fail; - namestroff = fdt32_to_cpu(prop->nameoff); - if (_fdt_string_eq(fdt, namestroff, name, namelen)) { + prop = _fdt_offset_ptr(fdt, offset); + if (_fdt_string_eq(fdt, fdt32_to_cpu(prop->nameoff), + name, namelen)) { /* Found it! */ - int len = fdt32_to_cpu(prop->len); - prop = fdt_offset_ptr(fdt, offset, - sizeof(*prop)+len); - if (! prop) - goto fail; - if (lenp) - *lenp = len; + *lenp = fdt32_to_cpu(prop->len); return prop; } break; - - default: - err = -FDT_ERR_BADSTRUCTURE; - goto fail; } } while ((tag != FDT_BEGIN_NODE) && (tag != FDT_END_NODE)); diff --git a/libfdt/fdt_rw.c b/libfdt/fdt_rw.c index cd06178e7..5c27a677e 100644 --- a/libfdt/fdt_rw.c +++ b/libfdt/fdt_rw.c @@ -410,6 +410,8 @@ int fdt_open_into(const void *fdt, void *buf, int bufsize) struct_size = 0; while (fdt_next_tag(fdt, struct_size, &struct_size) != FDT_END) ; + if (struct_size < 0) + return struct_size; } if (!_fdt_blocks_misordered(fdt, mem_rsv_size, struct_size)) { diff --git a/libfdt/fdt_sw.c b/libfdt/fdt_sw.c index 698329e0c..55ebebf1e 100644 --- a/libfdt/fdt_sw.c +++ b/libfdt/fdt_sw.c @@ -70,7 +70,7 @@ static int _fdt_sw_check_header(void *fdt) return err; \ } -static void *_fdt_grab_space(void *fdt, int len) +static void *_fdt_grab_space(void *fdt, size_t len) { int offset = fdt_size_dt_struct(fdt); int spaceleft; @@ -82,7 +82,7 @@ static void *_fdt_grab_space(void *fdt, int len) return NULL; fdt_set_size_dt_struct(fdt, offset + len); - return fdt_offset_ptr_w(fdt, offset, len); + return _fdt_offset_ptr_w(fdt, offset); } int fdt_create(void *buf, int bufsize) @@ -237,18 +237,17 @@ int fdt_finish(void *fdt) while ((tag = fdt_next_tag(fdt, offset, &nextoffset)) != FDT_END) { if (tag == FDT_PROP) { struct fdt_property *prop = - fdt_offset_ptr_w(fdt, offset, sizeof(*prop)); + _fdt_offset_ptr_w(fdt, offset); int nameoff; - if (! prop) - return -FDT_ERR_BADSTRUCTURE; - nameoff = fdt32_to_cpu(prop->nameoff); nameoff += fdt_size_dt_strings(fdt); prop->nameoff = cpu_to_fdt32(nameoff); } offset = nextoffset; } + if (nextoffset < 0) + return nextoffset; /* Finally, adjust the header */ fdt_set_totalsize(fdt, newstroffset + fdt_size_dt_strings(fdt)); diff --git a/libfdt/fdt_wip.c b/libfdt/fdt_wip.c index e30c81d91..e373677c5 100644 --- a/libfdt/fdt_wip.c +++ b/libfdt/fdt_wip.c @@ -98,41 +98,14 @@ int fdt_nop_property(void *fdt, int nodeoffset, const char *name) return 0; } -int _fdt_node_end_offset(void *fdt, int nodeoffset) +int _fdt_node_end_offset(void *fdt, int offset) { - int level = 0; - uint32_t tag; - int offset, nextoffset; + int depth = 0; - tag = fdt_next_tag(fdt, nodeoffset, &nextoffset); - if (tag != FDT_BEGIN_NODE) - return -FDT_ERR_BADOFFSET; - do { - offset = nextoffset; - tag = fdt_next_tag(fdt, offset, &nextoffset); + while ((offset >= 0) && (depth >= 0)) + offset = fdt_next_node(fdt, offset, &depth); - switch (tag) { - case FDT_END: - return offset; - - case FDT_BEGIN_NODE: - level++; - break; - - case FDT_END_NODE: - level--; - break; - - case FDT_PROP: - case FDT_NOP: - break; - - default: - return -FDT_ERR_BADSTRUCTURE; - } - } while (level >= 0); - - return nextoffset; + return offset; } int fdt_nop_node(void *fdt, int nodeoffset) diff --git a/libfdt/libfdt_internal.h b/libfdt/libfdt_internal.h index 46eb93e4a..d2dcbd65e 100644 --- a/libfdt/libfdt_internal.h +++ b/libfdt/libfdt_internal.h @@ -62,7 +62,6 @@ return err; \ } -uint32_t _fdt_next_tag(const void *fdt, int startoffset, int *nextoffset); int _fdt_check_node_offset(const void *fdt, int offset); const char *_fdt_find_string(const char *strtab, int tabsize, const char *s); int _fdt_node_end_offset(void *fdt, int nodeoffset); |