diff options
42 files changed, 179 insertions, 127 deletions
@@ -15,6 +15,14 @@ Changes since U-Boot 1.1.4: then one bank Patch by Jens Scharsig, 28 July 2005 +* Fix Quad UART mapping on MCC200 board due to new HW revision + +* Fix JFFS2 support for legacy NAND driver. + +* Remove dependencies between DoC code and old legacy NAND driver. + +* Fix PM828_PCI target, for which PCI was *not* configured in. + * Fix Lite5200B support: initialize SDelay register See Freescale's AN3221 "MPC5200B SDRAM Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190 @@ -133,6 +133,8 @@ LIBS += disk/libdisk.a LIBS += rtc/librtc.a LIBS += dtt/libdtt.a LIBS += drivers/libdrivers.a +LIBS += drivers/nand/libnand.a +LIBS += drivers/nand_legacy/libnand_legacy.a LIBS += drivers/sk98lin/libsk98lin.a LIBS += post/libpost.a post/cpu/libcpu.a LIBS += common/libcommon.a @@ -1187,7 +1189,7 @@ PM828_config \ PM828_PCI_config \ PM828_ROMBOOT_config \ PM828_ROMBOOT_PCI_config: unconfig - @if [ -z "$(findstring _PCI_,$@)" ] ; then \ + @if [ "$(findstring _PCI_,$@)" ] ; then \ echo "#define CONFIG_PCI" >>include/config.h ; \ echo "... with PCI enabled" ; \ else \ diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk index 433429bea..35cb65584 100644 --- a/board/amcc/bamboo/config.mk +++ b/board/amcc/bamboo/config.mk @@ -32,6 +32,3 @@ endif ifeq ($(dbcr),1) PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000 endif - -# legacy nand support -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/dave/PPChameleonEVB/config.mk b/board/dave/PPChameleonEVB/config.mk index 1dc635fbf..9083aacfa 100644 --- a/board/dave/PPChameleonEVB/config.mk +++ b/board/dave/PPChameleonEVB/config.mk @@ -26,9 +26,3 @@ # Reserve 320 kB for Monitor TEXT_BASE = 0xFFFB0000 - -# Compile the new NAND code (CFG_NAND_LEGACY mustn't be defined) -BOARDLIBS = drivers/nand/libnand.a - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -#BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/delta/config.mk b/board/delta/config.mk index c72e95652..3fe406ca0 100644 --- a/board/delta/config.mk +++ b/board/delta/config.mk @@ -1,8 +1 @@ -#TEXT_BASE = 0x0 -#TEXT_BASE = 0xa1700000 -#TEXT_BASE = 0xa3080000 -#TEXT_BASE = 0x9ffe0000 TEXT_BASE = 0x83008000 - -# Compile the new NAND code (needed iff #ifdef CONFIG_NEW_NAND_CODE) -BOARDLIBS = drivers/nand/libnand.a diff --git a/board/delta/nand.c b/board/delta/nand.c index 5d2cd6585..fe648fc1f 100644 --- a/board/delta/nand.c +++ b/board/delta/nand.c @@ -23,7 +23,7 @@ #include <common.h> #if (CONFIG_COMMANDS & CFG_CMD_NAND) -#ifdef CONFIG_NEW_NAND_CODE +#if !defined(CFG_NAND_LEGACY) #include <nand.h> #include <asm/arch/pxa-regs.h> diff --git a/board/esd/ash405/config.mk b/board/esd/ash405/config.mk index 3cf5dd85b..1d743a9f8 100644 --- a/board/esd/ash405/config.mk +++ b/board/esd/ash405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/cms700/config.mk b/board/esd/cms700/config.mk index 0c56c40b9..5c3c01cf8 100644 --- a/board/esd/cms700/config.mk +++ b/board/esd/cms700/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c index cad82115c..5cd342332 100644 --- a/board/esd/common/auto_update.c +++ b/board/esd/common/auto_update.c @@ -24,8 +24,8 @@ #include <common.h> -#ifndef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support! +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) +#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support! #endif #include <command.h> @@ -74,7 +74,7 @@ extern int flash_write (char *, ulong, ulong); /* change char* to void* to shutup the compiler */ extern block_dev_desc_t *get_dev (char*, int); -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) /* references to names in cmd_nand.c */ #define NANDRW_READ 0x01 #define NANDRW_WRITE 0x00 @@ -84,7 +84,7 @@ extern struct nand_chip nand_dev_desc[]; extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len, size_t * retlen, u_char * buf); extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean); -#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */ extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE]; @@ -188,7 +188,7 @@ int au_do_update(int i, long sz) int off, rc; uint nbytes; int k; -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) int total; #endif @@ -262,7 +262,7 @@ int au_do_update(int i, long sz) debug ("flash_sect_erase(%lx, %lx);\n", start, end); flash_sect_erase(start, end); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) printf("Updating NAND FLASH with image %s\n", au_image[i].name); debug ("nand_legacy_erase(%lx, %lx);\n", start, end); rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0); @@ -290,7 +290,7 @@ int au_do_update(int i, long sz) debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes); rc = flash_write((char *)addr, start, nbytes); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes); rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2, start, nbytes, (size_t *)&total, (uchar *)addr); @@ -308,7 +308,7 @@ int au_do_update(int i, long sz) if (au_image[i].type != AU_NAND) { rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size)); } else { -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP, start, nbytes, (size_t *)&total, (uchar *)addr); rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size)); diff --git a/board/esd/cpci405/config.mk b/board/esd/cpci405/config.mk index ceff4c4d1..0be45c70d 100644 --- a/board/esd/cpci405/config.mk +++ b/board/esd/cpci405/config.mk @@ -38,6 +38,3 @@ TEXT_BASE = 0xFFFD0000 endif endif endif - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/hh405/config.mk b/board/esd/hh405/config.mk index 798a3fa41..7129ad568 100644 --- a/board/esd/hh405/config.mk +++ b/board/esd/hh405/config.mk @@ -29,6 +29,3 @@ TEXT_BASE = 0xFFF80000 #TEXT_BASE = 0xFFFC0000 #TEXT_BASE = 0x00FC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/hub405/config.mk b/board/esd/hub405/config.mk index 4c60c3566..a6d31aad2 100644 --- a/board/esd/hub405/config.mk +++ b/board/esd/hub405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/plu405/config.mk b/board/esd/plu405/config.mk index 916b28526..25b210579 100644 --- a/board/esd/plu405/config.mk +++ b/board/esd/plu405/config.mk @@ -27,6 +27,3 @@ TEXT_BASE = 0xFFFC0000 #TEXT_BASE = 0x00FC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/voh405/config.mk b/board/esd/voh405/config.mk index 72e81030a..219a4eba1 100644 --- a/board/esd/voh405/config.mk +++ b/board/esd/voh405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFF80000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/esd/wuh405/config.mk b/board/esd/wuh405/config.mk index 3cf5dd85b..1d743a9f8 100644 --- a/board/esd/wuh405/config.mk +++ b/board/esd/wuh405/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xFFFC0000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netphone/config.mk b/board/netphone/config.mk index de179c2d6..8497ebc81 100644 --- a/board/netphone/config.mk +++ b/board/netphone/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netstar/config.mk b/board/netstar/config.mk index 50d647add..8b73e9759 100644 --- a/board/netstar/config.mk +++ b/board/netstar/config.mk @@ -9,6 +9,3 @@ # XXX TEXT_BASE = 0x20012000 TEXT_BASE = 0x13FC0000 - -# Compile the new NAND code -BOARDLIBS = drivers/nand/libnand.a diff --git a/board/netta/netta.c b/board/netta/netta.c index 9194bfb9d..4923e3add 100644 --- a/board/netta/netta.c +++ b/board/netta/netta.c @@ -555,9 +555,9 @@ int board_early_init_f(void) return 0; } -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) -#include <linux/mtd/nand.h> +#include <linux/mtd/nand_legacy.h> extern ulong nand_probe(ulong physadr); extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE]; diff --git a/board/netta2/config.mk b/board/netta2/config.mk index de179c2d6..8497ebc81 100644 --- a/board/netta2/config.mk +++ b/board/netta2/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/netvia/config.mk b/board/netvia/config.mk index 583174a48..9dddaad54 100644 --- a/board/netvia/config.mk +++ b/board/netvia/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0x40000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/board/sixnet/config.mk b/board/sixnet/config.mk index 8e73d2f36..0cd8f4414 100644 --- a/board/sixnet/config.mk +++ b/board/sixnet/config.mk @@ -26,6 +26,3 @@ # TEXT_BASE = 0xF8000000 - -# Compile the legacy NAND code (CFG_NAND_LEGACY must be defined) -BOARDLIBS = drivers/nand_legacy/libnand_legacy.a diff --git a/common/cmd_doc.c b/common/cmd_doc.c index 37b7325be..ab3751695 100644 --- a/common/cmd_doc.c +++ b/common/cmd_doc.c @@ -22,11 +22,7 @@ #if (CONFIG_COMMANDS & CFG_CMD_DOC) #include <linux/mtd/nftl.h> -#include <linux/mtd/nand_legacy.h> -#include <linux/mtd/nand_ids.h> - #include <linux/mtd/doc2000.h> -#include <linux/mtd/nftl.h> #ifdef CFG_DOC_SUPPORT_2000 #define DoC_is_2000(doc) (doc->ChipID == DOC_ChipID_Doc2k) @@ -69,6 +65,32 @@ static struct DiskOnChip doc_dev_desc[CFG_MAX_DOC_DEVICE]; /* Current DOC Device */ static int curr_device = -1; +/* Supported NAND flash devices */ +static struct nand_flash_dev nand_flash_ids[] = { + {"Toshiba TC5816BDC", NAND_MFR_TOSHIBA, 0x64, 21, 1, 2, 0x1000, 0}, + {"Toshiba TC5832DC", NAND_MFR_TOSHIBA, 0x6b, 22, 0, 2, 0x2000, 0}, + {"Toshiba TH58V128DC", NAND_MFR_TOSHIBA, 0x73, 24, 0, 2, 0x4000, 0}, + {"Toshiba TC58256FT/DC", NAND_MFR_TOSHIBA, 0x75, 25, 0, 2, 0x4000, 0}, + {"Toshiba TH58512FT", NAND_MFR_TOSHIBA, 0x76, 26, 0, 3, 0x4000, 0}, + {"Toshiba TC58V32DC", NAND_MFR_TOSHIBA, 0xe5, 22, 0, 2, 0x2000, 0}, + {"Toshiba TC58V64AFT/DC", NAND_MFR_TOSHIBA, 0xe6, 23, 0, 2, 0x2000, 0}, + {"Toshiba TC58V16BDC", NAND_MFR_TOSHIBA, 0xea, 21, 1, 2, 0x1000, 0}, + {"Toshiba TH58100FT", NAND_MFR_TOSHIBA, 0x79, 27, 0, 3, 0x4000, 0}, + {"Samsung KM29N16000", NAND_MFR_SAMSUNG, 0x64, 21, 1, 2, 0x1000, 0}, + {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0x6b, 22, 0, 2, 0x2000, 0}, + {"Samsung KM29U128T", NAND_MFR_SAMSUNG, 0x73, 24, 0, 2, 0x4000, 0}, + {"Samsung KM29U256T", NAND_MFR_SAMSUNG, 0x75, 25, 0, 2, 0x4000, 0}, + {"Samsung unknown 64Mb", NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0}, + {"Samsung KM29W32000", NAND_MFR_SAMSUNG, 0xe3, 22, 0, 2, 0x2000, 0}, + {"Samsung unknown 4Mb", NAND_MFR_SAMSUNG, 0xe5, 22, 0, 2, 0x2000, 0}, + {"Samsung KM29U64000", NAND_MFR_SAMSUNG, 0xe6, 23, 0, 2, 0x2000, 0}, + {"Samsung KM29W16000", NAND_MFR_SAMSUNG, 0xea, 21, 1, 2, 0x1000, 0}, + {"Samsung K9F5616Q0C", NAND_MFR_SAMSUNG, 0x45, 25, 0, 2, 0x4000, 1}, + {"Samsung K9K1216Q0C", NAND_MFR_SAMSUNG, 0x46, 26, 0, 3, 0x4000, 1}, + {"Samsung K9F1G08U0M", NAND_MFR_SAMSUNG, 0xf1, 27, 0, 2, 0, 0}, + {NULL,} +}; + /* ------------------------------------------------------------------------- */ int do_doc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) diff --git a/drivers/nand/diskonchip.c b/drivers/nand/diskonchip.c index afaae834f..e17af70d0 100644 --- a/drivers/nand/diskonchip.c +++ b/drivers/nand/diskonchip.c @@ -21,9 +21,7 @@ #include <common.h> -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif +#if !defined(CFG_NAND_LEGACY) #include <linux/kernel.h> #include <linux/init.h> @@ -1786,3 +1784,4 @@ module_exit(cleanup_nanddoc); MODULE_LICENSE("GPL"); MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>"); MODULE_DESCRIPTION("M-Systems DiskOnChip 2000, Millennium and Millennium Plus device driver\n"); +#endif diff --git a/drivers/nand/nand.c b/drivers/nand/nand.c index dd80026fe..e1781fcbb 100644 --- a/drivers/nand/nand.c +++ b/drivers/nand/nand.c @@ -23,11 +23,7 @@ #include <common.h> -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include <nand.h> diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c index e0b406041..b7a5d32fb 100644 --- a/drivers/nand/nand_base.c +++ b/drivers/nand/nand_base.c @@ -72,11 +72,7 @@ #include <common.h> -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include <malloc.h> #include <watchdog.h> diff --git a/drivers/nand/nand_bbt.c b/drivers/nand/nand_bbt.c index ac168723e..aaa9400e5 100644 --- a/drivers/nand/nand_bbt.c +++ b/drivers/nand/nand_bbt.c @@ -54,11 +54,7 @@ #include <common.h> -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include <malloc.h> #include <linux/mtd/compat.h> diff --git a/drivers/nand/nand_ecc.c b/drivers/nand/nand_ecc.c index e0d0e8bcc..f33be9655 100644 --- a/drivers/nand/nand_ecc.c +++ b/drivers/nand/nand_ecc.c @@ -37,11 +37,7 @@ #include <common.h> -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include<linux/mtd/mtd.h> /* diff --git a/drivers/nand/nand_ids.c b/drivers/nand/nand_ids.c index 3d4d372f1..8b58736bc 100644 --- a/drivers/nand/nand_ids.c +++ b/drivers/nand/nand_ids.c @@ -13,11 +13,7 @@ #include <common.h> -#ifdef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY defined in a file not using the legacy NAND support! -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) #include <linux/mtd/nand.h> diff --git a/drivers/nand_legacy/nand_legacy.c b/drivers/nand_legacy/nand_legacy.c index 3989ca2a2..458046d41 100644 --- a/drivers/nand_legacy/nand_legacy.c +++ b/drivers/nand_legacy/nand_legacy.c @@ -10,11 +10,6 @@ */ #include <common.h> - -#ifndef CFG_NAND_LEGACY -#error CFG_NAND_LEGACY not defined in a file using the legacy NAND support! -#endif - #include <command.h> #include <malloc.h> #include <asm/io.h> @@ -27,7 +22,7 @@ # define SHOW_BOOT_PROGRESS(arg) #endif -#if (CONFIG_COMMANDS & CFG_CMD_NAND) +#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) #include <linux/mtd/nand_legacy.h> #include <linux/mtd/nand_ids.h> @@ -1612,4 +1607,13 @@ static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc) #endif -#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */ +#ifdef CONFIG_JFFS2_NAND +int read_jffs2_nand(size_t start, size_t len, + size_t * retlen, u_char * buf, int nanddev) +{ + return nand_legacy_rw(nand_dev_desc + nanddev, NANDRW_READ | NANDRW_JFFS2, + start, len, retlen, buf); +} +#endif /* CONFIG_JFFS2_NAND */ + +#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */ diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index 49c86524c..41ff4c1fb 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -144,7 +144,11 @@ static struct part_info *current_part; #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) +#if defined(CFG_NAND_LEGACY) +#include <linux/mtd/nand_legacy.h> +#else #include <nand.h> +#endif /* * Support for jffs2 on top of NAND-flash * @@ -155,8 +159,14 @@ static struct part_info *current_part; * */ +#if defined(CFG_NAND_LEGACY) +/* this one defined in nand_legacy.c */ +int read_jffs2_nand(size_t start, size_t len, + size_t * retlen, u_char * buf, int nanddev); +#else /* info for NAND chips, defined in drivers/nand/nand.c */ extern nand_info_t nand_info[]; +#endif #define NAND_PAGE_SIZE 512 #define NAND_PAGE_SHIFT 9 @@ -167,7 +177,6 @@ extern nand_info_t nand_info[]; #endif #define NAND_CACHE_SIZE (NAND_CACHE_PAGES*NAND_PAGE_SIZE) -#ifdef CFG_NAND_LEGACY static u8* nand_cache = NULL; static u32 nand_cache_off = (u32)-1; @@ -175,7 +184,11 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) { struct mtdids *id = current_part->dev->id; u32 bytes_read = 0; +#if defined(CFG_NAND_LEGACY) + size_t retlen; +#else ulong retlen; +#endif int cpy_bytes; while (bytes_read < size) { @@ -193,14 +206,24 @@ static int read_nand_cached(u32 off, u32 size, u_char *buf) } } +#if defined(CFG_NAND_LEGACY) + if (read_jffs2_nand(nand_cache_off, NAND_CACHE_SIZE, + &retlen, nand_cache, id->num) < 0 || + retlen != NAND_CACHE_SIZE) { + printf("read_nand_cached: error reading nand off %#x size %d bytes\n", + nand_cache_off, NAND_CACHE_SIZE); + return -1; + } +#else retlen = NAND_CACHE_SIZE; if (nand_read(&nand_info[id->num], nand_cache_off, - &retlen, nand_cache) != 0 || + &retlen, nand_cache) != 0 || retlen != NAND_CACHE_SIZE) { printf("read_nand_cached: error reading nand off %#x size %d bytes\n", nand_cache_off, NAND_CACHE_SIZE); return -1; } +#endif } cpy_bytes = nand_cache_off + NAND_CACHE_SIZE - (off + bytes_read); if (cpy_bytes > size - bytes_read) @@ -251,7 +274,6 @@ static void put_fl_mem_nand(void *buf) { free(buf); } -#endif /* CFG_NAND_LEGACY */ #endif /* #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) */ @@ -294,7 +316,7 @@ static inline void *get_fl_mem(u32 off, u32 size, void *ext_buf) return get_fl_mem_nor(off); #endif -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) if (id->type == MTD_DEV_TYPE_NAND) return get_fl_mem_nand(off, size, ext_buf); #endif @@ -312,7 +334,7 @@ static inline void *get_node_mem(u32 off) return get_node_mem_nor(off); #endif -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) if (id->type == MTD_DEV_TYPE_NAND) return get_node_mem_nand(off); #endif @@ -323,7 +345,7 @@ static inline void *get_node_mem(u32 off) static inline void put_fl_mem(void *buf) { -#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) +#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) struct mtdids *id = current_part->dev->id; if (id->type == MTD_DEV_TYPE_NAND) diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h index ffe89cb78..7ec4599eb 100644 --- a/include/configs/CATcenter.h +++ b/include/configs/CATcenter.h @@ -193,6 +193,8 @@ */ #define CFG_NAND0_BASE 0xFF400000 #define CFG_NAND1_BASE 0xFF000000 +#define CFG_NAND_BASE_LIST { CFG_NAND0_BASE } +#define NAND_BIG_DELAY_US 25 /* For CATcenter there is only NAND on the module */ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ @@ -218,9 +220,9 @@ #define CFG_NAND1_RDY (0x80000000 >> 31) /* our RDY is GPIO31 */ -#define NAND_DISABLE_CE(nand) do \ +#define MACRO_NAND_DISABLE_CE(nandptr) do \ { \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ + switch((unsigned long)nandptr) \ { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CE); \ @@ -231,9 +233,9 @@ } \ } while(0) -#define NAND_ENABLE_CE(nand) do \ +#define MACRO_NAND_ENABLE_CE(nandptr) do \ { \ - switch((unsigned long)(((struct nand_chip *)nand)->IO_ADDR)) \ + switch((unsigned long)nandptr) \ { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND0_CE); \ @@ -244,8 +246,7 @@ } \ } while(0) - -#define NAND_CTL_CLRALE(nandptr) do \ +#define MACRO_NAND_CTL_CLRALE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -258,7 +259,7 @@ } \ } while(0) -#define NAND_CTL_SETALE(nandptr) do \ +#define MACRO_NAND_CTL_SETALE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -271,7 +272,7 @@ } \ } while(0) -#define NAND_CTL_CLRCLE(nandptr) do \ +#define MACRO_NAND_CTL_CLRCLE(nandptr) do \ { \ switch((unsigned long)nandptr) \ { \ @@ -284,7 +285,7 @@ } \ } while(0) -#define NAND_CTL_SETCLE(nandptr) do { \ +#define MACRO_NAND_CTL_SETCLE(nandptr) do { \ switch((unsigned long)nandptr) { \ case CFG_NAND0_BASE: \ out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND0_CLE); \ diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 1e9a99eed..16a9ea5dd 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -178,8 +178,6 @@ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> -#define CFG_NAND_LEGACY - /* * Miscellaneous configurable options */ diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h index aaa44c539..29eb874db 100644 --- a/include/configs/IDS8247.h +++ b/include/configs/IDS8247.h @@ -236,6 +236,7 @@ */ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#define CFG_NAND_LEGACY #define CFG_NAND0_BASE 0xE1000000 #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/NC650.h b/include/configs/NC650.h index 371ea17ed..3c59df4f4 100644 --- a/include/configs/NC650.h +++ b/include/configs/NC650.h @@ -217,6 +217,8 @@ /* * NAND flash support */ +#define CFG_NAND_LEGACY + #define CFG_MAX_NAND_DEVICE 1 #define NAND_ChipID_UNKNOWN 0x00 #define SECTORSIZE 512 diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h index 1bcd88d20..25b63457c 100644 --- a/include/configs/NETTA.h +++ b/include/configs/NETTA.h @@ -609,6 +609,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_VERIFY_WRITE #define CONFIG_MTD_NAND_UNSAFE diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h index 21945a343..242c837a3 100644 --- a/include/configs/RBC823.h +++ b/include/configs/RBC823.h @@ -326,8 +326,6 @@ /************************************************************ * Disk-On-Chip configuration ************************************************************/ -#define CFG_NAND_LEGACY - #define CFG_MAX_DOC_DEVICE 1 /* Max number of DOC devices */ #define CFG_DOC_SHORT_TIMEOUT #define CFG_DOC_SUPPORT_2000 diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h index 3f29190e4..5f48a7093 100644 --- a/include/configs/VCMA9.h +++ b/include/configs/VCMA9.h @@ -248,6 +248,7 @@ */ #if (CONFIG_COMMANDS & CFG_CMD_NAND) +#define CFG_NAND_LEGACY #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ #define SECTORSIZE 512 diff --git a/include/configs/delta.h b/include/configs/delta.h index 5edea95a4..e4c8ccab1 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -178,7 +178,8 @@ * NAND Flash */ /* Use the new NAND code. (BOARDLIBS = drivers/nand/libnand.a required) */ -#define CONFIG_NEW_NAND_CODE +#undef CFG_NAND_LEGACY + #define CFG_NAND0_BASE 0x0 /* 0x43100040 */ /* 0x10000000 */ #undef CFG_NAND1_BASE diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h index 67c248367..2b1c0d00c 100644 --- a/include/configs/mcc200.h +++ b/include/configs/mcc200.h @@ -250,7 +250,7 @@ /* Quad UART @0x80000000 (MBAR is relocated to 0xF0000000) */ #define CFG_CS2_START 0x80000000 #define CFG_CS2_SIZE 0x00001000 -#define CFG_CS2_CFG 0x1d800 +#define CFG_CS2_CFG 0x1d300 #define CFG_CS_BURST 0x00000000 #define CFG_CS_DEADCYCLE 0x33333333 diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h index 12252ac12..58374616a 100644 --- a/include/configs/omap2420h4.h +++ b/include/configs/omap2420h4.h @@ -132,6 +132,7 @@ /* * Board NAND Info. */ +#define CFG_NAND_LEGACY #define CFG_NAND_ADDR 0x04000000 /* physical address to access nand at CS0*/ #define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h index be6c36cac..614a04610 100644 --- a/include/configs/stxxtc.h +++ b/include/configs/stxxtc.h @@ -436,6 +436,7 @@ /****************************************************************/ /* NAND */ +#define CFG_NAND_LEGACY #define CFG_NAND_BASE NAND_BASE #define CONFIG_MTD_NAND_ECC_JFFS2 #define CONFIG_MTD_NAND_VERIFY_WRITE diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h index ebf9a7692..eeb1d7e98 100644 --- a/include/linux/mtd/doc2000.h +++ b/include/linux/mtd/doc2000.h @@ -91,6 +91,13 @@ struct DiskOnChip; #define ADDR_PAGE 2 #define ADDR_COLUMN_PAGE 3 +struct Nand { + char floor, chip; + unsigned long curadr; + unsigned char curmode; + /* Also some erase/write/pipeline info when we get that far */ +}; + struct DiskOnChip { unsigned long physadr; unsigned long virtadr; @@ -148,4 +155,62 @@ void doc_probe(unsigned long physadr); void doc_print(struct DiskOnChip*); +/* + * Standard NAND flash commands + */ +#define NAND_CMD_READ0 0 +#define NAND_CMD_READ1 1 +#define NAND_CMD_PAGEPROG 0x10 +#define NAND_CMD_READOOB 0x50 +#define NAND_CMD_ERASE1 0x60 +#define NAND_CMD_STATUS 0x70 +#define NAND_CMD_SEQIN 0x80 +#define NAND_CMD_READID 0x90 +#define NAND_CMD_ERASE2 0xd0 +#define NAND_CMD_RESET 0xff + +/* + * NAND Flash Manufacturer ID Codes + */ +#define NAND_MFR_TOSHIBA 0x98 +#define NAND_MFR_SAMSUNG 0xec + +/* + * NAND Flash Device ID Structure + * + * Structure overview: + * + * name - Complete name of device + * + * manufacture_id - manufacturer ID code of device. + * + * model_id - model ID code of device. + * + * chipshift - total number of address bits for the device which + * is used to calculate address offsets and the total + * number of bytes the device is capable of. + * + * page256 - denotes if flash device has 256 byte pages or not. + * + * pageadrlen - number of bytes minus one needed to hold the + * complete address into the flash array. Keep in + * mind that when a read or write is done to a + * specific address, the address is input serially + * 8 bits at a time. This structure member is used + * by the read/write routines as a loop index for + * shifting the address out 8 bits at a time. + * + * erasesize - size of an erase block in the flash device. + */ +struct nand_flash_dev { + char * name; + int manufacture_id; + int model_id; + int chipshift; + char page256; + char pageadrlen; + unsigned long erasesize; + int bus16; +}; + #endif /* __MTD_DOC2000_H__ */ |