diff options
| -rw-r--r-- | board/tqc/tqm85xx/law.c | 9 | ||||
| -rw-r--r-- | board/tqc/tqm85xx/tqm85xx.c | 41 |
2 files changed, 13 insertions, 37 deletions
diff --git a/board/tqc/tqm85xx/law.c b/board/tqc/tqm85xx/law.c index e684ba2c2..c596303c5 100644 --- a/board/tqc/tqm85xx/law.c +++ b/board/tqc/tqm85xx/law.c @@ -67,20 +67,13 @@ struct law_entry law_table[] = { SET_LAW(CONFIG_SYS_DDR_SDRAM_BASE, LAW_SIZE_2G, LAW_TRGT_IF_DDR), - SET_LAW(CONFIG_SYS_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI), SET_LAW(CONFIG_SYS_LBC_FLASH_BASE, LAW_3_SIZE, LAW_TRGT_IF_LBC), - SET_LAW(CONFIG_SYS_PCI1_IO_PHYS, LAW_SIZE_16M, LAW_TRGT_IF_PCI), -#ifdef CONFIG_PCIE1 - SET_LAW(CONFIG_SYS_PCIE1_MEM_BUS, LAW_5_SIZE, LAW_TRGT_IF_PCIE_1), -#else /* !CONFIG_PCIE1 */ +#ifndef CONFIG_PCIE1 SET_LAW(CONFIG_SYS_RIO_MEM_BASE, LAW_5_SIZE, LAW_TRGT_IF_RIO), #endif /* CONFIG_PCIE1 */ #if defined(CONFIG_CAN_DRIVER) || defined(CONFIG_NAND) SET_LAW(CONFIG_SYS_CAN_BASE, LAW_SIZE_16M, LAW_TRGT_IF_LBC), #endif /* CONFIG_CAN_DRIVER || CONFIG_NAND */ -#ifdef CONFIG_PCIE1 - SET_LAW(CONFIG_SYS_PCIE1_IO_BUS, LAW_SIZE_16M, LAW_TRGT_IF_PCIE_1), -#endif /* CONFIG_PCIE */ }; int num_law_entries = ARRAY_SIZE (law_table); diff --git a/board/tqc/tqm85xx/tqm85xx.c b/board/tqc/tqm85xx/tqm85xx.c index 43c73e19e..99b13311c 100644 --- a/board/tqc/tqm85xx/tqm85xx.c +++ b/board/tqc/tqm85xx/tqm85xx.c @@ -541,31 +541,29 @@ void local_bus_init (void) static struct pci_controller pci1_hose; #endif /* CONFIG_PCI1 */ -#ifdef CONFIG_PCIE1 -static struct pci_controller pcie1_hose; -#endif /* CONFIG_PCIE1 */ - void pci_init_board (void) { - struct fsl_pci_info pci_info[2]; + volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); int first_free_busno = 0; - int num = 0; +#ifdef CONFIG_PCI1 + struct fsl_pci_info pci_info; int pcie_ep; - __maybe_unused int pcie_configured; - volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR); u32 devdisr = in_be32(&gur->devdisr); - u32 pordevsr = in_be32(&gur->pordevsr); -#ifdef CONFIG_PCI1 uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32; uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB; uint pci_speed = CONFIG_SYS_CLK_FREQ; /* PCI PSPEED in [4:5] */ uint pci_clk_sel = in_be32(&gur->porpllsr) & MPC85xx_PORDEVSR_PCI1_SPD; if (!(devdisr & MPC85xx_DEVDISR_PCI1)) { - SET_STD_PCI_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pci1_hose, pci_info[num].regs); + SET_STD_PCI_INFO(pci_info, 1); + set_next_law(pci_info.mem_phys, + law_size_bits(pci_info.mem_size), pci_info.law); + set_next_law(pci_info.io_phys, + law_size_bits(pci_info.io_size), pci_info.law); + + pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs); printf("PCI1: %d bit, %s MHz, %s, %s, %s\n", (pci_32) ? 32 : 64, (pci_speed == 33333333) ? "33" : @@ -573,7 +571,7 @@ void pci_init_board (void) pci_clk_sel ? "sync" : "async", pcie_ep ? "agent" : "host", pci_arb ? "arbiter" : "external-arbiter"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], + first_free_busno = fsl_pci_init_port(&pci_info, &pci1_hose, first_free_busno); #ifdef CONFIG_PCIX_CHECK if (!(in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1)) { @@ -596,22 +594,7 @@ void pci_init_board (void) setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1); #endif -#ifdef CONFIG_PCIE1 - pcie_configured = is_serdes_configured(PCIE1); - - if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)) { - SET_STD_PCIE_INFO(pci_info[num], 1); - pcie_ep = fsl_setup_hose(&pcie1_hose, pci_info[num].regs); - printf("PCIE1: connected as %s\n", - pcie_ep ? "Endpoint" : "Root Complex"); - first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno); - } else { - printf("PCIE1: disabled\n"); - } -#else - setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCIE); -#endif /* CONFIG_PCIE1 */ + fsl_pcie_init_board(first_free_busno); } #ifdef CONFIG_OF_BOARD_SETUP |