diff options
| -rw-r--r-- | arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c | 52 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/dm365_lowlevel.h | 1 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 9 | ||||
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/timer_defs.h | 3 | 
4 files changed, 61 insertions, 4 deletions
| diff --git a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c b/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c index 6e998ded9..c9936fd0d 100644 --- a/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c +++ b/arch/arm/cpu/arm926ejs/davinci/dm365_lowlevel.c @@ -254,7 +254,7 @@ int dm365_ddr_setup(void)  	return 0;  } -void dm365_vpss_sync_reset(void) +static void dm365_vpss_sync_reset(void)  {  	unsigned int PdNum = 0; @@ -276,11 +276,52 @@ void dm365_vpss_sync_reset(void)  		;  } -void dm365_por_reset(void) +static void dm365_por_reset(void)  { +	struct davinci_timer *wdog = +		(struct davinci_timer *)DAVINCI_WDOG_BASE; +  	if (readl(&dv_pll0_regs->rstype) & -		(PLL_RSTYPE_POR | PLL_RSTYPE_XWRST)) +		(PLL_RSTYPE_POR | PLL_RSTYPE_XWRST)) { +		dm365_vpss_sync_reset(); + +		writel(DV_TMPBUF_VAL, TMPBUF); +		setbits_le32(TMPSTATUS, FLAG_PORRST); +		writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1); +		writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2); + +		while (1); +	} +} + +static void dm365_wdt_reset(void) +{ +	struct davinci_timer *wdog = +		(struct davinci_timer *)DAVINCI_WDOG_BASE; + +	if (readl(TMPBUF) != DV_TMPBUF_VAL) { +		writel(DV_TMPBUF_VAL, TMPBUF); +		setbits_le32(TMPSTATUS, FLAG_PORRST); +		setbits_le32(TMPSTATUS, FLAG_FLGOFF); + +		dm365_waitloop(100); +  		dm365_vpss_sync_reset(); + +		writel(DV_WDT_ENABLE_SYS_RESET, &wdog->na1); +		writel(DV_WDT_TRIGGER_SYS_RESET, &wdog->na2); + +		while (1); +	} +} + +static void dm365_wdt_flag_on(void) +{ +	/* VPSS_CLKMD 1:2 */ +	clrbits_le32(&dv_sys_module_regs->vpss_clkctl, +		VPSS_CLK_CTL_VPSS_CLKMD); +	writel(0, TMPBUF); +	setbits_le32(TMPSTATUS, FLAG_FLGON);  }  void dm365_psc_init(void) @@ -382,6 +423,9 @@ void dm36x_lowlevel_init(ulong bootflag)  	writel(0xffffffff, &dv_aintc_regs->irq0);  	writel(0xffffffff, &dv_aintc_regs->irq1); +	dm365_por_reset(); +	dm365_wdt_reset(); +  	/* System PSC setup - enable all */  	dm365_psc_init(); @@ -418,6 +462,8 @@ void dm36x_lowlevel_init(ulong bootflag)  	puts("emif init\n");  	dm365_emif_init(); +	dm365_wdt_flag_on(); +  #if defined(CONFIG_POST)  	/*  	 * Do memory tests, calls arch_memory_failure_handle() diff --git a/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h b/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h index 4986e8298..c70930d8d 100644 --- a/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h +++ b/arch/arm/include/asm/arch-davinci/dm365_lowlevel.h @@ -32,7 +32,6 @@ void dm365_waitloop(unsigned long loopcnt);  int dm365_pll1_init(unsigned long pllmult, unsigned long prediv);  int dm365_pll2_init(unsigned long pllm, unsigned long prediv);  int dm365_ddr_setup(void); -void dm365_por_reset(void);  void dm365_psc_init(void);  void dm365_pinmux_ctl(unsigned long offset, unsigned long mask,  	unsigned long value); diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index 1c71540e4..b145c6e7f 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -587,6 +587,15 @@ static inline int get_async3_src(void)  #include <asm/arch/psc_defs.h>  #include <asm/arch/syscfg_defs.h>  #include <asm/arch/timer_defs.h> + +#define TMPBUF			0x00017ff8 +#define TMPSTATUS		0x00017ff0 +#define DV_TMPBUF_VAL		0x591b3ed7 +#define FLAG_PORRST		0x00000001 +#define FLAG_WDTRST		0x00000002 +#define FLAG_FLGON		0x00000004 +#define FLAG_FLGOFF		0x00000010 +  #endif  struct davinci_rtc { diff --git a/arch/arm/include/asm/arch-davinci/timer_defs.h b/arch/arm/include/asm/arch-davinci/timer_defs.h index 53c961e8d..49b9e2495 100644 --- a/arch/arm/include/asm/arch-davinci/timer_defs.h +++ b/arch/arm/include/asm/arch-davinci/timer_defs.h @@ -37,6 +37,9 @@ struct davinci_timer {  	u_int32_t	wdtcr;  }; +#define DV_WDT_ENABLE_SYS_RESET		0x00020000 +#define DV_WDT_TRIGGER_SYS_RESET	0x00020002 +  #ifdef CONFIG_HW_WATCHDOG  void davinci_hw_watchdog_enable(void);  void davinci_hw_watchdog_reset(void); |