diff options
| -rw-r--r-- | drivers/qe/uec_phy.c | 16 | ||||
| -rw-r--r-- | drivers/qe/uec_phy.h | 12 |
2 files changed, 9 insertions, 19 deletions
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c index 465a49713..55c262294 100644 --- a/drivers/qe/uec_phy.c +++ b/drivers/qe/uec_phy.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005,2010 Freescale Semiconductor, Inc. + * Copyright (C) 2005,2010-2011 Freescale Semiconductor, Inc. * * Author: Shlomi Gridish * @@ -313,14 +313,14 @@ static int gbit_config_aneg (struct uec_mii_info *mii_info) config_genmii_advert (mii_info); advertise = mii_info->advertising; - adv = phy_read (mii_info, MII_1000BASETCONTROL); - adv &= ~(MII_1000BASETCONTROL_FULLDUPLEXCAP | - MII_1000BASETCONTROL_HALFDUPLEXCAP); + adv = phy_read (mii_info, MII_CTRL1000); + adv &= ~(ADVERTISE_1000FULL | + ADVERTISE_1000HALF); if (advertise & SUPPORTED_1000baseT_Half) - adv |= MII_1000BASETCONTROL_HALFDUPLEXCAP; + adv |= ADVERTISE_1000HALF; if (advertise & SUPPORTED_1000baseT_Full) - adv |= MII_1000BASETCONTROL_FULLDUPLEXCAP; - phy_write (mii_info, MII_1000BASETCONTROL, adv); + adv |= ADVERTISE_1000FULL; + phy_write (mii_info, MII_CTRL1000, adv); /* Start/Restart aneg */ genmii_restart_aneg (mii_info); @@ -420,7 +420,7 @@ static int genmii_read_status (struct uec_mii_info *mii_info) return err; if (mii_info->autoneg) { - status = phy_read(mii_info, MII_1000BASETSTATUS); + status = phy_read(mii_info, MII_STAT1000); if (status & (LPA_1000FULL | LPA_1000HALF)) { mii_info->speed = SPEED_1000; diff --git a/drivers/qe/uec_phy.h b/drivers/qe/uec_phy.h index 929d9bdd7..f924b2a14 100644 --- a/drivers/qe/uec_phy.h +++ b/drivers/qe/uec_phy.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2005 Freescale Semiconductor, Inc. + * Copyright (C) 2005, 2011 Freescale Semiconductor, Inc. * * Author: Shlomi Gridish <gridish@freescale.com> * @@ -24,16 +24,6 @@ #define UGETH_AN_TIMEOUT 2000 -/* 1000BT control (Marvell & BCM54xx at least) */ -#define MII_1000BASETCONTROL 0x09 -#define MII_1000BASETCONTROL_FULLDUPLEXCAP 0x0200 -#define MII_1000BASETCONTROL_HALFDUPLEXCAP 0x0100 - -/* 1000BT status */ -#define MII_1000BASETSTATUS 0x0a -#define LPA_1000FULL 0x0400 -#define LPA_1000HALF 0x0200 - /* Cicada Extended Control Register 1 */ #define MII_CIS8201_EXT_CON1 0x17 #define MII_CIS8201_EXTCON1_INIT 0x0000 |