diff options
| -rw-r--r-- | arch/powerpc/cpu/mpc8220/speed.c | 12 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/global_data.h | 13 | ||||
| -rw-r--r-- | arch/powerpc/lib/board.c | 14 |
3 files changed, 20 insertions, 19 deletions
diff --git a/arch/powerpc/cpu/mpc8220/speed.c b/arch/powerpc/cpu/mpc8220/speed.c index 62ac845b7..bb72e5ce1 100644 --- a/arch/powerpc/cpu/mpc8220/speed.c +++ b/arch/powerpc/cpu/mpc8220/speed.c @@ -71,7 +71,7 @@ int get_clocks (void) #error clock measuring not implemented yet - define CONFIG_SYS_MPC8220_CLKIN #endif - gd->inp_clk = CONFIG_SYS_MPC8220_CLKIN; + gd->arch.inp_clk = CONFIG_SYS_MPC8220_CLKIN; /* Read XLB to PCI(INP) clock multiplier */ pci2bus = (*((volatile u32 *)PCI_REG_PCIGSCR) & @@ -85,7 +85,7 @@ int get_clocks (void) /* FlexBus is temporary set as the same as input clock */ /* will do dynamic in the future */ - gd->flb_clk = CONFIG_SYS_MPC8220_CLKIN; + gd->arch.flb_clk = CONFIG_SYS_MPC8220_CLKIN; /* CPU Clock - Read HID1 */ asm volatile ("mfspr %0, 1009":"=r" (hid1):); @@ -97,12 +97,14 @@ int get_clocks (void) for (i = 0; i < size; i++) if (hid1 == bus2core[i].hid1) { gd->cpu_clk = (bus2core[i].multi * gd->bus_clk) >> 1; - gd->vco_clk = CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER * (gd->pci_clk * bus2core[i].vco_div)/2; + gd->arch.vco_clk = + CONFIG_SYS_MPC8220_SYSPLL_VCO_MULTIPLIER * + (gd->pci_clk * bus2core[i].vco_div) / 2; break; } /* hardcoded 81MHz for now */ - gd->pev_clk = 81000000; + gd->arch.pev_clk = 81000000; return (0); } @@ -115,7 +117,7 @@ int prt_mpc8220_clks (void) strmhz(buf1, gd->bus_clk), strmhz(buf2, gd->cpu_clk), strmhz(buf3, gd->pci_clk), - strmhz(buf4, gd->vco_clk) + strmhz(buf4, gd->arch.vco_clk) ); return (0); } diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index fa5c50465..656117b0d 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -101,6 +101,12 @@ struct arch_global_data { u32 ips_clk; u32 csb_clk; #endif /* CONFIG_MPC512X */ +#if defined(CONFIG_MPC8220) + unsigned long inp_clk; + unsigned long vco_clk; + unsigned long pev_clk; + unsigned long flb_clk; +#endif }; /* @@ -123,13 +129,6 @@ typedef struct global_data { #if defined(CONFIG_FSL_ESDHC) u32 sdhc_clk; #endif -#if defined(CONFIG_MPC8220) - unsigned long bExtUart; - unsigned long inp_clk; - unsigned long vco_clk; - unsigned long pev_clk; - unsigned long flb_clk; -#endif phys_size_t ram_size; /* RAM size */ unsigned long reset_status; /* reset status register at boot */ #if defined(CONFIG_MPC83xx) diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 31904686b..12270a453 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -556,11 +556,11 @@ void board_init_f(ulong bootflag) #endif #if defined(CONFIG_MPC8220) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ - bd->bi_inpfreq = gd->inp_clk; + bd->bi_inpfreq = gd->arch.inp_clk; bd->bi_pcifreq = gd->pci_clk; - bd->bi_vcofreq = gd->vco_clk; - bd->bi_pevfreq = gd->pev_clk; - bd->bi_flbfreq = gd->flb_clk; + bd->bi_vcofreq = gd->arch.vco_clk; + bd->bi_pevfreq = gd->arch.pev_clk; + bd->bi_flbfreq = gd->arch.flb_clk; /* store bootparam to sram (backward compatible), here? */ { @@ -568,10 +568,10 @@ void board_init_f(ulong bootflag) *sram++ = gd->ram_size; *sram++ = gd->bus_clk; - *sram++ = gd->inp_clk; + *sram++ = gd->arch.inp_clk; *sram++ = gd->cpu_clk; - *sram++ = gd->vco_clk; - *sram++ = gd->flb_clk; + *sram++ = gd->arch.vco_clk; + *sram++ = gd->arch.flb_clk; *sram++ = 0xb8c3ba11; /* boot signature */ } #endif |