diff options
35 files changed, 358 insertions, 233 deletions
diff --git a/board/espt/lowlevel_init.S b/board/espt/lowlevel_init.S index 7d5d72e12..7f0686c53 100644 --- a/board/espt/lowlevel_init.S +++ b/board/espt/lowlevel_init.S @@ -72,15 +72,7 @@ lowlevel_init: /* set DDR-SDRAM dummy read */ write32 MMSEL_A, MMSEL_D - mov.l MMSEL_A, r0 - synco - mov.l @r0, r1 - synco - - mov.l CS0_A, r0 - synco - mov.l @r0, r1 - synco + write32 MMSEL_A, CS0_A /* set DDR-SDRAM bus/endian etc */ write32 MIM_U_A, MIM_U_D diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index 2b3223453..933dd127e 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -199,7 +199,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie3_hose, first_free_busno, pcie_ep); + &pcie3_hose, first_free_busno); /* * Activate ULI1575 legacy chip by performing a fake * memory access. Needed to make ULI RTC work. @@ -231,7 +231,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie2_hose, first_free_busno, pcie_ep); + &pcie2_hose, first_free_busno); } else { printf (" PCIE2: disabled\n"); } @@ -251,7 +251,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno, pcie_ep); + &pcie1_hose, first_free_busno); } else { printf (" PCIE1: disabled\n"); } diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 358148faf..f42c31672 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -127,11 +127,6 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_SYS_RAMBOOT) - puts(" DDR: "); - return dram_size; -#endif - puts(" DDR: "); return dram_size; } diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c index 1a08afa69..c521527d8 100644 --- a/board/freescale/mpc8641hpcn/mpc8641hpcn.c +++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c @@ -74,11 +74,6 @@ initdram(int board_type) dram_size = fixed_sdram(); #endif -#if defined(CONFIG_SYS_RAMBOOT) - puts(" DDR: "); - return dram_size; -#endif - puts(" DDR: "); return dram_size; } diff --git a/board/freescale/p1_p2_rdb/pci.c b/board/freescale/p1_p2_rdb/pci.c index 773659673..4c08f9efa 100644 --- a/board/freescale/p1_p2_rdb/pci.c +++ b/board/freescale/p1_p2_rdb/pci.c @@ -71,7 +71,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie2_hose, first_free_busno, pcie_ep); + &pcie2_hose, first_free_busno); } else { printf (" PCIE2: disabled\n"); } @@ -90,7 +90,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno, pcie_ep); + &pcie1_hose, first_free_busno); } else { printf (" PCIE1: disabled\n"); } diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c index 9878fba10..e38c0145e 100644 --- a/board/freescale/p2020ds/p2020ds.c +++ b/board/freescale/p2020ds/p2020ds.c @@ -227,7 +227,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie2_hose, first_free_busno, pcie_ep); + &pcie2_hose, first_free_busno); /* * The workaround doesn't work on p2020 because the location @@ -267,7 +267,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie3_hose, first_free_busno, pcie_ep); + &pcie3_hose, first_free_busno); } else { printf(" PCIE3: disabled\n"); } @@ -286,7 +286,7 @@ void pci_init_board(void) pcie_ep ? "End Point" : "Root Complex", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno, pcie_ep); + &pcie1_hose, first_free_busno); } else { printf(" PCIE1: disabled\n"); } diff --git a/board/renesas/sh7785lcr/lowlevel_init.S b/board/renesas/sh7785lcr/lowlevel_init.S index 7faad95ff..40d9b08c7 100644 --- a/board/renesas/sh7785lcr/lowlevel_init.S +++ b/board/renesas/sh7785lcr/lowlevel_init.S @@ -178,60 +178,6 @@ lbsc_end: .align 4 -/*------- LBSC -------*/ -MMSELR_A: .long 0xfc400020 -#if defined(CONFIG_SH_32BIT) -MMSELR_D: .long 0xa5a50005 -#else -MMSELR_D: .long 0xa5a50002 -#endif - -/*------- DBSC2 -------*/ -#define DBSC2_BASE 0xfe800000 -DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c -DBSC2_DBEN_A: .long DBSC2_BASE + 0x10 -DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14 -DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20 -DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30 -DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34 -DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38 -DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40 -DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44 -DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48 -DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c -DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50 -DBSC2_DBDICODTOCD_A: .long DBSC2_BASE + 0x54 -DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60 -DDR_DUMMY_ACCESS_A: .long 0x40000000 - -DBSC2_DBCONF_D: .long 0x00630002 -DBSC2_DBTR0_D: .long 0x050b1f04 -DBSC2_DBTR1_D: .long 0x00040204 -DBSC2_DBTR2_D: .long 0x02100308 -DBSC2_DBFREQ_D1: .long 0x00000000 -DBSC2_DBFREQ_D2: .long 0x00000100 -DBSC2_DBDICODTOCD_D: .long 0x000f0907 - -DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003 -DBSC2_DBCMDCNT_D_PALL: .long 0x00000002 -DBSC2_DBCMDCNT_D_REF: .long 0x00000004 - -DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000 -DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000 -DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006 -DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386 -DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952 -DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852 - -DBSC2_DBEN_D: .long 0x00000001 - -DBSC2_DBPDCNT0_D3: .long 0x00000080 -DBSC2_DBRFCNT1_D: .long 0x00000926 -DBSC2_DBRFCNT2_D: .long 0x00fe00fe -DBSC2_DBRFCNT0_D: .long 0x00010000 - -WAIT_200US: .long 33333 - /*------- GPIO -------*/ PACR_D: .long 0x0000 PBCR_D: .long 0x0000 @@ -291,6 +237,59 @@ PPUPR2_A: .long GPIO_BASE + 0x62 P1MSELR_A: .long GPIO_BASE + 0x80 P2MSELR_A: .long GPIO_BASE + 0x82 +MMSELR_A: .long 0xfc400020 +#if defined(CONFIG_SH_32BIT) +MMSELR_D: .long 0xa5a50005 +#else +MMSELR_D: .long 0xa5a50002 +#endif + +/*------- DBSC2 -------*/ +#define DBSC2_BASE 0xfe800000 +DBSC2_DBSTATE_A: .long DBSC2_BASE + 0x0c +DBSC2_DBEN_A: .long DBSC2_BASE + 0x10 +DBSC2_DBCMDCNT_A: .long DBSC2_BASE + 0x14 +DBSC2_DBCONF_A: .long DBSC2_BASE + 0x20 +DBSC2_DBTR0_A: .long DBSC2_BASE + 0x30 +DBSC2_DBTR1_A: .long DBSC2_BASE + 0x34 +DBSC2_DBTR2_A: .long DBSC2_BASE + 0x38 +DBSC2_DBRFCNT0_A: .long DBSC2_BASE + 0x40 +DBSC2_DBRFCNT1_A: .long DBSC2_BASE + 0x44 +DBSC2_DBRFCNT2_A: .long DBSC2_BASE + 0x48 +DBSC2_DBRFSTS_A: .long DBSC2_BASE + 0x4c +DBSC2_DBFREQ_A: .long DBSC2_BASE + 0x50 +DBSC2_DBDICODTOCD_A:.long DBSC2_BASE + 0x54 +DBSC2_DBMRCNT_A: .long DBSC2_BASE + 0x60 +DDR_DUMMY_ACCESS_A: .long 0x40000000 + +DBSC2_DBCONF_D: .long 0x00630002 +DBSC2_DBTR0_D: .long 0x050b1f04 +DBSC2_DBTR1_D: .long 0x00040204 +DBSC2_DBTR2_D: .long 0x02100308 +DBSC2_DBFREQ_D1: .long 0x00000000 +DBSC2_DBFREQ_D2: .long 0x00000100 +DBSC2_DBDICODTOCD_D:.long 0x000f0907 + +DBSC2_DBCMDCNT_D_CKE_H: .long 0x00000003 +DBSC2_DBCMDCNT_D_PALL: .long 0x00000002 +DBSC2_DBCMDCNT_D_REF: .long 0x00000004 + +DBSC2_DBMRCNT_D_EMRS2: .long 0x00020000 +DBSC2_DBMRCNT_D_EMRS3: .long 0x00030000 +DBSC2_DBMRCNT_D_EMRS1_1: .long 0x00010006 +DBSC2_DBMRCNT_D_EMRS1_2: .long 0x00010386 +DBSC2_DBMRCNT_D_MRS_1: .long 0x00000952 +DBSC2_DBMRCNT_D_MRS_2: .long 0x00000852 + +DBSC2_DBEN_D: .long 0x00000001 + +DBSC2_DBPDCNT0_D3: .long 0x00000080 +DBSC2_DBRFCNT1_D: .long 0x00000926 +DBSC2_DBRFCNT2_D: .long 0x00fe00fe +DBSC2_DBRFCNT0_D: .long 0x00010000 + +WAIT_200US: .long 33333 + /*------- LBSC -------*/ PASCR_A: .long 0xff000070 PASCR_32BIT_MODE: .long 0x80000000 /* check booting mode */ diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c index 5e3e17658..194f6ab96 100644 --- a/board/sbc8548/sbc8548.c +++ b/board/sbc8548/sbc8548.c @@ -359,7 +359,7 @@ pci_init_board(void) SET_STD_PCI_INFO(pci_info[num], 1); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pci1_hose, first_free_busno, 0); + &pci1_hose, first_free_busno); } else { printf (" PCI: disabled\n"); } @@ -378,7 +378,7 @@ pci_init_board(void) SET_STD_PCIE_INFO(pci_info[num], 1); printf (" PCIE at base address %lx\n", pci_info[num].regs); first_free_busno = fsl_pci_init_port(&pci_info[num++], - &pcie1_hose, first_free_busno, 0); + &pcie1_hose, first_free_busno); } else { printf (" PCIE: disabled\n"); } diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c index aabefa9a7..c4e987532 100644 --- a/board/sbc8641d/sbc8641d.c +++ b/board/sbc8641d/sbc8641d.c @@ -62,11 +62,6 @@ phys_size_t initdram (int board_type) dram_size = fixed_sdram (); #endif -#if defined(CONFIG_SYS_RAMBOOT) - puts (" DDR: "); - return dram_size; -#endif - puts (" DDR: "); return dram_size; } diff --git a/cpu/mpc85xx/release.S b/cpu/mpc85xx/release.S index a1ae78a7f..433ff0254 100644 --- a/cpu/mpc85xx/release.S +++ b/cpu/mpc85xx/release.S @@ -102,18 +102,22 @@ __secondary_start_page: #ifdef CONFIG_BACKSIDE_L2_CACHE /* Enable/invalidate the L2 cache */ msync - lis r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@h - ori r3,r3,(L2CSR0_L2FI|L2CSR0_L2LFC)@l - mtspr SPRN_L2CSR0,r3 + lis r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@h + ori r2,r2,(L2CSR0_L2FI|L2CSR0_L2LFC)@l + mtspr SPRN_L2CSR0,r2 1: mfspr r3,SPRN_L2CSR0 - andis. r1,r3,L2CSR0_L2FI@h + and. r1,r3,r2 bne 1b lis r3,CONFIG_SYS_INIT_L2CSR0@h ori r3,r3,CONFIG_SYS_INIT_L2CSR0@l mtspr SPRN_L2CSR0,r3 isync +2: + mfspr r3,SPRN_L2CSR0 + andis. r1,r3,L2CSR0_L2E@h + beq 2b #endif #define EPAPR_MAGIC (0x45504150) diff --git a/cpu/mpc85xx/tlb.c b/cpu/mpc85xx/tlb.c index 6e94c237a..ea5deb297 100644 --- a/cpu/mpc85xx/tlb.c +++ b/cpu/mpc85xx/tlb.c @@ -132,10 +132,10 @@ int find_tlb_idx(void *addr, u8 tlbsel) void init_addr_map(void) { int i; - unsigned int max_cam = (mfspr(SPRN_TLB1CFG) >> 16) & 0xff; + unsigned int num_cam = mfspr(SPRN_TLB1CFG) & 0xfff; /* walk all the entries */ - for (i = 0; i < max_cam; i++) { + for (i = 0; i < num_cam; i++) { unsigned long epn; u32 tsize, _mas1; phys_addr_t rpn; diff --git a/cpu/mpc8xxx/ddr/options.c b/cpu/mpc8xxx/ddr/options.c index db442918e..2e030c11a 100644 --- a/cpu/mpc8xxx/ddr/options.c +++ b/cpu/mpc8xxx/ddr/options.c @@ -22,9 +22,7 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, unsigned int ctrl_num) { unsigned int i; -#if (CONFIG_NUM_DDR_CONTROLLERS > 1) const char *p; -#endif /* Chip select options. */ @@ -242,8 +240,10 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, simple_strtoul(p, NULL, 0); } } +#endif - if( (p = getenv("ba_intlv_ctl")) != NULL) { + if( ((p = getenv("ba_intlv_ctl")) != NULL) && + (CONFIG_CHIP_SELECTS_PER_CTRL > 1)) { if (strcmp(p, "cs0_cs1") == 0) popts->ba_intlv_ctl = FSL_DDR_CS0_CS1; else if (strcmp(p, "cs2_cs3") == 0) @@ -283,7 +283,6 @@ unsigned int populate_memctl_options(int all_DIMMs_registered, break; } } -#endif fsl_ddr_board_options(popts, pdimm, ctrl_num); diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c index 397530640..f8aa14aad 100644 --- a/cpu/ppc4xx/44x_spd_ddr2.c +++ b/cpu/ppc4xx/44x_spd_ddr2.c @@ -3160,7 +3160,7 @@ inline void ppc4xx_ibm_ddr2_register_dump(void) PPC4xx_IBM_DDR2_DUMP_REGISTER(SDTR3); PPC4xx_IBM_DDR2_DUMP_REGISTER(MMODE); PPC4xx_IBM_DDR2_DUMP_REGISTER(MEMODE); - PPC4xx_IBM_DDR2_DUMP_REGISTER(ECCCR); + PPC4xx_IBM_DDR2_DUMP_REGISTER(ECCES); #if (defined(CONFIG_440SP) || defined(CONFIG_440SPE) || \ defined(CONFIG_460EX) || defined(CONFIG_460GT)) PPC4xx_IBM_DDR2_DUMP_REGISTER(CID); diff --git a/doc/README.drivers.eth b/doc/README.drivers.eth index e73e462c8..d0c357116 100644 --- a/doc/README.drivers.eth +++ b/doc/README.drivers.eth @@ -122,10 +122,12 @@ function can be called multiple times in a row. The recv function should process packets as long as the hardware has them readily available before returning. i.e. you should drain the hardware fifo. -The common code sets up packet buffers for you already (NetRxPackets), so there -is no need to allocate your own. For each packet you receive, you should call -the NetReceive() function on it with the packet length. So the pseudo code -here would look something like: +For each packet you receive, you should call the NetReceive() function on it +along with the packet length. The common code sets up packet buffers for you +already in the .bss (NetRxPackets), so there should be no need to allocate your +own. This doesn't mean you must use the NetRxPackets array however; you're +free to call the NetReceive() function with any buffer you wish. So the pseudo +code here would look something like: int ape_recv(struct eth_device *dev) { int length, i = 0; @@ -145,7 +147,8 @@ int ape_recv(struct eth_device *dev) } The halt function should turn off / disable the hardware and place it back in -its reset state. +its reset state. It can be called at any time (before any call to the related +init function), so make sure it can handle this sort of thing. So the call graph at this stage would look something like: some net operation (ping / tftp / whatever...) diff --git a/drivers/net/cs8900.c b/drivers/net/cs8900.c index 587f7f62a..df360042b 100644 --- a/drivers/net/cs8900.c +++ b/drivers/net/cs8900.c @@ -56,7 +56,7 @@ #define REG_READ(a) readl((a)) /* we don't need 16 bit initialisation on 32 bit bus */ -#define get_reg_init_bus(x) get_reg((x)) +#define get_reg_init_bus(r,d) get_reg((r),(d)) #else @@ -321,15 +321,16 @@ int cs8900_initialize(u8 dev_num, int base_addr) memset(priv, 0, sizeof(*priv)); priv->regs = (struct cs8900_regs *)base_addr; - /* Load MAC address from EEPROM */ - cs8900_get_enetaddr(dev); - dev->iobase = base_addr; dev->priv = priv; dev->init = cs8900_init; dev->halt = cs8900_halt; dev->send = cs8900_send; dev->recv = cs8900_recv; + + /* Load MAC address from EEPROM */ + cs8900_get_enetaddr(dev); + sprintf(dev->name, "%s-%hu", CS8900_DRIVERNAME, dev_num); eth_register(dev); diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index efe913589..73dd33572 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -284,7 +284,6 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd) int i, oft, lnk; u8 io_mode; struct board_info *db = &dm9000_info; - uchar enetaddr[6]; DM9000_DBG("%s\n", __func__); @@ -342,20 +341,11 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd) /* Clear interrupt status */ DM9000_iow(DM9000_ISR, ISR_ROOS | ISR_ROS | ISR_PTS | ISR_PRS); - /* Set Node address */ - if (!eth_getenv_enetaddr("ethaddr", enetaddr)) { -#if !defined(CONFIG_DM9000_NO_SROM) - for (i = 0; i < 3; i++) - dm9000_read_srom_word(i, enetaddr + 2 * i); - eth_setenv_enetaddr("ethaddr", enetaddr); -#endif - } - - printf("MAC: %pM\n", enetaddr); + printf("MAC: %pM\n", dev->enetaddr); /* fill device MAC address registers */ for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++) - DM9000_iow(oft, enetaddr[i]); + DM9000_iow(oft, dev->enetaddr[i]); for (i = 0, oft = 0x16; i < 8; i++, oft++) DM9000_iow(oft, 0xff); @@ -558,6 +548,15 @@ void dm9000_write_srom_word(int offset, u16 val) } #endif +static void dm9000_get_enetaddr(struct eth_device *dev) +{ +#if !defined(CONFIG_DM9000_NO_SROM) + int i; + for (i = 0; i < 3; i++) + dm9000_read_srom_word(i, dev->enetaddr + (2 * i)); +#endif +} + /* Read a byte from I/O port */ @@ -621,6 +620,9 @@ int dm9000_initialize(bd_t *bis) { struct eth_device *dev = &(dm9000_info.netdev); + /* Load MAC address from EEPROM */ + dm9000_get_enetaddr(dev); + dev->init = dm9000_init; dev->halt = dm9000_halt; dev->send = dm9000_send; diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c index bd83a249e..ad073077c 100644 --- a/drivers/net/fec_mxc.c +++ b/drivers/net/fec_mxc.c @@ -55,6 +55,8 @@ struct fec_priv gfec = { .tbd_base = NULL, .tbd_index = 0, .bd = NULL, + .rdb_ptr = NULL, + .base_ptr = NULL, }; /* @@ -157,7 +159,9 @@ static int miiphy_restart_aneg(struct eth_device *dev) /* * Set the auto-negotiation advertisement register bits */ - miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_ANAR, 0x1e0); + miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_ANAR, + PHY_ANLPAR_TXFD | PHY_ANLPAR_TX | PHY_ANLPAR_10FD | + PHY_ANLPAR_10 | PHY_ANLPAR_PSB_802_3); miiphy_write(dev->name, CONFIG_FEC_MXC_PHYADDR, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG); @@ -228,7 +232,8 @@ static int fec_rbd_init(struct fec_priv *fec, int count, int size) uint32_t p = 0; /* reserve data memory and consider alignment */ - fec->rdb_ptr = malloc(size * count + DB_DATA_ALIGNMENT); + if (fec->rdb_ptr == NULL) + fec->rdb_ptr = malloc(size * count + DB_DATA_ALIGNMENT); p = (uint32_t)fec->rdb_ptr; if (!p) { puts("fec_imx27: not enough malloc memory!\n"); @@ -341,8 +346,8 @@ static int fec_open(struct eth_device *edev) writel(FEC_ECNTRL_ETHER_EN, &fec->eth->ecntrl); miiphy_wait_aneg(edev); - miiphy_speed(edev->name, 0); - miiphy_duplex(edev->name, 0); + miiphy_speed(edev->name, CONFIG_FEC_MXC_PHYADDR); + miiphy_duplex(edev->name, CONFIG_FEC_MXC_PHYADDR); /* * Enable SmartDMA receive task @@ -363,8 +368,9 @@ static int fec_init(struct eth_device *dev, bd_t* bd) * Datasheet forces the startaddress of each chain is 16 byte * aligned */ - fec->base_ptr = malloc((2 + FEC_RBD_NUM) * - sizeof(struct fec_bd) + DB_ALIGNMENT); + if (fec->base_ptr == NULL) + fec->base_ptr = malloc((2 + FEC_RBD_NUM) * + sizeof(struct fec_bd) + DB_ALIGNMENT); base = (uint32_t)fec->base_ptr; if (!base) { puts("fec_imx27: not enough malloc memory!\n"); @@ -491,8 +497,6 @@ static void fec_halt(struct eth_device *dev) writel(0, &fec->eth->ecntrl); fec->rbd_index = 0; fec->tbd_index = 0; - free(fec->rdb_ptr); - free(fec->base_ptr); debug("eth_halt: done\n"); } diff --git a/drivers/net/smc91111.h b/drivers/net/smc91111.h index bb4524106..895c74978 100644 --- a/drivers/net/smc91111.h +++ b/drivers/net/smc91111.h @@ -81,10 +81,10 @@ struct smc91111_priv{ #ifdef CONFIG_PXA250 #ifdef CONFIG_XSENGINE -#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+(r<<1)))) -#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+(r<<1)))) +#define SMC_inl(a,r) (*((volatile dword *)((a)->iobase+((r)<<1)))) +#define SMC_inw(a,r) (*((volatile word *)((a)->iobase+((r)<<1)))) #define SMC_inb(a,p) ({ \ - unsigned int __p = (unsigned int)((a)->iobase + (p<<1)); \ + unsigned int __p = (unsigned int)((a)->iobase + ((p)<<1)); \ unsigned int __v = *(volatile unsigned short *)((__p) & ~2); \ if (__p & 2) __v >>= 8; \ else __v &= 0xff; \ @@ -99,7 +99,7 @@ struct smc91111_priv{ __v; }) #define SMC_inb(a,p) ({ \ unsigned int ___v = SMC_inw((a),(p) & ~1); \ - if (p & 1) ___v >>= 8; \ + if ((p) & 1) ___v >>= 8; \ else ___v &= 0xff; \ ___v; }) #else diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index c50758e53..c027abe9f 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -243,7 +243,7 @@ int smc911x_initialize(u8 dev_num, int base_addr) dev = malloc(sizeof(*dev)); if (!dev) { free(dev); - return 0; + return -1; } memset(dev, 0, sizeof(*dev)); @@ -271,5 +271,5 @@ int smc911x_initialize(u8 dev_num, int base_addr) sprintf(dev->name, "%s-%hu", DRIVERNAME, dev_num); eth_register(dev); - return 0; + return 1; } diff --git a/drivers/pci/fsl_pci_init.c b/drivers/pci/fsl_pci_init.c index 8fbab68a2..170cc257c 100644 --- a/drivers/pci/fsl_pci_init.c +++ b/drivers/pci/fsl_pci_init.c @@ -42,6 +42,7 @@ DECLARE_GLOBAL_DATA_PTR; #define FSL_PCI_PBFR 0x44 #define FSL_PCIE_CAP_ID 0x4c #define FSL_PCIE_CFG_RDY 0x4b0 +#define FSL_PROG_IF_AGENT 0x1 void pciauto_prescan_setup_bridge(struct pci_controller *hose, pci_dev_t dev, int sub_bus); @@ -412,28 +413,24 @@ void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data) } } +int fsl_is_pci_agent(struct pci_controller *hose) +{ + u8 prog_if; + pci_dev_t dev = PCI_BDF(hose->first_busno, 0, 0); + + pci_hose_read_config_byte(hose, dev, PCI_CLASS_PROG, &prog_if); + + return (prog_if == FSL_PROG_IF_AGENT); +} + int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno, int pcie_ep) + struct pci_controller *hose, int busno) { volatile ccsr_fsl_pci_t *pci; struct pci_region *r; pci = (ccsr_fsl_pci_t *) pci_info->regs; - if (pcie_ep) { - volatile pit_t *pi = &pci->pit[2]; - - pci_setup_indirect(hose, (u32)&pci->cfg_addr, - (u32)&pci->cfg_data); - out_be32(&pi->pitar, 0); - out_be32(&pi->piwbar, 0); - out_be32(&pi->piwar, PIWAR_EN | PIWAR_LOCAL | - PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP | PIWAR_IWS_4K); - - fsl_pci_config_unlock(hose); - return 0; - } - /* on non-PCIe controllers we don't have pme_msg_det so this code * should do nothing since the read will return 0 */ @@ -464,6 +461,11 @@ int fsl_pci_init_port(struct fsl_pci_info *pci_info, fsl_pci_init(hose, (u32)&pci->cfg_addr, (u32)&pci->cfg_data); + if (fsl_is_pci_agent(hose)) { + fsl_pci_config_unlock(hose); + hose->last_busno = hose->first_busno; + } + printf(" PCIE%x on bus %02x - %02x\n", pci_info->pci_num, hose->first_busno, hose->last_busno); diff --git a/examples/standalone/smc911x_eeprom.c b/examples/standalone/smc911x_eeprom.c index bf22f0a25..fff312346 100644 --- a/examples/standalone/smc911x_eeprom.c +++ b/examples/standalone/smc911x_eeprom.c @@ -2,7 +2,7 @@ * smc911x_eeprom.c - EEPROM interface to SMC911x parts. * Only tested on SMSC9118 though ... * - * Copyright 2004-2008 Analog Devices Inc. + * Copyright 2004-2009 Analog Devices Inc. * * Licensed under the GPL-2 or later. * @@ -17,8 +17,12 @@ #include <common.h> #include <exports.h> -#ifdef CONFIG_DRIVER_SMC911X - +/* the smc911x.h gets base addr through eth_device' iobase */ +struct eth_device { + const char *name; + unsigned long iobase; + void *priv; +}; #include "../drivers/net/smc911x.h" /** @@ -55,32 +59,32 @@ static void usage(void) * Registers 0x00 - 0x50 are FIFOs. The 0x50+ are the control registers * and they're all 32bits long. 0xB8+ are reserved, so don't bother. */ -static void dump_regs(void) +static void dump_regs(struct eth_device *dev) { u8 i, j = 0; for (i = 0x50; i < 0xB8; i += sizeof(u32)) printf("%02x: 0x%08x %c", i, - smc911x_reg_read(CONFIG_DRIVER_SMC911X_BASE + i), + smc911x_reg_read(dev, i), (j++ % 2 ? '\n' : ' ')); } /** * do_eeprom_cmd - handle eeprom communication */ -static int do_eeprom_cmd(int cmd, u8 reg) +static int do_eeprom_cmd(struct eth_device *dev, int cmd, u8 reg) { - if (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY) { + if (smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY) { printf("eeprom_cmd: busy at start (E2P_CMD = 0x%08x)\n", - smc911x_reg_read(E2P_CMD)); + smc911x_reg_read(dev, E2P_CMD)); return -1; } - smc911x_reg_write(E2P_CMD, E2P_CMD_EPC_BUSY | cmd | reg); + smc911x_reg_write(dev, E2P_CMD, E2P_CMD_EPC_BUSY | cmd | reg); - while (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY) + while (smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY) if (smsc_ctrlc()) { printf("eeprom_cmd: timeout (E2P_CMD = 0x%08x)\n", - smc911x_reg_read(E2P_CMD)); + smc911x_reg_read(dev, E2P_CMD)); return -1; } @@ -90,37 +94,37 @@ static int do_eeprom_cmd(int cmd, u8 reg) /** * read_eeprom_reg - read specified register in EEPROM */ -static u8 read_eeprom_reg(u8 reg) +static u8 read_eeprom_reg(struct eth_device *dev, u8 reg) { - int ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_READ, reg); - return (ret ? : smc911x_reg_read(E2P_DATA)); + int ret = do_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ, reg); + return (ret ? : smc911x_reg_read(dev, E2P_DATA)); } /** * write_eeprom_reg - write specified value into specified register in EEPROM */ -static int write_eeprom_reg(u8 value, u8 reg) +static int write_eeprom_reg(struct eth_device *dev, u8 value, u8 reg) { int ret; /* enable erasing/writing */ - ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_EWEN, reg); + ret = do_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN, reg); if (ret) goto done; /* erase the eeprom reg */ - ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_ERASE, reg); + ret = do_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE, reg); if (ret) goto done; /* write the eeprom reg */ - smc911x_reg_write(E2P_DATA, value); - ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_WRITE, reg); + smc911x_reg_write(dev, E2P_DATA, value); + ret = do_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE, reg); if (ret) goto done; /* disable erasing/writing */ - ret = do_eeprom_cmd(E2P_CMD_EPC_CMD_EWDS, reg); + ret = do_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWDS, reg); done: return ret; @@ -139,7 +143,7 @@ static char *skip_space(char *buf) /** * write_stuff - handle writing of MAC registers / eeprom */ -static void write_stuff(char *line) +static void write_stuff(struct eth_device *dev, char *line) { char dest; char *endp; @@ -182,39 +186,39 @@ static void write_stuff(char *line) /* Finally, execute the command */ if (dest == 'E') { printf("Writing EEPROM register %02x with %02x\n", reg, value); - write_eeprom_reg(value, reg); + write_eeprom_reg(dev, value, reg); } else { printf("Writing MAC register %02x with %08x\n", reg, value); - smc911x_reg_write(CONFIG_DRIVER_SMC911X_BASE + reg, value); + smc911x_reg_write(dev, reg, value); } } /** * copy_from_eeprom - copy MAC address in eeprom to address registers */ -static void copy_from_eeprom(void) +static void copy_from_eeprom(struct eth_device *dev) { ulong addrl = - read_eeprom_reg(0x01) | - read_eeprom_reg(0x02) << 8 | - read_eeprom_reg(0x03) << 16 | - read_eeprom_reg(0x04) << 24; + read_eeprom_reg(dev, 0x01) | + read_eeprom_reg(dev, 0x02) << 8 | + read_eeprom_reg(dev, 0x03) << 16 | + read_eeprom_reg(dev, 0x04) << 24; ulong addrh = - read_eeprom_reg(0x05) | - read_eeprom_reg(0x06) << 8; - smc911x_set_mac_csr(ADDRL, addrl); - smc911x_set_mac_csr(ADDRH, addrh); + read_eeprom_reg(dev, 0x05) | + read_eeprom_reg(dev, 0x06) << 8; + smc911x_set_mac_csr(dev, ADDRL, addrl); + smc911x_set_mac_csr(dev, ADDRH, addrh); puts("EEPROM contents copied to MAC\n"); } /** * print_macaddr - print MAC address registers and MAC address in eeprom */ -static void print_macaddr(void) +static void print_macaddr(struct eth_device *dev) { puts("Current MAC Address in MAC: "); - ulong addrl = smc911x_get_mac_csr(ADDRL); - ulong addrh = smc911x_get_mac_csr(ADDRH); + ulong addrl = smc911x_get_mac_csr(dev, ADDRL); + ulong addrh = smc911x_get_mac_csr(dev, ADDRH); printf("%02x:%02x:%02x:%02x:%02x:%02x\n", (u8)(addrl), (u8)(addrl >> 8), (u8)(addrl >> 16), (u8)(addrl >> 24), (u8)(addrh), (u8)(addrh >> 8)); @@ -222,41 +226,42 @@ static void print_macaddr(void) puts("Current MAC Address in EEPROM: "); int i; for (i = 1; i < 6; ++i) - printf("%02x:", read_eeprom_reg(i)); - printf("%02x\n", read_eeprom_reg(i)); + printf("%02x:", read_eeprom_reg(dev, i)); + printf("%02x\n", read_eeprom_reg(dev, i)); } /** * dump_eeprom - dump the whole content of the EEPROM */ -static void dump_eeprom(void) +static void dump_eeprom(struct eth_device *dev) { int i; puts("EEPROM:\n"); for (i = 0; i < 7; ++i) - printf("%02x: 0x%02x\n", i, read_eeprom_reg(i)); + printf("%02x: 0x%02x\n", i, read_eeprom_reg(dev, i)); } /** * smc911x_init - get the MAC/EEPROM up and ready for use */ -static int smc911x_init(void) +static int smc911x_init(struct eth_device *dev) { /* See if there is anything there */ - if (!smc911x_detect_chip()) + if (!smc911x_detect_chip(dev)) return 1; - smc911x_reset(); + smc911x_reset(dev); /* Make sure we set EEDIO/EECLK to the EEPROM */ - if (smc911x_reg_read(GPIO_CFG) & GPIO_CFG_EEPR_EN) { - while (smc911x_reg_read(E2P_CMD) & E2P_CMD_EPC_BUSY) + if (smc911x_reg_read(dev, GPIO_CFG) & GPIO_CFG_EEPR_EN) { + while (smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY) if (smsc_ctrlc()) { printf("init: timeout (E2P_CMD = 0x%08x)\n", - smc911x_reg_read(E2P_CMD)); + smc911x_reg_read(dev, E2P_CMD)); return 1; } - smc911x_reg_write(GPIO_CFG, smc911x_reg_read(GPIO_CFG) & ~GPIO_CFG_EEPR_EN); + smc911x_reg_write(dev, GPIO_CFG, + smc911x_reg_read(dev, GPIO_CFG) & ~GPIO_CFG_EEPR_EN); } return 0; @@ -317,6 +322,11 @@ static char *getline(void) */ int smc911x_eeprom(int argc, char *argv[]) { + /* Avoid initializing on stack as gcc likes to call memset() */ + struct eth_device dev; + dev.name = __func__; + dev.iobase = CONFIG_SMC911X_BASE; + /* Print the ABI version */ app_startup(argv); if (XF_VERSION != get_version()) { @@ -328,7 +338,7 @@ int smc911x_eeprom(int argc, char *argv[]) /* Initialize the MAC/EEPROM somewhat */ puts("\n"); - if (smc911x_init()) + if (smc911x_init(&dev)) return 1; /* Dump helpful usage information */ @@ -360,11 +370,11 @@ int smc911x_eeprom(int argc, char *argv[]) /* Now parse the command */ switch (line[0]) { - case 'W': write_stuff(line); break; - case 'D': dump_eeprom(); break; - case 'M': dump_regs(); break; - case 'C': copy_from_eeprom(); break; - case 'P': print_macaddr(); break; + case 'W': write_stuff(&dev, line); break; + case 'D': dump_eeprom(&dev); break; + case 'M': dump_regs(&dev); break; + case 'C': copy_from_eeprom(&dev); break; + case 'P': print_macaddr(&dev); break; unknown_cmd: default: puts("ERROR: Unknown command!\n\n"); case '?': @@ -373,11 +383,3 @@ int smc911x_eeprom(int argc, char *argv[]) } } } - -#else -int smc911x_eeprom(int argc, char *argv[]) -{ - puts("Not supported for this board\n"); - return 1; -} -#endif diff --git a/include/asm-arm/unaligned.h b/include/asm-arm/unaligned.h index d644df752..44593a894 100644 --- a/include/asm-arm/unaligned.h +++ b/include/asm-arm/unaligned.h @@ -1,7 +1,8 @@ #ifndef _ASM_ARM_UNALIGNED_H #define _ASM_ARM_UNALIGNED_H -#include <linux/unaligned/access_ok.h> +#include <linux/unaligned/le_byteshift.h> +#include <linux/unaligned/be_byteshift.h> #include <linux/unaligned/generic.h> /* diff --git a/include/asm-ppc/fsl_pci.h b/include/asm-ppc/fsl_pci.h index 6b0c89bd3..a5f72f5cd 100644 --- a/include/asm-ppc/fsl_pci.h +++ b/include/asm-ppc/fsl_pci.h @@ -25,6 +25,7 @@ int is_fsl_pci_agent(enum law_trgt_if trgt, u32 host_agent); int is_fsl_pci_cfg(enum law_trgt_if trgt, u32 io_sel); +int fsl_is_pci_agent(struct pci_controller *hose); void fsl_pci_init(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data); void fsl_pci_config_unlock(struct pci_controller *hose); void ft_fsl_pci_setup(void *blob, const char *pci_alias, @@ -62,7 +63,6 @@ typedef struct pci_inbound_window { #define PIWAR_LOCAL 0x00f00000 #define PIWAR_READ_SNOOP 0x00050000 #define PIWAR_WRITE_SNOOP 0x00005000 -#define PIWAR_IWS_4K 0x0000000b u32 res2[3]; } pit_t; @@ -172,7 +172,7 @@ struct fsl_pci_info { }; int fsl_pci_init_port(struct fsl_pci_info *pci_info, - struct pci_controller *hose, int busno, int pcie_ep); + struct pci_controller *hose, int busno); #define SET_STD_PCI_INFO(x, num) \ { \ diff --git a/include/configs/canyonlands.h b/include/configs/canyonlands.h index 3dddccfe7..ac9b3c505 100644 --- a/include/configs/canyonlands.h +++ b/include/configs/canyonlands.h @@ -593,7 +593,7 @@ #define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_FPGA_BASE | 0x3a000) /* BAS=FPGA,BS=2MB,BU=R/W,BW=16bit*/ #endif /* !defined(CONFIG_ARCHES) */ -#define CONFIG_SYS_EBC_CFG 0xB8400000 /* EBC0_CFG */ +#define CONFIG_SYS_EBC_CFG 0xbfc00000 /* * Arches doesn't use PerCS3 but GPIO43, so let's configure the GPIO diff --git a/include/configs/lpd7a400-10.h b/include/configs/lpd7a400-10.h index 5f57c3a5a..91bf1fabd 100644 --- a/include/configs/lpd7a400-10.h +++ b/include/configs/lpd7a400-10.h @@ -76,6 +76,5 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC_USE_IOFUNCS #endif /* __LPD7A400_10_H */ diff --git a/include/configs/lpd7a404-10.h b/include/configs/lpd7a404-10.h index 9074e28a0..b10e69d23 100644 --- a/include/configs/lpd7a404-10.h +++ b/include/configs/lpd7a404-10.h @@ -76,6 +76,5 @@ #define CONFIG_SMC91111 #define CONFIG_SMC91111_BASE (0x70000000) #undef CONFIG_SMC_USE_32_BIT -#define CONFIG_SMC_USE_IOFUNCS #endif /* __LPD7A404_10_H */ diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h index 102c0af3b..557f389cc 100644 --- a/include/configs/lpd7a404.h +++ b/include/configs/lpd7a404.h @@ -72,7 +72,7 @@ #include <config_cmd_default.h> #ifndef USE_920T_MMU - #define CONFIG_CMD_PING) + #define CONFIG_CMD_PING #undef CONFIG_CMD_CACHE #else #define CONFIG_CMD_DATE diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 4dea27d48..7bef1195d 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -158,7 +158,7 @@ /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ #define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | /* flash Base address */ \ - (2 << BR_PS_SHIFT) | /* 32 bit port size */ \ + (2 << BR_PS_SHIFT) | /* 16 bit port size */ \ BR_V) /* valid */ #define CONFIG_SYS_OR0_PRELIM 0xFF806FF7 /* 8 MB flash size */ diff --git a/include/linux/unaligned/be_byteshift.h b/include/linux/unaligned/be_byteshift.h new file mode 100644 index 000000000..9356b2422 --- /dev/null +++ b/include/linux/unaligned/be_byteshift.h @@ -0,0 +1,70 @@ +#ifndef _LINUX_UNALIGNED_BE_BYTESHIFT_H +#define _LINUX_UNALIGNED_BE_BYTESHIFT_H + +#include <linux/types.h> + +static inline u16 __get_unaligned_be16(const u8 *p) +{ + return p[0] << 8 | p[1]; +} + +static inline u32 __get_unaligned_be32(const u8 *p) +{ + return p[0] << 24 | p[1] << 16 | p[2] << 8 | p[3]; +} + +static inline u64 __get_unaligned_be64(const u8 *p) +{ + return (u64)__get_unaligned_be32(p) << 32 | + __get_unaligned_be32(p + 4); +} + +static inline void __put_unaligned_be16(u16 val, u8 *p) +{ + *p++ = val >> 8; + *p++ = val; +} + +static inline void __put_unaligned_be32(u32 val, u8 *p) +{ + __put_unaligned_be16(val >> 16, p); + __put_unaligned_be16(val, p + 2); +} + +static inline void __put_unaligned_be64(u64 val, u8 *p) +{ + __put_unaligned_be32(val >> 32, p); + __put_unaligned_be32(val, p + 4); +} + +static inline u16 get_unaligned_be16(const void *p) +{ + return __get_unaligned_be16((const u8 *)p); +} + +static inline u32 get_unaligned_be32(const void *p) +{ + return __get_unaligned_be32((const u8 *)p); +} + +static inline u64 get_unaligned_be64(const void *p) +{ + return __get_unaligned_be64((const u8 *)p); +} + +static inline void put_unaligned_be16(u16 val, void *p) +{ + __put_unaligned_be16(val, p); +} + +static inline void put_unaligned_be32(u32 val, void *p) +{ + __put_unaligned_be32(val, p); +} + +static inline void put_unaligned_be64(u64 val, void *p) +{ + __put_unaligned_be64(val, p); +} + +#endif /* _LINUX_UNALIGNED_BE_BYTESHIFT_H */ diff --git a/include/linux/unaligned/le_byteshift.h b/include/linux/unaligned/le_byteshift.h new file mode 100644 index 000000000..be376fb79 --- /dev/null +++ b/include/linux/unaligned/le_byteshift.h @@ -0,0 +1,70 @@ +#ifndef _LINUX_UNALIGNED_LE_BYTESHIFT_H +#define _LINUX_UNALIGNED_LE_BYTESHIFT_H + +#include <linux/types.h> + +static inline u16 __get_unaligned_le16(const u8 *p) +{ + return p[0] | p[1] << 8; +} + +static inline u32 __get_unaligned_le32(const u8 *p) +{ + return p[0] | p[1] << 8 | p[2] << 16 | p[3] << 24; +} + +static inline u64 __get_unaligned_le64(const u8 *p) +{ + return (u64)__get_unaligned_le32(p + 4) << 32 | + __get_unaligned_le32(p); +} + +static inline void __put_unaligned_le16(u16 val, u8 *p) +{ + *p++ = val; + *p++ = val >> 8; +} + +static inline void __put_unaligned_le32(u32 val, u8 *p) +{ + __put_unaligned_le16(val >> 16, p + 2); + __put_unaligned_le16(val, p); +} + +static inline void __put_unaligned_le64(u64 val, u8 *p) +{ + __put_unaligned_le32(val >> 32, p + 4); + __put_unaligned_le32(val, p); +} + +static inline u16 get_unaligned_le16(const void *p) +{ + return __get_unaligned_le16((const u8 *)p); +} + +static inline u32 get_unaligned_le32(const void *p) +{ + return __get_unaligned_le32((const u8 *)p); +} + +static inline u64 get_unaligned_le64(const void *p) +{ + return __get_unaligned_le64((const u8 *)p); +} + +static inline void put_unaligned_le16(u16 val, void *p) +{ + __put_unaligned_le16(val, p); +} + +static inline void put_unaligned_le32(u32 val, void *p) +{ + __put_unaligned_le32(val, p); +} + +static inline void put_unaligned_le64(u64 val, void *p) +{ + __put_unaligned_le64(val, p); +} + +#endif /* _LINUX_UNALIGNED_LE_BYTESHIFT_H */ diff --git a/lib_arm/board.c b/lib_arm/board.c index 5e3d7f65b..e14873915 100644 --- a/lib_arm/board.c +++ b/lib_arm/board.c @@ -93,23 +93,23 @@ extern void rtl8019_get_enetaddr (uchar * addr); * May be supplied by boards if desired */ void inline __coloured_LED_init (void) {} -void inline coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); +void coloured_LED_init (void) __attribute__((weak, alias("__coloured_LED_init"))); void inline __red_LED_on (void) {} -void inline red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); +void red_LED_on (void) __attribute__((weak, alias("__red_LED_on"))); void inline __red_LED_off(void) {} -void inline red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); +void red_LED_off(void) __attribute__((weak, alias("__red_LED_off"))); void inline __green_LED_on(void) {} -void inline green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); +void green_LED_on(void) __attribute__((weak, alias("__green_LED_on"))); void inline __green_LED_off(void) {} -void inline green_LED_off(void)__attribute__((weak, alias("__green_LED_off"))); +void green_LED_off(void) __attribute__((weak, alias("__green_LED_off"))); void inline __yellow_LED_on(void) {} -void inline yellow_LED_on(void)__attribute__((weak, alias("__yellow_LED_on"))); +void yellow_LED_on(void) __attribute__((weak, alias("__yellow_LED_on"))); void inline __yellow_LED_off(void) {} -void inline yellow_LED_off(void)__attribute__((weak, alias("__yellow_LED_off"))); +void yellow_LED_off(void) __attribute__((weak, alias("__yellow_LED_off"))); void inline __blue_LED_on(void) {} -void inline blue_LED_on(void)__attribute__((weak, alias("__blue_LED_on"))); +void blue_LED_on(void) __attribute__((weak, alias("__blue_LED_on"))); void inline __blue_LED_off(void) {} -void inline blue_LED_off(void)__attribute__((weak, alias("__blue_LED_off"))); +void blue_LED_off(void) __attribute__((weak, alias("__blue_LED_off"))); /************************************************************************ * Init Utilities * diff --git a/lib_nios/board.c b/lib_nios/board.c index 72713a8fe..5d2fb2ec4 100644 --- a/lib_nios/board.c +++ b/lib_nios/board.c @@ -49,7 +49,6 @@ DECLARE_GLOBAL_DATA_PTR; */ -extern void malloc_bin_reloc (void); typedef int (init_fnc_t) (void); @@ -115,7 +114,6 @@ void board_init (void) /* The Malloc area is immediately below the monitor copy in RAM */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - malloc_bin_reloc(); WATCHDOG_RESET (); bd->bi_flashsize = flash_init(); diff --git a/lib_nios2/board.c b/lib_nios2/board.c index c6b36f4a2..008f04f95 100644 --- a/lib_nios2/board.c +++ b/lib_nios2/board.c @@ -52,7 +52,6 @@ DECLARE_GLOBAL_DATA_PTR; */ -extern void malloc_bin_reloc (void); typedef int (init_fnc_t) (void); @@ -121,7 +120,6 @@ void board_init (void) /* The Malloc area is immediately below the monitor copy in RAM */ mem_malloc_init(CONFIG_SYS_MALLOC_BASE, CONFIG_SYS_MALLOC_LEN); - malloc_bin_reloc(); WATCHDOG_RESET (); bd->bi_flashsize = flash_init(); diff --git a/lib_sh/board.c b/lib_sh/board.c index 5ed40e922..c97e20c3e 100644 --- a/lib_sh/board.c +++ b/lib_sh/board.c @@ -32,7 +32,6 @@ #include <miiphy.h> #endif -extern void malloc_bin_reloc (void); extern int cpu_init(void); extern int board_init(void); extern int dram_init(void); @@ -92,7 +91,6 @@ static int sh_mem_env_init(void) { mem_malloc_init(TEXT_BASE - CONFIG_SYS_GBL_DATA_SIZE - CONFIG_SYS_MALLOC_LEN, CONFIG_SYS_MALLOC_LEN - 16); - malloc_bin_reloc(); env_relocate(); jumptable_init(); return 0; diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c index 7f14a6fe4..ff47d5531 100644 --- a/nand_spl/nand_boot_fsl_elbc.c +++ b/nand_spl/nand_boot_fsl_elbc.c @@ -25,7 +25,6 @@ #include <common.h> #include <asm/io.h> -#include <asm/immap_83xx.h> #include <asm/fsl_lbc.h> #include <linux/mtd/nand.h> |