diff options
| author | Timur Tabi <timur@freescale.com> | 2011-08-04 18:03:41 -0500 | 
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2011-09-29 19:01:04 -0500 | 
| commit | e46fedfeb214d118b9983d11fcc929ed49f5ccd7 (patch) | |
| tree | 082992bbcb09217952f6f758ef78d74460cc2458 /include | |
| parent | b6c3722dfa98a68236301ddf525dfaf90a95224f (diff) | |
| download | olio-uboot-2014.01-e46fedfeb214d118b9983d11fcc929ed49f5ccd7.tar.xz olio-uboot-2014.01-e46fedfeb214d118b9983d11fcc929ed49f5ccd7.zip | |
powerpc/85xx: introduce and document CONFIG_SYS_CCSRBAR macros
Introduce the CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW
macros, which contain the high and low portions of CONFIG_SYS_CCSRBAR_PHYS.
This is necessary for the assembly-language code that relocates CCSR, since
the assembler does not understand 64-bit constants.
CONFIG_SYS_CCSRBAR_PHYS is automatically defined from the
CONFIG_SYS_CCSRBAR_PHYS_HIGH and CONFIG_SYS_CCSRBAR_PHYS_LOW macros, so it
should not be defined in a board header file.  Similarly,
CONFIG_SYS_CCSRBAR_DEFAULT is defined for each SOC in config_mpc85xx.h, so
it should also not be defined in the board header file.
CONFIG_SYS_CCSR_DO_NOT_RELOCATE is a "short-cut" macro that guarantees that
CONFIG_SYS_CCSRBAR_PHYS is set to the same value as CONFIG_SYS_CCSRBAR_DEFAULT,
and so CCSR will not be relocated.
Since CONFIG_SYS_CCSRBAR_DEFAULT is locked to a fixed value, multi-stage U-Boot
builds (e.g. NAND) are required to relocate CCSR only during the last stage
(i.e. the "real" U-Boot).  All other stages should define
CONFIG_SYS_CCSR_DO_NOT_RELOCATE to ensure that CCSR is not relocated.
README is updated with descriptions of all the CONFIG_SYS_CCSRBAR_xxx macros.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'include')
28 files changed, 94 insertions, 277 deletions
| diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h index 783ed518e..f3d325a0c 100644 --- a/include/configs/MPC8536DS.h +++ b/include/configs/MPC8536DS.h @@ -127,22 +127,11 @@  #define CONFIG_SYS_L2_SIZE		(512 << 10)  #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR		0xffe00000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS	0xfffe00000ull /* physical addr of CCSRBAR */ -#else -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR -#endif -#define CONFIG_SYS_IMMR	CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xffe00000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  #if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) -#define CONFIG_SYS_CCSRBAR_DEFAULT	CONFIG_SYS_CCSRBAR -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE  #endif  /* DDR Setup */ diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h index e1d933ec4..fc0edaced 100644 --- a/include/configs/MPC8540ADS.h +++ b/include/configs/MPC8540ADS.h @@ -89,15 +89,8 @@  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */  #define CONFIG_SYS_MEMTEST_END		0x00400000 - -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR1 diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h index 5918e644d..ae19036d8 100644 --- a/include/configs/MPC8541CDS.h +++ b/include/configs/MPC8541CDS.h @@ -62,14 +62,8 @@ extern unsigned long get_clock_freq(void);  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */  #define CONFIG_SYS_MEMTEST_END		0x00400000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR1 diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h index b25fb55a4..6b03d2741 100644 --- a/include/configs/MPC8544DS.h +++ b/include/configs/MPC8544DS.h @@ -74,14 +74,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);  #define CONFIG_SYS_MEMTEST_END		0x00400000  #define CONFIG_PANIC_HANG	/* do not reset board on panic */ -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR2 diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index c9a0f6058..aca77ff6b 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -77,14 +77,8 @@ extern unsigned long get_clock_freq(void);  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */  #define CONFIG_SYS_MEMTEST_END		0x00400000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR2 diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h index 4c580a37e..93d4c3e5f 100644 --- a/include/configs/MPC8555CDS.h +++ b/include/configs/MPC8555CDS.h @@ -62,14 +62,8 @@ extern unsigned long get_clock_freq(void);  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */  #define CONFIG_SYS_MEMTEST_END		0x00400000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR1 diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h index f55ef9d79..e03fea3cc 100644 --- a/include/configs/MPC8560ADS.h +++ b/include/configs/MPC8560ADS.h @@ -86,15 +86,8 @@  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest region */  #define CONFIG_SYS_MEMTEST_END		0x00400000 - -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR1 diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h index f7df7f038..cf0ea47e7 100644 --- a/include/configs/MPC8568MDS.h +++ b/include/configs/MPC8568MDS.h @@ -71,14 +71,8 @@ extern unsigned long get_clock_freq(void);  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */  #define CONFIG_SYS_MEMTEST_END		0x00400000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR2 diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index fa626bb97..dd7278c4b 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -105,20 +105,11 @@ extern unsigned long get_clock_freq(void);  #define CONFIG_SYS_L2_SIZE		(512 << 10)  #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR -						/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR -						/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  #if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) -#define CONFIG_SYS_CCSRBAR_DEFAULT	CONFIG_SYS_CCSRBAR -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE  #endif  /* DDR Setup */ diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h index bb8fb669c..6067e6085 100644 --- a/include/configs/MPC8572DS.h +++ b/include/configs/MPC8572DS.h @@ -112,22 +112,11 @@  #define CONFIG_SYS_L2_SIZE		(512 << 10)  #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR		0xffe00000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS		0xfffe00000ull	/* physical addr of CCSRBAR */ -#else -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#endif -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xffe00000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  #if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) -#define CONFIG_SYS_CCSRBAR_DEFAULT		CONFIG_SYS_CCSRBAR -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000      /* CCSRBAR Default */ +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE  #endif  /* DDR Setup */ diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h index a11897552..a3cccf4c3 100644 --- a/include/configs/P1022DS.h +++ b/include/configs/P1022DS.h @@ -64,18 +64,8 @@  #define CONFIG_SYS_MEMTEST_START	0x00000000  #define CONFIG_SYS_MEMTEST_END		0x7fffffff -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xffe00000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS		0xfffe00000ull -#else -#define CONFIG_SYS_CCSRBAR_PHYS		CONFIG_SYS_CCSRBAR -#endif -#define CONFIG_SYS_IMMR			CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR		0xffe00000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_DDR_SPD diff --git a/include/configs/P1023RDS.h b/include/configs/P1023RDS.h index 95f3a2c18..24042dfb6 100644 --- a/include/configs/P1023RDS.h +++ b/include/configs/P1023RDS.h @@ -99,15 +99,6 @@ extern unsigned long get_clock_freq(void);  #define CONFIG_SYS_LBC_LBCR	0x00000000	/* Implement conversion of  						addresses in the LBC */ -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff600000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xff600000	/* relocated CCSRBAR */ -/* physical addr of CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR -#define CONFIG_SYS_IMMR	CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */  /* DDR Setup */  #define CONFIG_VERY_BIG_RAM diff --git a/include/configs/P1_P2_RDB.h b/include/configs/P1_P2_RDB.h index df88b79bb..3ffdb1a02 100644 --- a/include/configs/P1_P2_RDB.h +++ b/include/configs/P1_P2_RDB.h @@ -148,24 +148,11 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);  #define CONFIG_SYS_L2_SIZE		(512 << 10)  #define CONFIG_SYS_INIT_L2_END		(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR		0xffe00000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS	0xfffe00000ull -#else -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR -#endif -							/* CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses */ -							/* CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xffe00000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  #if defined(CONFIG_RAMBOOT_NAND) && !defined(CONFIG_NAND_SPL) -#define CONFIG_SYS_CCSRBAR_DEFAULT	CONFIG_SYS_CCSRBAR -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000      /* CCSRBAR Default */ +#define CONFIG_SYS_CCSR_DO_NOT_RELOCATE  #endif  /* DDR Setup */ diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h index 90fe7c404..f6b788e57 100644 --- a/include/configs/P2020DS.h +++ b/include/configs/P2020DS.h @@ -118,18 +118,8 @@  #define CONFIG_SYS_L2_SIZE		(512 << 10)  #define CONFIG_SYS_INIT_L2_END	(CONFIG_SYS_INIT_L2_ADDR + CONFIG_SYS_L2_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xffe00000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS		0xfffe00000ull	/* physical addr of CCSRBAR */ -#else -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#endif -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xffe00000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_VERY_BIG_RAM diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 638dbe7a6..03dbe55c3 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -138,20 +138,6 @@  #define CONFIG_SYS_L3_SIZE		(1024 << 10)  #define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xfe000000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS		0xffe000000ull -#else -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR -#endif -/* PQII uses CONFIG_SYS_IMMR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR -  #ifdef CONFIG_PHYS_64BIT  #define CONFIG_SYS_DCSRBAR		0xf0000000  #define CONFIG_SYS_DCSRBAR_PHYS		0xf00000000ull diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h index 72559c0c0..b5612d66c 100644 --- a/include/configs/SBC8540.h +++ b/include/configs/SBC8540.h @@ -94,20 +94,6 @@  #error "You can only use ONE of PCI Ethernet Card or TSEC Ethernet or CPM FCC."  #endif -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default	*/ - -#if XXX -  #define CONFIG_SYS_CCSRBAR		0xfdf00000	/* relocated CCSRBAR	*/ -#else -  #define CONFIG_SYS_CCSRBAR		0xff700000	/* default CCSRBAR	*/ -#endif -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR	*/ -  #define CONFIG_SYS_SDRAM_SIZE		512		/* DDR is 512MB */  /* DDR Setup */ diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h index b336723f5..fe6b72810 100644 --- a/include/configs/TQM85xx.h +++ b/include/configs/TQM85xx.h @@ -130,18 +130,12 @@  #define CONFIG_SYS_MEMTEST_START	0x00000000  #define CONFIG_SYS_MEMTEST_END		0x10000000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xFF700000	/* CCSRBAR Default	*/  #ifdef CONFIG_TQM_BIGFLASH -#define CONFIG_SYS_CCSRBAR	 	0xA0000000	/* relocated CCSRBAR	*/ -#else /* !CONFIG_TQM_BIGFLASH */ -#define CONFIG_SYS_CCSRBAR		0xE0000000	/* relocated CCSRBAR	*/ -#endif /* CONFIG_TQM_BIGFLASH */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR	*/ +#define CONFIG_SYS_CCSRBAR	 	0xA0000000 +#else +#define CONFIG_SYS_CCSRBAR		0xE0000000 +#endif +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /*   * DDR Setup diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h index adf9906bc..eb89b30b3 100644 --- a/include/configs/corenet_ds.h +++ b/include/configs/corenet_ds.h @@ -144,19 +144,6 @@  #define CONFIG_SYS_L3_SIZE		(1024 << 10)  #define CONFIG_SYS_INIT_L3_END (CONFIG_SYS_INIT_L3_ADDR + CONFIG_SYS_L3_SIZE) -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xfe000000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xfe000000	/* relocated CCSRBAR */ -#ifdef CONFIG_PHYS_64BIT -#define CONFIG_SYS_CCSRBAR_PHYS		0xffe000000ull	/* physical addr of CCSRBAR */ -#else -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#endif -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ -  #ifdef CONFIG_PHYS_64BIT  #define CONFIG_SYS_DCSRBAR		0xf0000000  #define CONFIG_SYS_DCSRBAR_PHYS		0xf00000000ull diff --git a/include/configs/mpq101.h b/include/configs/mpq101.h index e76ca73d4..f0ed4d108 100644 --- a/include/configs/mpq101.h +++ b/include/configs/mpq101.h @@ -64,20 +64,8 @@  #define CONFIG_SYS_CLK_FREQ      33000000 /* sysclk for MPC85xx */ -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000 -#define CONFIG_SYS_CCSRBAR         0xe0000000 - -#ifdef CONFIG_PHYS_64BIT -# define CONFIG_SYS_CCSRBAR_PHYS   0xfe0000000ull -#else -# define CONFIG_SYS_CCSRBAR_PHYS   CONFIG_SYS_CCSRBAR -#endif - -#define CONFIG_SYS_IMMR            CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR2 diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h index 7bf9fc76c..4ec323ece 100644 --- a/include/configs/sbc8548.h +++ b/include/configs/sbc8548.h @@ -103,14 +103,8 @@  #define CONFIG_SYS_MEMTEST_START	0x00200000	/* memtest works on */  #define CONFIG_SYS_MEMTEST_END		0x00400000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR2 diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h index 435b148f3..e0af0d26a 100644 --- a/include/configs/sbc8560.h +++ b/include/configs/sbc8560.h @@ -92,20 +92,6 @@  #error "You can only use ONE of PCI Ethernet Card or TSEC Ethernet or CPM FCC."  #endif -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default	*/ - -#if XXX -  #define CONFIG_SYS_CCSRBAR		0xfdf00000	/* relocated CCSRBAR	*/ -#else -  #define CONFIG_SYS_CCSRBAR		0xff700000	/* default CCSRBAR	*/ -#endif -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR	*/ -  #define CONFIG_SYS_SDRAM_SIZE		512		/* DDR is 512MB */  /* DDR Setup */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 5f2fb1e92..af62aea7a 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -91,14 +91,8 @@  #define CONFIG_SYS_MEMTEST_START	0x00400000  #define CONFIG_SYS_MEMTEST_END		0x00C00000 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xFF700000	/* CCSRBAR Default	*/ -#define CONFIG_SYS_CCSRBAR		0xE0000000	/* relocated CCSRBAR	*/ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR	*/ +#define CONFIG_SYS_CCSRBAR		0xE0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR2 diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h index fc3881d22..66738d595 100644 --- a/include/configs/stxgp3.h +++ b/include/configs/stxgp3.h @@ -109,12 +109,9 @@  #ifdef CONFIG_SYS_RAMBOOT  #define CONFIG_SYS_CCSRBAR_DEFAULT	0x40000000	/* CCSRBAR by BDI cfg	*/ -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default	*/  #endif -#define CONFIG_SYS_CCSRBAR             0xfdf00000      /* relocated CCSRBAR    */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR	*/ +#define CONFIG_SYS_CCSRBAR		0xfdf00000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR1 diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h index 141da2647..a421ba43b 100644 --- a/include/configs/stxssa.h +++ b/include/configs/stxssa.h @@ -121,12 +121,10 @@  #ifdef CONFIG_SYS_RAMBOOT  #define CONFIG_SYS_CCSRBAR_DEFAULT	0x40000000	/* CCSRBAR by BDI cfg	*/ -#else -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default	*/  #endif -#define CONFIG_SYS_CCSRBAR		0xe0000000	/* relocated CCSRBAR	*/ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR	*/ + +#define CONFIG_SYS_CCSRBAR		0xe0000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /* DDR Setup */  #define CONFIG_FSL_DDR1 diff --git a/include/configs/xpedite520x.h b/include/configs/xpedite520x.h index b6b391f89..42517c9da 100644 --- a/include/configs/xpedite520x.h +++ b/include/configs/xpedite520x.h @@ -78,14 +78,8 @@  #define CONFIG_BTB			/* toggle branch predition */  #define CONFIG_ENABLE_36BIT_PHYS	1 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xef000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xef000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /*   * Diagnostics diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h index a74766dce..202f209a7 100644 --- a/include/configs/xpedite537x.h +++ b/include/configs/xpedite537x.h @@ -96,14 +96,8 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);  #define CONFIG_BTB			/* toggle branch predition */  #define CONFIG_ENABLE_36BIT_PHYS	1 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xef000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xef000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /*   * Diagnostics diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h index 6588867b8..0c2e7edb2 100644 --- a/include/configs/xpedite550x.h +++ b/include/configs/xpedite550x.h @@ -93,14 +93,8 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);  #define CONFIG_BTB			/* toggle branch predition */  #define CONFIG_ENABLE_36BIT_PHYS	1 -/* - * Base addresses -- Note these are effective addresses where the - * actual resources get mapped (not physical addresses) - */ -#define CONFIG_SYS_CCSRBAR_DEFAULT	0xff700000	/* CCSRBAR Default */ -#define CONFIG_SYS_CCSRBAR		0xef000000	/* relocated CCSRBAR */ -#define CONFIG_SYS_CCSRBAR_PHYS	CONFIG_SYS_CCSRBAR	/* physical addr of CCSRBAR */ -#define CONFIG_SYS_IMMR		CONFIG_SYS_CCSRBAR	/* PQII uses CONFIG_SYS_IMMR */ +#define CONFIG_SYS_CCSRBAR		0xef000000 +#define CONFIG_SYS_CCSRBAR_PHYS_LOW	CONFIG_SYS_CCSRBAR  /*   * Diagnostics diff --git a/include/mpc85xx.h b/include/mpc85xx.h index 2495b99c3..11d898527 100644 --- a/include/mpc85xx.h +++ b/include/mpc85xx.h @@ -26,4 +26,46 @@  #define SCCR_DFBRG10    0x00000002      /* BRGCLK division by 64 */  #define SCCR_DFBRG11    0x00000003      /* BRGCLK division by 256 */ +/* + * Define default values for some CCSR macros to make header files cleaner* + * + * To completely disable CCSR relocation in a board header file, define + * CONFIG_SYS_CCSR_DO_NOT_RELOCATE.  This will force CONFIG_SYS_CCSRBAR_PHYS + * to a value that is the same as CONFIG_SYS_CCSRBAR. + */ + +#ifdef CONFIG_SYS_CCSRBAR_PHYS +#error "Do not define CONFIG_SYS_CCSRBAR_PHYS directly.  Use \ +CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead." +#endif + +#ifdef CONFIG_SYS_CCSR_DO_NOT_RELOCATE +#undef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#undef CONFIG_SYS_CCSRBAR_PHYS_LOW +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	0 +#endif + +#ifndef CONFIG_SYS_CCSRBAR +#define CONFIG_SYS_CCSRBAR 		CONFIG_SYS_CCSRBAR_DEFAULT +#endif + +#ifndef CONFIG_SYS_CCSRBAR_PHYS_HIGH +#ifdef CONFIG_PHYS_64BIT +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	0xf +#else +#define CONFIG_SYS_CCSRBAR_PHYS_HIGH	0 +#endif +#endif + +#ifndef CONFIG_SYS_CCSRBAR_PHYS_LOW +#define CONFIG_SYS_CCSRBAR_PHYS_LOW 	CONFIG_SYS_CCSRBAR_DEFAULT +#endif + +#define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ +				 CONFIG_SYS_CCSRBAR_PHYS_LOW) + +#ifndef CONFIG_SYS_IMMR +#define CONFIG_SYS_IMMR 		CONFIG_SYS_CCSRBAR +#endif +  #endif	/* __MPC85xx_H__ */ |