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| author | Scott Wood <scottwood@freescale.com> | 2009-07-16 19:08:04 -0500 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2009-07-17 15:03:28 -0500 |
| commit | 2419169f5749d7af501b3b77a5336d1d535320de (patch) | |
| tree | 1dc7294f29f74ad118b3a4c78c53b2aa4ceba3bd /include/configs/NETVIA.h | |
| parent | be33b046b549ad88c204c209508cd7657232ffbd (diff) | |
| download | olio-uboot-2014.01-2419169f5749d7af501b3b77a5336d1d535320de.tar.xz olio-uboot-2014.01-2419169f5749d7af501b3b77a5336d1d535320de.zip | |
Remove legacy NAND and disk on chip references from boards.
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'include/configs/NETVIA.h')
| -rw-r--r-- | include/configs/NETVIA.h | 74 |
1 files changed, 0 insertions, 74 deletions
diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h index f97bdcb72..b9cf62163 100644 --- a/include/configs/NETVIA.h +++ b/include/configs/NETVIA.h @@ -393,80 +393,6 @@ #endif -/*****************************************************************************/ - -#define CONFIG_NAND_LEGACY - -#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2 - -/* NAND */ -#define CONFIG_SYS_NAND_BASE NAND_BASE -#define CONFIG_MTD_NAND_ECC_JFFS2 - -#define CONFIG_SYS_MAX_NAND_DEVICE 1 - -#define SECTORSIZE 512 -#define ADDR_COLUMN 1 -#define ADDR_PAGE 2 -#define ADDR_COLUMN_PAGE 3 -#define NAND_ChipID_UNKNOWN 0x00 -#define NAND_MAX_FLOORS 1 - -#define NAND_DISABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0040; \ - } while(0) - -#define NAND_ENABLE_CE(nand) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0040; \ - } while(0) - -#define NAND_CTL_CLRALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0100; \ - } while(0) - -#define NAND_CTL_SETALE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0100; \ - } while(0) - -#define NAND_CTL_CLRCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) &= ~0x0080; \ - } while(0) - -#define NAND_CTL_SETCLE(nandptr) \ - do { \ - (((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pddat) |= 0x0080; \ - } while(0) - -#define NAND_WAIT_READY(nand) \ - do { \ - while ((((volatile immap_t *)CONFIG_SYS_IMMR)->im_ioport.iop_pcdat & 0x100) == 0) \ - ; \ - } while (0) - -#define WRITE_NAND_COMMAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND_ADDRESS(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define WRITE_NAND(d, adr) \ - do { \ - *(volatile unsigned char *)((unsigned long)(adr)) = (unsigned char)(d); \ - } while(0) - -#define READ_NAND(adr) \ - ((unsigned char)(*(volatile unsigned char *)(unsigned long)(adr))) - -#endif /*****************************************************************************/ |