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| author | Andy Fleming <afleming@freescale.com> | 2011-03-22 22:49:13 -0500 | 
|---|---|---|
| committer | Andy Fleming <afleming@freescale.com> | 2011-04-20 13:44:46 -0500 | 
| commit | 09c04c20962afd25ce5797e263906f84de5b1f4c (patch) | |
| tree | cecd7d928b0013c746face5ccad4d787222cb242 /drivers/net | |
| parent | 907519108cd6f45aa067feea6fedd2743739342b (diff) | |
| download | olio-uboot-2014.01-09c04c20962afd25ce5797e263906f84de5b1f4c.tar.xz olio-uboot-2014.01-09c04c20962afd25ce5797e263906f84de5b1f4c.zip | |
Remove instances of phy_read/write
There were a few files which were already using phy_read and phy_write
for their PHY function names.  It's only a few places, and the name
seems most appropriate for the high-level abstraction, so let's
rename the other versions to something more specific.
Also, uec_phy.c had a marvell_init function which I renamed to not
conflict with the one in marvell.c
Lastly, uec_phy.c was putting a space between the phy writing
function names, and the open paren, so I fixed that
Signed-off-by: Andy Fleming <afleming@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Diffstat (limited to 'drivers/net')
| -rw-r--r-- | drivers/net/dm9000x.c | 18 | ||||
| -rw-r--r-- | drivers/net/enc28j60.c | 24 | ||||
| -rw-r--r-- | drivers/net/uli526x.c | 24 | 
3 files changed, 34 insertions, 32 deletions
| diff --git a/drivers/net/dm9000x.c b/drivers/net/dm9000x.c index 709f67aac..b5c55738f 100644 --- a/drivers/net/dm9000x.c +++ b/drivers/net/dm9000x.c @@ -110,8 +110,8 @@ static board_info_t dm9000_info;  /* function declaration ------------------------------------- */  static int dm9000_probe(void); -static u16 phy_read(int); -static void phy_write(int, u16); +static u16 dm9000_phy_read(int); +static void dm9000_phy_write(int, u16);  static u8 DM9000_ior(int);  static void DM9000_iow(int reg, u8 value); @@ -361,7 +361,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)  	DM9000_iow(DM9000_IMR, IMR_PAR);  	i = 0; -	while (!(phy_read(1) & 0x20)) {	/* autonegation complete bit */ +	while (!(dm9000_phy_read(1) & 0x20)) {	/* autonegation complete bit */  		udelay(1000);  		i++;  		if (i == 10000) { @@ -371,7 +371,7 @@ static int dm9000_init(struct eth_device *dev, bd_t *bd)  	}  	/* see what we've got */ -	lnk = phy_read(17) >> 12; +	lnk = dm9000_phy_read(17) >> 12;  	printf("operating at ");  	switch (lnk) {  	case 1: @@ -445,7 +445,7 @@ static void dm9000_halt(struct eth_device *netdev)  	DM9000_DBG("%s\n", __func__);  	/* RESET devie */ -	phy_write(0, 0x8000);	/* PHY RESET */ +	dm9000_phy_write(0, 0x8000);	/* PHY RESET */  	DM9000_iow(DM9000_GPR, 0x01);	/* Power-Down PHY */  	DM9000_iow(DM9000_IMR, 0x80);	/* Disable all interrupt */  	DM9000_iow(DM9000_RCR, 0x00);	/* Disable RX */ @@ -581,7 +581,7 @@ DM9000_iow(int reg, u8 value)     Read a word from phyxcer  */  static u16 -phy_read(int reg) +dm9000_phy_read(int reg)  {  	u16 val; @@ -593,7 +593,7 @@ phy_read(int reg)  	val = (DM9000_ior(DM9000_EPDRH) << 8) | DM9000_ior(DM9000_EPDRL);  	/* The read data keeps on REG_0D & REG_0E */ -	DM9000_DBG("phy_read(0x%x): 0x%x\n", reg, val); +	DM9000_DBG("dm9000_phy_read(0x%x): 0x%x\n", reg, val);  	return val;  } @@ -601,7 +601,7 @@ phy_read(int reg)     Write a word to phyxcer  */  static void -phy_write(int reg, u16 value) +dm9000_phy_write(int reg, u16 value)  {  	/* Fill the phyxcer register into REG_0C */ @@ -613,7 +613,7 @@ phy_write(int reg, u16 value)  	DM9000_iow(DM9000_EPCR, 0xa);	/* Issue phyxcer write command */  	udelay(500);			/* Wait write complete */  	DM9000_iow(DM9000_EPCR, 0x0);	/* Clear phyxcer write command */ -	DM9000_DBG("phy_write(reg:0x%x, value:0x%x)\n", reg, value); +	DM9000_DBG("dm9000_phy_write(reg:0x%x, value:0x%x)\n", reg, value);  }  int dm9000_initialize(bd_t *bis) diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index 6c161b632..d55cacdac 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c @@ -314,7 +314,7 @@ static void enc_release_bus(enc_dev_t *enc)  /*   * Read PHY register   */ -static u16 phy_read(enc_dev_t *enc, const u8 addr) +static u16 enc_phy_read(enc_dev_t *enc, const u8 addr)  {  	uint64_t etime;  	u8 status; @@ -339,7 +339,7 @@ static u16 phy_read(enc_dev_t *enc, const u8 addr)  /*   * Write PHY register   */ -static void phy_write(enc_dev_t *enc, const u8 addr, const u16 data) +static void enc_phy_write(enc_dev_t *enc, const u8 addr, const u16 data)  {  	uint64_t etime;  	u8 status; @@ -374,7 +374,7 @@ static int enc_phy_link_wait(enc_dev_t *enc)  #ifdef CONFIG_ENC_SILENTLINK  	/* check if we have a link, then just return */ -	status = phy_read(enc, PHY_REG_PHSTAT1); +	status = enc_phy_read(enc, PHY_REG_PHSTAT1);  	if (status & ENC_PHSTAT1_LLSTAT)  		return 0;  #endif @@ -382,10 +382,10 @@ static int enc_phy_link_wait(enc_dev_t *enc)  	/* wait for link with 1 second timeout */  	etime = get_ticks() + get_tbclk();  	while (get_ticks() <= etime) { -		status = phy_read(enc, PHY_REG_PHSTAT1); +		status = enc_phy_read(enc, PHY_REG_PHSTAT1);  		if (status & ENC_PHSTAT1_LLSTAT) {  			/* now we have a link */ -			status = phy_read(enc, PHY_REG_PHSTAT2); +			status = enc_phy_read(enc, PHY_REG_PHSTAT2);  			duplex = (status & ENC_PHSTAT2_DPXSTAT) ? 1 : 0;  			printf("%s: link up, 10Mbps %s-duplex\n",  				enc->dev->name, duplex ? "full" : "half"); @@ -678,8 +678,8 @@ static int enc_setup(enc_dev_t *enc)  	enc->bank = 0xff;	/* invalidate current bank in enc28j60 */  	/* verify PHY identification */ -	phid1 = phy_read(enc, PHY_REG_PHID1); -	phid2 = phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK; +	phid1 = enc_phy_read(enc, PHY_REG_PHID1); +	phid2 = enc_phy_read(enc, PHY_REG_PHID2) & ENC_PHID2_MASK;  	if (phid1 != ENC_PHID1_VALUE || phid2 != ENC_PHID2_VALUE) {  		printf("%s: failed to identify PHY. Found %04x:%04x\n",  			enc->dev->name, phid1, phid2); @@ -694,7 +694,7 @@ static int enc_setup(enc_dev_t *enc)  	 * Prevent automatic loopback of data beeing transmitted by setting  	 * ENC_PHCON2_HDLDIS  	 */ -	phy_write(enc, PHY_REG_PHCON2, (1<<8)); +	enc_phy_write(enc, PHY_REG_PHCON2, (1<<8));  	/*  	 * LEDs configuration @@ -702,10 +702,10 @@ static int enc_setup(enc_dev_t *enc)  	 * LEDB: LBCFG = 0111 -> display TX & RX activity  	 * STRCH = 1 -> LED pulses  	 */ -	phy_write(enc, PHY_REG_PHLCON, 0x0472); +	enc_phy_write(enc, PHY_REG_PHLCON, 0x0472);  	/* Reset PDPXMD-bit => half duplex */ -	phy_write(enc, PHY_REG_PHCON1, 0); +	enc_phy_write(enc, PHY_REG_PHCON1, 0);  #ifdef CONFIG_USE_IRQ  	/* enable interrupts */ @@ -771,7 +771,7 @@ int enc_miiphy_read(const char *devname, u8 phy_adr, u8 reg, u16 *value)  		enc_release_bus(enc);  		return -1;  	} -	*value = phy_read(enc, reg); +	*value = enc_phy_read(enc, reg);  	enc_release_bus(enc);  	return 0;  } @@ -796,7 +796,7 @@ int enc_miiphy_write(const char *devname, u8 phy_adr, u8 reg, u16 value)  		enc_release_bus(enc);  		return -1;  	} -	phy_write(enc, reg, value); +	enc_phy_write(enc, reg, value);  	enc_release_bus(enc);  	return 0;  } diff --git a/drivers/net/uli526x.c b/drivers/net/uli526x.c index a4624e173..5933bddce 100644 --- a/drivers/net/uli526x.c +++ b/drivers/net/uli526x.c @@ -175,9 +175,9 @@ static u16 read_srom_word(long, int);  static void uli526x_descriptor_init(struct uli526x_board_info *, unsigned long);  static void allocate_rx_buffer(struct uli526x_board_info *);  static void update_cr6(u32, unsigned long); -static u16 phy_read(unsigned long, u8, u8, u32); +static u16 uli_phy_read(unsigned long, u8, u8, u32);  static u16 phy_readby_cr10(unsigned long, u8, u8); -static void phy_write(unsigned long, u8, u8, u16, u32); +static void uli_phy_write(unsigned long, u8, u8, u16, u32);  static void phy_writeby_cr10(unsigned long, u8, u8, u16);  static void phy_write_1bit(unsigned long, u32, u32);  static u16 phy_read_1bit(unsigned long, u32); @@ -349,7 +349,7 @@ static void uli526x_disable(struct eth_device *dev)  		/* Reset & stop ULI526X board */  		outl(ULI526X_RESET, db->ioaddr + DCR0);  		udelay(5); -		phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); +		uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id);  		/* reset the board */  		db->cr6_data &= ~(CR6_RXSC | CR6_TXSC);	/* Disable Tx/Rx */ @@ -385,7 +385,7 @@ static void uli526x_init(struct eth_device *dev)  	db->tx_packet_cnt = 0;  	for (phy_tmp = 0; phy_tmp < 32; phy_tmp++) {  		/* peer add */ -		phy_value = phy_read(db->ioaddr, phy_tmp, 3, db->chip_id); +		phy_value = uli_phy_read(db->ioaddr, phy_tmp, 3, db->chip_id);  		if (phy_value != 0xffff && phy_value != 0) {  			db->phy_addr = phy_tmp;  			break; @@ -404,10 +404,10 @@ static void uli526x_init(struct eth_device *dev)  	if (!(inl(db->ioaddr + DCR12) & 0x8)) {  		/* Phyxcer capability setting */ -		phy_reg_reset = phy_read(db->ioaddr, +		phy_reg_reset = uli_phy_read(db->ioaddr,  			db->phy_addr, 0, db->chip_id);  		phy_reg_reset = (phy_reg_reset | 0x8000); -		phy_write(db->ioaddr, db->phy_addr, 0, +		uli_phy_write(db->ioaddr, db->phy_addr, 0,  			phy_reg_reset, db->chip_id);  		udelay(500); @@ -781,7 +781,8 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)  	u16 phy_reg;  	/* Phyxcer capability setting */ -	phy_reg = phy_read(db->ioaddr, db->phy_addr, 4, db->chip_id) & ~0x01e0; +	phy_reg = uli_phy_read(db->ioaddr, +			db->phy_addr, 4, db->chip_id) & ~0x01e0;  	if (db->media_mode & ULI526X_AUTO) {  		/* AUTO Mode */ @@ -802,10 +803,10 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)  		phy_reg |= db->PHY_reg4;  		db->media_mode |= ULI526X_AUTO;  	} -	phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); +	uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id);  	/* Restart Auto-Negotiation */ -	phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); +	uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id);  	udelay(50);  } @@ -813,7 +814,7 @@ static void uli526x_set_phyxcer(struct uli526x_board_info *db)   *	Write a word to Phy register   */ -static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, +static void uli_phy_write(unsigned long iobase, u8 phy_addr, u8 offset,  	u16 phy_data, u32 chip_id)  {  	u16 i; @@ -862,7 +863,8 @@ static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,   *	Read a word data from phy register   */ -static u16 phy_read(unsigned long iobase, u8 phy_addr, u8 offset, u32 chip_id) +static u16 uli_phy_read(unsigned long iobase, u8 phy_addr, u8 offset, +			u32 chip_id)  {  	int i;  	u16 phy_data; |