diff options
| author | Mike Frysinger <vapier@gentoo.org> | 2008-10-20 13:59:51 -0400 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2009-02-02 12:24:26 -0500 |
| commit | a7ec6ac8b2c6dce6fc670a2a855deb6eee340e04 (patch) | |
| tree | 077f4de4bb6128ff7377f72460ae07f2f685e029 /drivers/net/bfin_mac.c | |
| parent | ac45af4e63ea925f4accc98453aab1a1166c196d (diff) | |
| download | olio-uboot-2014.01-a7ec6ac8b2c6dce6fc670a2a855deb6eee340e04.tar.xz olio-uboot-2014.01-a7ec6ac8b2c6dce6fc670a2a855deb6eee340e04.zip | |
Blackfin: bfin_mac: respect CONFIG_PHY_{ADDR,CLOCK_FREQ}
Rather than having the on-chip MAC hardcoded to phy address 1 and a speed
of 2.5mhz, use these as defaults if the board doesn't specify otherwise.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
Diffstat (limited to 'drivers/net/bfin_mac.c')
| -rw-r--r-- | drivers/net/bfin_mac.c | 15 |
1 files changed, 11 insertions, 4 deletions
diff --git a/drivers/net/bfin_mac.c b/drivers/net/bfin_mac.c index a622ca174..2cdb2f840 100644 --- a/drivers/net/bfin_mac.c +++ b/drivers/net/bfin_mac.c @@ -22,6 +22,13 @@ #include "bfin_mac.h" +#ifndef CONFIG_PHY_ADDR +# define CONFIG_PHY_ADDR 1 +#endif +#ifndef CONFIG_PHY_CLOCK_FREQ +# define CONFIG_PHY_CLOCK_FREQ 2500000 +#endif + #ifdef CONFIG_POST #include <post.h> #endif @@ -265,14 +272,14 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode) /* Odd word alignment for Receive Frame DMA word */ /* Configure checksum support and rcve frame word alignment */ - bfin_write_EMAC_SYSCTL(RXDWA | RXCKS | SET_MDCDIV(MDC_FREQ_TO_DIV(2500000))); + bfin_write_EMAC_SYSCTL(RXDWA | RXCKS | SET_MDCDIV(MDC_FREQ_TO_DIV(CONFIG_PHY_CLOCK_FREQ))); /* turn on auto-negotiation and wait for link to come up */ - bfin_miiphy_write(dev->name, PHYADDR, MII_BMCR, BMCR_ANENABLE); + bfin_miiphy_write(dev->name, CONFIG_PHY_ADDR, MII_BMCR, BMCR_ANENABLE); count = 0; while (1) { ++count; - if (bfin_miiphy_read(dev->name, PHYADDR, MII_BMSR, &phydat)) + if (bfin_miiphy_read(dev->name, CONFIG_PHY_ADDR, MII_BMSR, &phydat)) return -1; if (phydat & BMSR_LSTATUS) break; @@ -284,7 +291,7 @@ static int bfin_miiphy_init(struct eth_device *dev, int *opmode) } /* see what kind of link we have */ - if (bfin_miiphy_read(dev->name, PHYADDR, MII_LPA, &phydat)) + if (bfin_miiphy_read(dev->name, CONFIG_PHY_ADDR, MII_LPA, &phydat)) return -1; if (phydat & LPA_DUPLEX) *opmode = FDMODE; |