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| author | Stefano Babic <sbabic@denx.de> | 2012-11-10 08:05:54 +0100 | 
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2012-11-10 08:05:54 +0100 | 
| commit | 3e4d27b06d7484040355e22eec2cbce7335d6dab (patch) | |
| tree | 9672a2bb2e4ce0edc0ab776ddf0e2ca8e39a5f62 /drivers/mtd/nand/tegra_nand.c | |
| parent | bad05afe083eec0467220de21683443292c5012e (diff) | |
| parent | 59852d03867108217fe88e3bfc3e1e9cedfe63c5 (diff) | |
| download | olio-uboot-2014.01-3e4d27b06d7484040355e22eec2cbce7335d6dab.tar.xz olio-uboot-2014.01-3e4d27b06d7484040355e22eec2cbce7335d6dab.zip | |
Merge git://git.denx.de/u-boot
Diffstat (limited to 'drivers/mtd/nand/tegra_nand.c')
| -rw-r--r-- | drivers/mtd/nand/tegra_nand.c | 36 | 
1 files changed, 36 insertions, 0 deletions
| diff --git a/drivers/mtd/nand/tegra_nand.c b/drivers/mtd/nand/tegra_nand.c index 5408c51ff..4d94cc6f5 100644 --- a/drivers/mtd/nand/tegra_nand.c +++ b/drivers/mtd/nand/tegra_nand.c @@ -219,6 +219,34 @@ static uint8_t read_byte(struct mtd_info *mtd)  }  /** + * Read len bytes from the chip into a buffer + * + * @param mtd	MTD device structure + * @param buf	buffer to store data to + * @param len	number of bytes to read + * + * Read function for 8bit bus-width + */ +static void read_buf(struct mtd_info *mtd, uint8_t *buf, int len) +{ +	int i, s; +	unsigned int reg; +	struct nand_chip *chip = mtd->priv; +	struct nand_drv *info = (struct nand_drv *)chip->priv; + +	for (i = 0; i < len; i += 4) { +		s = (len - i) > 4 ? 4 : len - i; +		writel(CMD_PIO | CMD_RX | CMD_A_VALID | CMD_CE0 | +			((s - 1) << CMD_TRANS_SIZE_SHIFT) | CMD_GO, +			&info->reg->command); +		if (!nand_waitfor_cmd_completion(info->reg)) +			puts("Command timeout during read_buf\n"); +		reg = readl(&info->reg->resp); +		memcpy(buf + i, ®, s); +	} +} + +/**   * Check NAND status to see if it is ready or not   *   * @param mtd	MTD device structure @@ -317,6 +345,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,  	switch (command) {  	case NAND_CMD_READID:  		writel(NAND_CMD_READID, &info->reg->cmd_reg1); +		writel(column & 0xFF, &info->reg->addr_reg1);  		writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_PIO  			| CMD_RX |  			((4 - 1) << CMD_TRANS_SIZE_SHIFT) @@ -324,6 +353,12 @@ static void nand_command(struct mtd_info *mtd, unsigned int command,  			&info->reg->command);  		info->pio_byte_index = 0;  		break; +	case NAND_CMD_PARAM: +		writel(NAND_CMD_PARAM, &info->reg->cmd_reg1); +		writel(column & 0xFF, &info->reg->addr_reg1); +		writel(CMD_GO | CMD_CLE | CMD_ALE | CMD_CE0, +			&info->reg->command); +		break;  	case NAND_CMD_READ0:  		writel(NAND_CMD_READ0, &info->reg->cmd_reg1);  		writel(NAND_CMD_READSTART, &info->reg->cmd_reg2); @@ -976,6 +1011,7 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)  	nand->options = LP_OPTIONS;  	nand->cmdfunc = nand_command;  	nand->read_byte = read_byte; +	nand->read_buf = read_buf;  	nand->ecc.read_page = nand_read_page_hwecc;  	nand->ecc.write_page = nand_write_page_hwecc;  	nand->ecc.read_page_raw = nand_read_page_raw; |