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| author | Sergey Lapin <slapin@ossfans.org> | 2013-01-14 03:46:50 +0000 |
|---|---|---|
| committer | Scott Wood <scottwood@freescale.com> | 2013-05-31 17:12:03 -0500 |
| commit | dfe64e2c89731a3f9950d7acd8681b68df2bae03 (patch) | |
| tree | 880eae93d5f4bd3e9747960eea71502c67e49d8e /drivers/mtd/nand/omap_gpmc.c | |
| parent | a1b81ab26fbbdcbaa6e2a096397c75415181c298 (diff) | |
| download | olio-uboot-2014.01-dfe64e2c89731a3f9950d7acd8681b68df2bae03.tar.xz olio-uboot-2014.01-dfe64e2c89731a3f9950d7acd8681b68df2bae03.zip | |
mtd: resync with Linux-3.7.1
This patch is essentially an update of u-boot MTD subsystem to
the state of Linux-3.7.1 with exclusion of some bits:
- the update is concentrated on NAND, no onenand or CFI/NOR/SPI
flashes interfaces are updated EXCEPT for API changes.
- new large NAND chips support is there, though some updates
have got in Linux-3.8.-rc1, (which will follow on top of this patch).
To produce this update I used tag v3.7.1 of linux-stable repository.
The update was made using application of relevant patches,
with changes relevant to U-Boot-only stuff sticked together
to keep bisectability. Then all changes were grouped together
to this patch.
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
[scottwood@freescale.com: some eccstrength and build fixes]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'drivers/mtd/nand/omap_gpmc.c')
| -rw-r--r-- | drivers/mtd/nand/omap_gpmc.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c index bc1bcad3b..d5f324815 100644 --- a/drivers/mtd/nand/omap_gpmc.c +++ b/drivers/mtd/nand/omap_gpmc.c @@ -590,11 +590,12 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat, * @mtd: mtd info structure * @chip: nand chip info structure * @buf: buffer to store read data + * @oob_required: caller expects OOB data read to chip->oob_poi * @page: page number to read * */ static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip, - uint8_t *buf, int page) + uint8_t *buf, int oob_required, int page) { int i, eccsize = chip->ecc.size; int eccbytes = chip->ecc.bytes; @@ -804,6 +805,7 @@ void omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength) nand->ecc.hwctl = NULL; nand->ecc.correct = NULL; nand->ecc.calculate = NULL; + nand->ecc.strength = eccstrength; /* Setup the ecc configurations again */ if (hardware) { @@ -901,7 +903,7 @@ int board_nand_init(struct nand_chip *nand) nand->IO_ADDR_W = (void __iomem *)&gpmc_cfg->cs[cs].nand_cmd; nand->cmd_ctrl = omap_nand_hwcontrol; - nand->options = NAND_NO_PADDING | NAND_CACHEPRG | NAND_NO_AUTOINCR; + nand->options = NAND_NO_PADDING | NAND_CACHEPRG; /* If we are 16 bit dev, our gpmc config tells us that */ if ((readl(&gpmc_cfg->cs[cs].config1) & 0x3000) == 0x1000) nand->options |= NAND_BUSWIDTH_16; |