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| author | Wolfgang Denk <wd@pollux.(none)> | 2005-12-01 01:38:13 +0100 |
|---|---|---|
| committer | Wolfgang Denk <wd@pollux.(none)> | 2005-12-01 01:38:13 +0100 |
| commit | 4a86d779ff0b2bf9690e50786dece5a689ba3345 (patch) | |
| tree | 3746d8406d5144dc02ef972e69e7c772706f26ca /cpu/ppc4xx/serial.c | |
| parent | b6f8435664db077235be537b64a67d03bd235c32 (diff) | |
| parent | d96f41e0165f1bdc16eacf79ba1654c8f45fa71a (diff) | |
| download | olio-uboot-2014.01-4a86d779ff0b2bf9690e50786dece5a689ba3345.tar.xz olio-uboot-2014.01-4a86d779ff0b2bf9690e50786dece5a689ba3345.zip | |
Merge with /home/sr/git/u-boot
Diffstat (limited to 'cpu/ppc4xx/serial.c')
| -rw-r--r-- | cpu/ppc4xx/serial.c | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c index e06fb0d44..e7f6bcbe1 100644 --- a/cpu/ppc4xx/serial.c +++ b/cpu/ppc4xx/serial.c @@ -276,7 +276,12 @@ int serial_tstc () #define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000200 #define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300 #endif -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) + +#if defined(CONFIG_440SP) +#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600 +#endif + +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) #define CR0_MASK 0xdfffffff #define CR0_EXTCLK_ENA 0x00800000 #define CR0_UDIV_POS 0 @@ -306,14 +311,14 @@ int serial_tstc () #if defined(CONFIG_UART1_CONSOLE) #define ACTING_UART0_BASE UART1_BASE #define ACTING_UART1_BASE UART0_BASE -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) #define UART0_SDR sdr_uart1 #define UART1_SDR sdr_uart0 #endif /* CONFIG_440GX */ #else #define ACTING_UART0_BASE UART0_BASE #define ACTING_UART1_BASE UART1_BASE -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) #define UART0_SDR sdr_uart0 #define UART1_SDR sdr_uart1 #endif /* CONFIG_440GX */ @@ -436,7 +441,7 @@ int serial_init(void) unsigned long tmp; #endif -#if defined(CONFIG_440GX) +#if defined(CONFIG_440GX) || defined(CONFIG_440SP) #if defined(CONFIG_SERIAL_MULTI) if (UART0_BASE == dev_base) { mfsdr(UART0_SDR,reg); @@ -465,7 +470,7 @@ int serial_init(void) serial_divs (gd->baudrate, &udiv, &bdiv); #endif -#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) +#if defined(CONFIG_440GX) || defined(CONFIG_440EP) || defined(CONFIG_440GR) || defined(CONFIG_440SP) reg |= udiv << CR0_UDIV_POS; /* set the UART divisor */ #if defined(CONFIG_SERIAL_MULTI) if (UART0_BASE == dev_base) { |