diff options
| author | wdenk <wdenk> | 2002-12-07 00:20:59 +0000 | 
|---|---|---|
| committer | wdenk <wdenk> | 2002-12-07 00:20:59 +0000 | 
| commit | 7c7a23bd5a0bc149d2edd665ec46381726b24e0c (patch) | |
| tree | d859f82ea2561180db2ffd7569f0b9007d710769 /cpu/mpc824x/drivers/epic/epic1.c | |
| parent | 1f53a41603b9093c59741f4208fef0ab3790d6ce (diff) | |
| download | olio-uboot-2014.01-7c7a23bd5a0bc149d2edd665ec46381726b24e0c.tar.xz olio-uboot-2014.01-7c7a23bd5a0bc149d2edd665ec46381726b24e0c.zip | |
* Patch by Hans-Joerg Frieden, 06 Dec 2002LABEL_2002_12_07_0120
  Fix misc problems with AmigaOne support
* Patch by Chris Hallinan, 3 Dec 2002:
  minor cleanup to the MPC8245 EPIC driver
* Patch by Pierre Aubert , 28 Nov 2002
  Add support for external (SIU) interrupts on MPC8xx
* Patch by Pierre Aubert , 28 Nov 2002
  Fix nested syscalls bug in standalone applications
* Patch by David Müller, 27 Nov 2002:
  fix output of "pciinfo" command for CardBus bridge devices.
* Fix bug in TQM8260 board detection - boards got stuck when board ID
  was not readable
Diffstat (limited to 'cpu/mpc824x/drivers/epic/epic1.c')
| -rw-r--r-- | cpu/mpc824x/drivers/epic/epic1.c | 19 | 
1 files changed, 12 insertions, 7 deletions
| diff --git a/cpu/mpc824x/drivers/epic/epic1.c b/cpu/mpc824x/drivers/epic/epic1.c index 362e12970..eb7ed4017 100644 --- a/cpu/mpc824x/drivers/epic/epic1.c +++ b/cpu/mpc824x/drivers/epic/epic1.c @@ -70,6 +70,10 @@ void epicInit      tmp = sysEUMBBARRead(EPIC_GLOBAL_REG);      tmp |= 0xa0000000;                  /* Set the Global Conf. register */      sysEUMBBARWrite(EPIC_GLOBAL_REG, tmp); +	/* +	 * Wait for EPIC to reset - CLH +	 */ +    while( (sysEUMBBARRead(EPIC_GLOBAL_REG) & 0x80000000) == 1);      sysEUMBBARWrite(EPIC_GLOBAL_REG, 0x20000000);      tmp = sysEUMBBARRead(EPIC_INT_CONF_REG);    /* Read interrupt conf. reg */ @@ -81,7 +85,8 @@ void epicInit          sysEUMBBARWrite(EPIC_INT_CONF_REG, tmp);          } -    while (epicIntAck() != 0xff);       /* Clear all pending interrupts */ +    while (epicIntAck() != 0xff)       /* Clear all pending interrupts */ +		epicEOI();  }  /**************************************************************************** @@ -92,18 +97,18 @@ void epicInit   *   *  RETURNS:  None   */ -void epicIntEnable -    ( -    int intVec        /* Interrupt Vector Number */ -    ) -    { +void epicIntEnable(int intVec) +{      ULONG tmp;      ULONG srAddr;      srAddr = SrcVecTable[intVec].srcAddr;  /* Retrieve src Vec/Prio register */      tmp = sysEUMBBARRead(srAddr); -    tmp &= 0x7fffffff;             /* Clear the mask bit */ +    tmp &= ~EPIC_VEC_PRI_MASK;             /* Clear the mask bit */ +    tmp |= (EPIC_VEC_PRI_DFLT_PRI << 16);   /* Set priority to Default - CLH */ +    tmp |= intVec;				           /* Set Vector number */      sysEUMBBARWrite(srAddr, tmp); +      return;      } |