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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 | 
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 | 
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /cpu/mpc5xxx/pci_mpc5200.c | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | olio-uboot-2014.01-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.xz olio-uboot-2014.01-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip | |
Merge branch 'fixes' into cleanups
Conflicts:
	board/atmel/atngw100/atngw100.c
	board/atmel/atstk1000/atstk1000.c
	cpu/at32ap/at32ap700x/gpio.c
	include/asm-avr32/arch-at32ap700x/clk.h
	include/configs/atngw100.h
	include/configs/atstk1002.h
	include/configs/atstk1003.h
	include/configs/atstk1004.h
	include/configs/atstk1006.h
	include/configs/favr-32-ezkit.h
	include/configs/hammerhead.h
	include/configs/mimc200.h
Diffstat (limited to 'cpu/mpc5xxx/pci_mpc5200.c')
| -rw-r--r-- | cpu/mpc5xxx/pci_mpc5200.c | 10 | 
1 files changed, 5 insertions, 5 deletions
| diff --git a/cpu/mpc5xxx/pci_mpc5200.c b/cpu/mpc5xxx/pci_mpc5200.c index 2f01d5ce9..a3251abf5 100644 --- a/cpu/mpc5xxx/pci_mpc5200.c +++ b/cpu/mpc5xxx/pci_mpc5200.c @@ -31,8 +31,8 @@  #include <mpc5xxx.h>  /* System RAM mapped over PCI */ -#define CONFIG_PCI_MEMORY_BUS	CFG_SDRAM_BASE -#define CONFIG_PCI_MEMORY_PHYS	CFG_SDRAM_BASE +#define CONFIG_PCI_MEMORY_BUS	CONFIG_SYS_SDRAM_BASE +#define CONFIG_PCI_MEMORY_PHYS	CONFIG_SYS_SDRAM_BASE  #define CONFIG_PCI_MEMORY_SIZE	(1024 * 1024 * 1024)  /* PCIIWCR bit fields */ @@ -125,11 +125,11 @@ void pci_mpc5xxx_init (struct pci_controller *hose)  	/* Set cache line size */  	*(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) | -		(CFG_CACHELINE_SIZE / 4); +		(CONFIG_SYS_CACHELINE_SIZE / 4);  	/* Map MBAR to PCI space */ -	*(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR; -	*(vu_long *)MPC5XXX_PCI_TBATR0 = CFG_MBAR | 1; +	*(vu_long *)MPC5XXX_PCI_BAR0 = CONFIG_SYS_MBAR; +	*(vu_long *)MPC5XXX_PCI_TBATR0 = CONFIG_SYS_MBAR | 1;  	/* Map RAM to PCI space */  	*(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3); |