diff options
| author | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2008-10-21 11:43:08 +0200 |
| commit | f61f1e150c84f5b9347fca79a4bc5f2286c545d2 (patch) | |
| tree | ab90f076f18e56b2b3e8c9375b95917daa78c1d9 /cpu/leon3/cpu_init.c | |
| parent | ec081c2c190148b374e86a795fb6b1c49caeb549 (diff) | |
| parent | f82642e33899766892499b163e60560fbbf87773 (diff) | |
| download | olio-uboot-2014.01-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.tar.xz olio-uboot-2014.01-f61f1e150c84f5b9347fca79a4bc5f2286c545d2.zip | |
Merge branch 'master' of /home/stefan/git/u-boot/u-boot
Diffstat (limited to 'cpu/leon3/cpu_init.c')
| -rw-r--r-- | cpu/leon3/cpu_init.c | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/cpu/leon3/cpu_init.c b/cpu/leon3/cpu_init.c index 4fe7d4b8d..be22ec26a 100644 --- a/cpu/leon3/cpu_init.c +++ b/cpu/leon3/cpu_init.c @@ -159,9 +159,9 @@ int init_memory_ctrl() mctrl = (ambapp_dev_mctrl *) base; /* config MCTRL memory controller */ - mctrl->mcfg1 = CFG_GRLIB_MEMCFG1 | (mctrl->mcfg1 & 0x300); - mctrl->mcfg2 = CFG_GRLIB_MEMCFG2; - mctrl->mcfg3 = CFG_GRLIB_MEMCFG3; + mctrl->mcfg1 = CONFIG_SYS_GRLIB_MEMCFG1 | (mctrl->mcfg1 & 0x300); + mctrl->mcfg2 = CONFIG_SYS_GRLIB_MEMCFG2; + mctrl->mcfg3 = CONFIG_SYS_GRLIB_MEMCFG3; not_found_mctrl = 0; } @@ -171,9 +171,9 @@ int init_memory_ctrl() mctrl = (ambapp_dev_mctrl *) base; /* config MCTRL memory controller */ - mctrl->mcfg1 = CFG_GRLIB_FT_MEMCFG1 | (mctrl->mcfg1 & 0x300); - mctrl->mcfg2 = CFG_GRLIB_FT_MEMCFG2; - mctrl->mcfg3 = CFG_GRLIB_FT_MEMCFG3; + mctrl->mcfg1 = CONFIG_SYS_GRLIB_FT_MEMCFG1 | (mctrl->mcfg1 & 0x300); + mctrl->mcfg2 = CONFIG_SYS_GRLIB_FT_MEMCFG2; + mctrl->mcfg3 = CONFIG_SYS_GRLIB_FT_MEMCFG3; not_found_mctrl = 0; } @@ -183,7 +183,7 @@ int init_memory_ctrl() sdctrl = (ambapp_dev_sdctrl *) base; /* config memory controller */ - sdctrl->sdcfg = CFG_GRLIB_SDRAM; + sdctrl->sdcfg = CONFIG_SYS_GRLIB_SDRAM; not_found_mctrl = 0; } @@ -192,8 +192,8 @@ int init_memory_ctrl() ddr2spa = (ambapp_dev_ddr2spa *) ambapp_ahb_get_info(ahb, 1); /* Config DDR2 memory controller */ - ddr2spa->cfg1 = CFG_GRLIB_DDR2_CFG1; - ddr2spa->cfg3 = CFG_GRLIB_DDR2_CFG3; + ddr2spa->cfg1 = CONFIG_SYS_GRLIB_DDR2_CFG1; + ddr2spa->cfg3 = CONFIG_SYS_GRLIB_DDR2_CFG3; not_found_mctrl = 0; } @@ -202,7 +202,7 @@ int init_memory_ctrl() ddrspa = (ambapp_dev_ddrspa *) ambapp_ahb_get_info(ahb, 1); /* Config DDR memory controller */ - ddrspa->ctrl = CFG_GRLIB_DDR_CFG; + ddrspa->ctrl = CONFIG_SYS_GRLIB_DDR_CFG; not_found_mctrl = 0; } |