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| author | wdenk <wdenk> | 2004-03-23 22:14:11 +0000 | 
|---|---|---|
| committer | wdenk <wdenk> | 2004-03-23 22:14:11 +0000 | 
| commit | 4b9206ed51a3e3dc06dca2a3930a24e4f0025f3d (patch) | |
| tree | 2eb73ab74a66356c52d588bb06f803af55897e18 /common/miiphyutil.c | |
| parent | 109c0e3ad32428dd65ed89f882faf59e30132494 (diff) | |
| download | olio-uboot-2014.01-4b9206ed51a3e3dc06dca2a3930a24e4f0025f3d.tar.xz olio-uboot-2014.01-4b9206ed51a3e3dc06dca2a3930a24e4f0025f3d.zip | |
* Patches by Thomas Viehweger, 16 Mar 2004:
  - show PCI clock frequency on MPC8260 systems
  - add FCC_PSMR_RMII flag for HiP7 processors
  - in do_jffs2_fsload(), take load address from load_addr if not set
    explicit, update load_addr otherwise
  - replaced printf by putc/puts when no formatting is needed
    (smaller code size, faster execution)
Diffstat (limited to 'common/miiphyutil.c')
| -rw-r--r-- | common/miiphyutil.c | 16 | 
1 files changed, 8 insertions, 8 deletions
| diff --git a/common/miiphyutil.c b/common/miiphyutil.c index b45ab0615..f6436cf24 100644 --- a/common/miiphyutil.c +++ b/common/miiphyutil.c @@ -51,7 +51,7 @@ int miiphy_info (unsigned char addr,  	if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {  #ifdef DEBUG -		printf ("PHY ID register 2 read failed\n"); +		puts ("PHY ID register 2 read failed\n");  #endif  		return (-1);  	} @@ -67,7 +67,7 @@ int miiphy_info (unsigned char addr,  	if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {  #ifdef DEBUG -		printf ("PHY ID register 1 read failed\n"); +		puts ("PHY ID register 1 read failed\n");  #endif  		return (-1);  	} @@ -95,7 +95,7 @@ int miiphy_reset (unsigned char addr)  	if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {  #ifdef DEBUG -		printf ("PHY reset failed\n"); +		puts ("PHY reset failed\n");  #endif  		return (-1);  	} @@ -112,7 +112,7 @@ int miiphy_reset (unsigned char addr)  	while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {  		if (miiphy_read (addr, PHY_BMCR, ®) != 0) {  #     ifdef DEBUG -			printf ("PHY status read failed\n"); +			puts ("PHY status read failed\n");  #     endif  			return (-1);  		} @@ -120,7 +120,7 @@ int miiphy_reset (unsigned char addr)  	if ((reg & 0x8000) == 0) {  		return (0);  	} else { -		printf ("PHY reset timed out\n"); +		puts ("PHY reset timed out\n");  		return (-1);  	}  	return (0); @@ -146,7 +146,7 @@ int miiphy_speed (unsigned char addr)  	}  	if (miiphy_read (addr, PHY_ANLPAR, ®)) { -		printf ("PHY speed1 read failed, assuming 10bT\n"); +		puts ("PHY speed1 read failed, assuming 10bT\n");  		return (_10BASET);  	}  	if ((reg & PHY_ANLPAR_100) != 0) { @@ -180,7 +180,7 @@ int miiphy_duplex (unsigned char addr)  	}  	if (miiphy_read (addr, PHY_ANLPAR, ®)) { -		printf ("PHY duplex read failed, assuming half duplex\n"); +		puts ("PHY duplex read failed, assuming half duplex\n");  		return (HALF);  	} @@ -201,7 +201,7 @@ int miiphy_link (unsigned char addr)  	unsigned short reg;  	if (miiphy_read (addr, PHY_BMSR, ®)) { -		printf ("PHY_BMSR read failed, assuming no link\n"); +		puts ("PHY_BMSR read failed, assuming no link\n");  		return (0);  	} |