diff options
| author | Matthias Fuchs <matthias.fuchs@esd.eu> | 2013-08-07 12:10:38 +0200 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-08-20 11:35:24 -0400 |
| commit | 3fb858891273945ce2238e6d4dac3363a1fb0853 (patch) | |
| tree | ee86943cebf490244fed648f69425438c3c39b95 /common/cmd_bdinfo.c | |
| parent | fb8f4fd3af6602320525894964ea5acd42fe51b8 (diff) | |
| download | olio-uboot-2014.01-3fb858891273945ce2238e6d4dac3363a1fb0853.tar.xz olio-uboot-2014.01-3fb858891273945ce2238e6d4dac3363a1fb0853.zip | |
ppc4xx: Remove support for PPC405CR CPUs
This patch removes support for the APM 405CR CPU.
This CPU is EOL and no board uses this chip.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Diffstat (limited to 'common/cmd_bdinfo.c')
| -rw-r--r-- | common/cmd_bdinfo.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c index af884b8a6..713de1464 100644 --- a/common/cmd_bdinfo.c +++ b/common/cmd_bdinfo.c @@ -92,7 +92,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_num("immr_base", bd->bi_immr_base); #endif print_num("bootflags", bd->bi_bootflags); -#if defined(CONFIG_405CR) || defined(CONFIG_405EP) || \ +#if defined(CONFIG_405EP) || \ defined(CONFIG_405GP) || \ defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ defined(CONFIG_440GR) || defined(CONFIG_440GRX) || \ @@ -106,7 +106,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) defined(CONFIG_440SPE) || defined(CONFIG_XILINX_405) print_mhz("pci_busfreq", bd->bi_pci_busfreq); #endif -#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ +#else /* ! CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ #if defined(CONFIG_CPM2) print_mhz("vco", bd->bi_vco); print_mhz("sccfreq", bd->bi_sccfreq); @@ -117,7 +117,7 @@ int do_bdinfo(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) print_mhz("cpmfreq", bd->bi_cpmfreq); #endif print_mhz("busfreq", bd->bi_busfreq); -#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ +#endif /* CONFIG_405GP, CONFIG_405EP, CONFIG_XILINX_405, CONFIG_440EP CONFIG_440GR */ #ifdef CONFIG_ENABLE_36BIT_PHYS #ifdef CONFIG_PHYS_64BIT |