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| author | wdenk <wdenk> | 2003-10-09 20:09:04 +0000 | 
|---|---|---|
| committer | wdenk <wdenk> | 2003-10-09 20:09:04 +0000 | 
| commit | 5da627a424b3ad2d38a81886ba4a18e5123a6788 (patch) | |
| tree | 13d274effe8b9c740a07f4cb47989f3215c20bb4 /common/altera.c | |
| parent | 15647dc7fd86bbaeb68740929ecb9f8473c7ceae (diff) | |
| download | olio-uboot-2014.01-5da627a424b3ad2d38a81886ba4a18e5123a6788.tar.xz olio-uboot-2014.01-5da627a424b3ad2d38a81886ba4a18e5123a6788.zip | |
* Patch by Steven Scholz, 10 Oct 2003LABEL_2003_10_09_2320
  - Add support for Altera FPGA ACEX1K
* Patches by Thomas Lange, 09 Oct 2003:
  - Endian swap ATA identity for all big endian CPUs, not just PPC
  - MIPS only: New option CONFIG_MEMSIZE_IN_BYTES for passing memsize
    args to linux
  - add support for dbau1x00 board (MIPS32)
Diffstat (limited to 'common/altera.c')
| -rw-r--r-- | common/altera.c | 193 | 
1 files changed, 176 insertions, 17 deletions
| diff --git a/common/altera.c b/common/altera.c index beb0147b4..31b3728ef 100644 --- a/common/altera.c +++ b/common/altera.c @@ -1,4 +1,7 @@  /* + * (C) Copyright 2003 + * Steven Scholz, imc Measurement & Control, steven.scholz@imc-berlin.de + *   * (C) Copyright 2002   * Rich Ireland, Enterasys Networks, rireland@enterasys.com.   * @@ -23,20 +26,13 @@   */  /* - * Note that this is just boilerplate - there is no Altera support yet. - */ - - -/*   *  Altera FPGA support   */  #include <common.h> -#include <fpga.h>                     /* Generic FPGA support  */ -#include <altera.h>                   /* Altera specific stuff */ +#include <ACEX1K.h> -#if 0 -#define FPGA_DEBUG -#endif +/* Define FPGA_DEBUG to get debug printf's */ +/* #define FPGA_DEBUG */  #ifdef	FPGA_DEBUG  #define	PRINTF(fmt,args...)	printf (fmt ,##args) @@ -46,28 +42,191 @@  #if (CONFIG_FPGA & CFG_FPGA_ALTERA) +/* Local Static Functions */ +static int altera_validate (Altera_desc * desc, char *fn); +  /* ------------------------------------------------------------------------- */  int altera_load( Altera_desc *desc, void *buf, size_t bsize )  { -	printf( "No support for Altera devices yet.\n" ); -	return FPGA_FAIL; +	int ret_val = FPGA_FAIL;	/* assume a failure */ + +	if (!altera_validate (desc, __FUNCTION__)) { +		printf ("%s: Invalid device descriptor\n", __FUNCTION__); +	} else { +		switch (desc->family) { +		case Altera_ACEX1K: +#if (CONFIG_FPGA & CFG_ACEX1K) +			PRINTF ("%s: Launching the ACEX1K Loader...\n", +					__FUNCTION__); +			ret_val = ACEX1K_load (desc, buf, bsize); +#else +			printf ("%s: No support for ACEX1K devices.\n", +					__FUNCTION__); +#endif +			break; + +		default: +			printf ("%s: Unsupported family type, %d\n", +					__FUNCTION__, desc->family); +		} +	} + +	return ret_val;  }  int altera_dump( Altera_desc *desc, void *buf, size_t bsize )  { -	printf( "No support for Altera devices yet.\n" ); -	return FPGA_FAIL; +	int ret_val = FPGA_FAIL;	/* assume a failure */ + +	if (!altera_validate (desc, __FUNCTION__)) { +		printf ("%s: Invalid device descriptor\n", __FUNCTION__); +	} else { +		switch (desc->family) { +		case Altera_ACEX1K: +#if (CONFIG_FPGA & CFG_ACEX) +			PRINTF ("%s: Launching the ACEX1K Reader...\n", +					__FUNCTION__); +			ret_val = ACEX1K_dump (desc, buf, bsize); +#else +			printf ("%s: No support for ACEX1K devices.\n", +					__FUNCTION__); +#endif +			break; + +		default: +			printf ("%s: Unsupported family type, %d\n", +					__FUNCTION__, desc->family); +		} +	} + +	return ret_val;  }  int altera_info( Altera_desc *desc )  { -	printf( "No support for Altera devices yet.\n" ); -	return FPGA_FAIL; +	int ret_val = FPGA_FAIL; + +	if (altera_validate (desc, __FUNCTION__)) { +		printf ("Family:        \t"); +		switch (desc->family) { +		case Altera_ACEX1K: +			printf ("ACEX1K\n"); +			break; +			/* Add new family types here */ +		default: +			printf ("Unknown family type, %d\n", desc->family); +		} + +		printf ("Interface type:\t"); +		switch (desc->iface) { +		case passive_serial: +			printf ("Passive Serial (PS)\n"); +			break; +		case passive_parallel_synchronous: +			printf ("Passive Parallel Synchronous (PPS)\n"); +			break; +		case passive_parallel_asynchronous: +			printf ("Passive Parallel Asynchronous (PPA)\n"); +			break; +		case passive_serial_asynchronous: +			printf ("Passive Serial Asynchronous (PSA)\n"); +			break; +		case altera_jtag_mode:		/* Not used */ +			printf ("JTAG Mode\n"); +			break; +			/* Add new interface types here */ +		default: +			printf ("Unsupported interface type, %d\n", desc->iface); +		} + +		printf ("Device Size:   \t%d bytes\n" +				"Cookie:        \t0x%x (%d)\n", +				desc->size, desc->cookie, desc->cookie); + +		if (desc->iface_fns) { +			printf ("Device Function Table @ 0x%p\n", desc->iface_fns); +			switch (desc->family) { +			case Altera_ACEX1K: +#if (CONFIG_FPGA & CFG_ACEX1K) +				ACEX1K_info (desc); +#else +				/* just in case */ +				printf ("%s: No support for ACEX1K devices.\n", +						__FUNCTION__); +#endif +				break; +				/* Add new family types here */ +			default: +				/* we don't need a message here - we give one up above */ +			} +		} else { +			printf ("No Device Function Table.\n"); +		} + +		ret_val = FPGA_SUCCESS; +	} else { +		printf ("%s: Invalid device descriptor\n", __FUNCTION__); +	} + +	return ret_val; +} + +int altera_reloc( Altera_desc *desc, ulong reloc_offset) +{ +	int ret_val = FPGA_FAIL;	/* assume a failure */ + +	if (!altera_validate (desc, __FUNCTION__)) { +		printf ("%s: Invalid device descriptor\n", __FUNCTION__); +	} else { +		switch (desc->family) { +		case Altera_ACEX1K: +#if (CONFIG_FPGA & CFG_ACEX1K) +			ret_val = ACEX1K_reloc (desc, reloc_offset); +#else +			printf ("%s: No support for ACEX devices.\n", +					__FUNCTION__); +#endif +			break; +			/* Add new family types here */ +		default: +			printf ("%s: Unsupported family type, %d\n", +					__FUNCTION__, desc->family); +		} +	} + +	return ret_val;  }  /* ------------------------------------------------------------------------- */ +static int altera_validate (Altera_desc * desc, char *fn) +{ +	int ret_val = FALSE; + +	if (desc) { +		if ((desc->family > min_altera_type) && +			(desc->family < max_altera_type)) { +			if ((desc->iface > min_altera_iface_type) && +				(desc->iface < max_altera_iface_type)) { +				if (desc->size) { +					ret_val = TRUE; +				} else { +					printf ("%s: NULL part size\n", fn); +				} +			} else { +				printf ("%s: Invalid Interface type, %d\n", +					fn, desc->iface); +			} +		} else { +			printf ("%s: Invalid family type, %d\n", fn, desc->family); +		} +	} else { +		printf ("%s: NULL descriptor!\n", fn); +	} + +	return ret_val; +}  /* ------------------------------------------------------------------------- */ -#endif  /* CONFIG_FPGA & CFG_FPGA_ALTERA */ +#endif /* CONFIG_FPGA & CFG_FPGA_ALTERA */ |