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| author | Wolfgang Denk <wd@denx.de> | 2008-09-09 02:24:51 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2008-09-09 02:24:51 +0200 |
| commit | ab00e7a23e088505b22cba7b84145806129b83bf (patch) | |
| tree | 5acdfb4c2b87058d132dc8fe9fb81d394cb034bd /board/xilinx/ppc440-generic/xparameters.h | |
| parent | 4d2ae70e8c31c22e5710df5ff236b5565ea2cf2c (diff) | |
| parent | 5ff889349d2ace13f10c9335e09365fcec8247cc (diff) | |
| download | olio-uboot-2014.01-ab00e7a23e088505b22cba7b84145806129b83bf.tar.xz olio-uboot-2014.01-ab00e7a23e088505b22cba7b84145806129b83bf.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx
Conflicts:
Makefile
Signed-off-by: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'board/xilinx/ppc440-generic/xparameters.h')
| -rw-r--r-- | board/xilinx/ppc440-generic/xparameters.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/board/xilinx/ppc440-generic/xparameters.h b/board/xilinx/ppc440-generic/xparameters.h new file mode 100644 index 000000000..1992fff22 --- /dev/null +++ b/board/xilinx/ppc440-generic/xparameters.h @@ -0,0 +1,34 @@ +/* + * (C) Copyright 2008 + * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es + * This work has been supported by: QTechnology http://qtec.com/ + * based on xparameters-ml507.h by Xilinx + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. +*/ + +#ifndef XPARAMETER_H +#define XPARAMETER_H + +#define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 +#define XPAR_IIC_EEPROM_BASEADDR 0x81600000 +#define XPAR_INTC_0_BASEADDR 0x81800000 +#define XPAR_UARTLITE_0_BASEADDR 0x84000000 +#define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 +#define XPAR_PLB_CLOCK_FREQ_HZ 100000000 +#define XPAR_CORE_CLOCK_FREQ_HZ 400000000 +#define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 +#define XPAR_UARTLITE_0_BAUDRATE 9600 + +#endif |