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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/icecube/icecube.c | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | olio-uboot-2014.01-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.xz olio-uboot-2014.01-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/icecube/icecube.c')
| -rw-r--r-- | board/icecube/icecube.c | 39 |
1 files changed, 23 insertions, 16 deletions
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c index 760db7368..75244610c 100644 --- a/board/icecube/icecube.c +++ b/board/icecube/icecube.c @@ -29,6 +29,7 @@ #include <pci.h> #include <asm/processor.h> #include <libfdt.h> +#include <netdev.h> #if defined(CONFIG_LITE5200B) #include "mt46v32m16.h" @@ -86,7 +87,7 @@ void lite5200b_wakeup(void) #define lite5200b_wakeup() #endif -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT static void sdram_start (int hi_addr) { long hi_addr_bit = hi_addr ? 0x01000000 : 0; @@ -129,7 +130,7 @@ static void sdram_start (int hi_addr) /* * ATTENTION: Although partially referenced initdram does NOT make real use - * use of CFG_SDRAM_BASE. The code does not work if CFG_SDRAM_BASE + * use of CONFIG_SYS_SDRAM_BASE. The code does not work if CONFIG_SYS_SDRAM_BASE * is something else than 0x00000000. */ @@ -140,7 +141,7 @@ phys_size_t initdram (int board_type) ulong dramsize2 = 0; uint svr, pvr; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT ulong test1, test2; /* setup SDRAM chip selects */ @@ -161,9 +162,9 @@ phys_size_t initdram (int board_type) /* find RAM size using SDRAM CS0 only */ sdram_start(0); - test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); sdram_start(1); - test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); if (test1 > test2) { sdram_start(0); dramsize = test1; @@ -189,10 +190,10 @@ phys_size_t initdram (int board_type) /* find RAM size using SDRAM CS1 only */ if (!dramsize) sdram_start(0); - test2 = test1 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + test2 = test1 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000); if (!dramsize) { sdram_start(1); - test2 = get_ram_size((long *)(CFG_SDRAM_BASE + dramsize), 0x80000000); + test2 = get_ram_size((long *)(CONFIG_SYS_SDRAM_BASE + dramsize), 0x80000000); } if (test1 > test2) { sdram_start(0); @@ -214,7 +215,7 @@ phys_size_t initdram (int board_type) *(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */ } -#else /* CFG_RAMBOOT */ +#else /* CONFIG_SYS_RAMBOOT */ /* retrieve size of memory connected to SDRAM CS0 */ dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF; @@ -232,7 +233,7 @@ phys_size_t initdram (int board_type) dramsize2 = 0; } -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ /* * On MPC5200B we need to set the special configuration delay in the @@ -262,7 +263,7 @@ phys_size_t initdram (int board_type) phys_size_t initdram (int board_type) { ulong dramsize = 0; -#ifndef CFG_RAMBOOT +#ifndef CONFIG_SYS_RAMBOOT ulong test1, test2; /* setup and enable SDRAM chip selects */ @@ -281,9 +282,9 @@ phys_size_t initdram (int board_type) /* find RAM size */ sdram_start(0); - test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test1 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); sdram_start(1); - test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000); + test2 = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, 0x80000000); if (test1 > test2) { sdram_start(0); dramsize = test1; @@ -294,12 +295,12 @@ phys_size_t initdram (int board_type) /* set SDRAM end address according to size */ *(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15); -#else /* CFG_RAMBOOT */ +#else /* CONFIG_SYS_RAMBOOT */ /* Retrieve amount of SDRAM available */ dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15); -#endif /* CFG_RAMBOOT */ +#endif /* CONFIG_SYS_RAMBOOT */ return dramsize; } @@ -339,9 +340,9 @@ void flash_afterinit(ulong size) { if (size == 0x800000) { /* adjust mapping */ *(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START = - START_REG(CFG_BOOTCS_START | size); + START_REG(CONFIG_SYS_BOOTCS_START | size); *(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP = - STOP_REG(CFG_BOOTCS_START | size, size); + STOP_REG(CONFIG_SYS_BOOTCS_START | size, size); } } @@ -390,3 +391,9 @@ ft_board_setup(void *blob, bd_t *bd) ft_cpu_setup(blob, bd); } #endif + +int board_eth_init(bd_t *bis) +{ + cpu_eth_init(bis); /* Built in FEC comes first */ + return pci_eth_init(bis); +} |