diff options
| author | Kumar Gala <galak@kernel.crashing.org> | 2008-10-21 08:28:33 -0500 | 
|---|---|---|
| committer | Andrew Fleming-AFLEMING <afleming@freescale.com> | 2008-10-24 17:35:12 -0500 | 
| commit | 2dba0dea98c0dee1799ffd6fd6eb541645dbbd98 (patch) | |
| tree | 3ba0234bcfc50ee0338995a9acaab7c80e36fc8d /board/freescale | |
| parent | a2aab460727e5f674353a83a81000ef794bffcae (diff) | |
| download | olio-uboot-2014.01-2dba0dea98c0dee1799ffd6fd6eb541645dbbd98.tar.xz olio-uboot-2014.01-2dba0dea98c0dee1799ffd6fd6eb541645dbbd98.zip | |
85xx: Convert all fsl_pci_init users to new APIs
Converted ATUM8548, MPC8536DS, MPC8544DS, MPC8548CDS, MPC8568MDS,
MPC8572DS, TQM85xx, and SBC8548 to use fsl_pci_setup_inbound_windows()
and ft_fsl_pci_setup().
With these changes the board code is a bit smaller and we get dma-ranges
set in the device tree for these boards.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Andrew Fleming-AFLEMING <afleming@freescale.com>
Diffstat (limited to 'board/freescale')
| -rw-r--r-- | board/freescale/mpc8536ds/mpc8536ds.c | 110 | ||||
| -rw-r--r-- | board/freescale/mpc8544ds/mpc8544ds.c | 109 | ||||
| -rw-r--r-- | board/freescale/mpc8548cds/mpc8548cds.c | 57 | ||||
| -rw-r--r-- | board/freescale/mpc8568mds/mpc8568mds.c | 56 | ||||
| -rw-r--r-- | board/freescale/mpc8572ds/mpc8572ds.c | 72 | 
5 files changed, 135 insertions, 269 deletions
| diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c index f357826fd..2978b7d77 100644 --- a/board/freescale/mpc8536ds/mpc8536ds.c +++ b/board/freescale/mpc8536ds/mpc8536ds.c @@ -155,6 +155,9 @@ static struct pci_controller pcie2_hose;  static struct pci_controller pcie3_hose;  #endif +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); +  int first_free_busno=0;  void @@ -181,10 +184,10 @@ pci_init_board(void)  #ifdef CONFIG_PCIE3  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie3_hose;  	int pcie_ep = (host_agent == 1);  	int pcie_configured  = (io_sel == 7); +	struct pci_region *r = hose->regions;  	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  		printf ("\n    PCIE3 connected to Slot3 as %s (base address %x)", @@ -197,27 +200,23 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE3_MEM_BASE,  			       CONFIG_SYS_PCIE3_MEM_PHYS,  			       CONFIG_SYS_PCIE3_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE3_IO_BASE,  			       CONFIG_SYS_PCIE3_IO_PHYS,  			       CONFIG_SYS_PCIE3_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3; +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -239,11 +238,11 @@ pci_init_board(void)  #ifdef CONFIG_PCIE1   {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie1_hose;  	int pcie_ep = (host_agent == 5);  	int pcie_configured  = (io_sel == 2 || io_sel == 3  				|| io_sel == 5 || io_sel == 7); +	struct pci_region *r = hose->regions;  	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  		printf ("\n    PCIE1 connected to Slot1 as %s (base address %x)", @@ -256,36 +255,31 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_MEM_BASE,  			       CONFIG_SYS_PCIE1_MEM_PHYS,  			       CONFIG_SYS_PCIE1_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_IO_BASE,  			       CONFIG_SYS_PCIE1_IO_PHYS,  			       CONFIG_SYS_PCIE1_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3;  #ifdef CONFIG_SYS_PCIE1_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_MEM_BASE2,  			       CONFIG_SYS_PCIE1_MEM_PHYS2,  			       CONFIG_SYS_PCIE1_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -308,10 +302,10 @@ pci_init_board(void)  #ifdef CONFIG_PCIE2   {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie2_hose;  	int pcie_ep = (host_agent == 3);  	int pcie_configured  = (io_sel == 5 || io_sel == 7); +	struct pci_region *r = hose->regions;  	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  		printf ("\n    PCIE2 connected to Slot 2 as %s (base address %x)", @@ -324,36 +318,31 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE2_MEM_BASE,  			       CONFIG_SYS_PCIE2_MEM_PHYS,  			       CONFIG_SYS_PCIE2_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE2_IO_BASE,  			       CONFIG_SYS_PCIE2_IO_PHYS,  			       CONFIG_SYS_PCIE2_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3;  #ifdef CONFIG_SYS_PCIE2_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE2_MEM_BASE2,  			       CONFIG_SYS_PCIE2_MEM_PHYS2,  			       CONFIG_SYS_PCIE2_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -375,8 +364,8 @@ pci_init_board(void)  #ifdef CONFIG_PCI1  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pci1_hose; +	struct pci_region *r = hose->regions;  	uint pci_agent = (host_agent == 6);  	uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */ @@ -397,35 +386,31 @@ pci_init_board(void)  			);  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_MEM_BASE,  			       CONFIG_SYS_PCI1_MEM_PHYS,  			       CONFIG_SYS_PCI1_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_IO_BASE,  			       CONFIG_SYS_PCI1_IO_PHYS,  			       CONFIG_SYS_PCI1_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3; +  #ifdef CONFIG_SYS_PCI1_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_MEM_BASE2,  			       CONFIG_SYS_PCI1_MEM_PHYS2,  			       CONFIG_SYS_PCI1_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -660,45 +645,24 @@ int board_eth_init(bd_t *bis)  }  #if defined(CONFIG_OF_BOARD_SETUP) -void -ft_board_setup(void *blob, bd_t *bd) -{ -	int node, tmp[2]; -	const char *path; +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, +                        struct pci_controller *hose); +void ft_board_setup(void *blob, bd_t *bd) +{  	ft_cpu_setup(blob, bd); -	node = fdt_path_offset(blob, "/aliases"); -	tmp[0] = 0; -	if (node >= 0) {  #ifdef CONFIG_PCI1 -		path = fdt_getprop(blob, node, "pci0", NULL); -		if (path) { -			tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci0", &pci1_hose);  #endif  #ifdef CONFIG_PCIE2 -		path = fdt_getprop(blob, node, "pci1", NULL); -		if (path) { -			tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);  #endif -#ifdef CONFIG_PCIE1 -		path = fdt_getprop(blob, node, "pci2", NULL); -		if (path) { -			tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +#ifdef CONFIG_PCIE2 +	ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);  #endif -#ifdef CONFIG_PCIE3 -		path = fdt_getprop(blob, node, "pci3", NULL); -		if (path) { -			tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +#ifdef CONFIG_PCIE1 +	ft_fsl_pci_setup(blob, "pci3", &pcie3_hose);  #endif -	}  }  #endif diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c index 826180c2d..600d606db 100644 --- a/board/freescale/mpc8544ds/mpc8544ds.c +++ b/board/freescale/mpc8544ds/mpc8544ds.c @@ -103,6 +103,9 @@ static struct pci_controller pcie2_hose;  static struct pci_controller pcie3_hose;  #endif +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); +  int first_free_busno=0;  void @@ -126,10 +129,10 @@ pci_init_board(void)  #ifdef CONFIG_PCIE3  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie3_hose;  	int pcie_ep = (host_agent == 1);  	int pcie_configured  = io_sel >= 1; +	struct pci_region *r = hose->regions;  	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  		printf ("\n    PCIE3 connected to ULI as %s (base address %x)", @@ -142,36 +145,31 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE3_MEM_BASE,  			       CONFIG_SYS_PCIE3_MEM_PHYS,  			       CONFIG_SYS_PCIE3_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE3_IO_BASE,  			       CONFIG_SYS_PCIE3_IO_PHYS,  			       CONFIG_SYS_PCIE3_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3;  #ifdef CONFIG_SYS_PCIE3_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE3_MEM_BASE2,  			       CONFIG_SYS_PCIE3_MEM_PHYS2,  			       CONFIG_SYS_PCIE3_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -198,10 +196,10 @@ pci_init_board(void)  #ifdef CONFIG_PCIE1   {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie1_hose;  	int pcie_ep = (host_agent == 5);  	int pcie_configured  = io_sel & 6; +	struct pci_region *r = hose->regions;  	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  		printf ("\n    PCIE1 connected to Slot2 as %s (base address %x)", @@ -214,36 +212,31 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_MEM_BASE,  			       CONFIG_SYS_PCIE1_MEM_PHYS,  			       CONFIG_SYS_PCIE1_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_IO_BASE,  			       CONFIG_SYS_PCIE1_IO_PHYS,  			       CONFIG_SYS_PCIE1_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3;  #ifdef CONFIG_SYS_PCIE1_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_MEM_BASE2,  			       CONFIG_SYS_PCIE1_MEM_PHYS2,  			       CONFIG_SYS_PCIE1_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -266,10 +259,10 @@ pci_init_board(void)  #ifdef CONFIG_PCIE2   {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie2_hose;  	int pcie_ep = (host_agent == 3);  	int pcie_configured  = io_sel & 4; +	struct pci_region *r = hose->regions;  	if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  		printf ("\n    PCIE2 connected to Slot 1 as %s (base address %x)", @@ -282,36 +275,31 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE2_MEM_BASE,  			       CONFIG_SYS_PCIE2_MEM_PHYS,  			       CONFIG_SYS_PCIE2_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE2_IO_BASE,  			       CONFIG_SYS_PCIE2_IO_PHYS,  			       CONFIG_SYS_PCIE2_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3;  #ifdef CONFIG_SYS_PCIE2_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE2_MEM_BASE2,  			       CONFIG_SYS_PCIE2_MEM_PHYS2,  			       CONFIG_SYS_PCIE2_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -333,8 +321,8 @@ pci_init_board(void)  #ifdef CONFIG_PCI1  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pci1_hose; +	struct pci_region *r = hose->regions;  	uint pci_agent = (host_agent == 6);  	uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */ @@ -355,35 +343,31 @@ pci_init_board(void)  			);  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_MEM_BASE,  			       CONFIG_SYS_PCI1_MEM_PHYS,  			       CONFIG_SYS_PCI1_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_IO_BASE,  			       CONFIG_SYS_PCI1_IO_PHYS,  			       CONFIG_SYS_PCI1_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3; +  #ifdef CONFIG_SYS_PCIE3_MEM_BASE2  		/* outbound memory */ -		pci_set_region(hose->regions + 3, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE3_MEM_BASE2,  			       CONFIG_SYS_PCIE3_MEM_PHYS2,  			       CONFIG_SYS_PCIE3_MEM_SIZE2,  			       PCI_REGION_MEM); -		hose->region_count++;  #endif +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -503,46 +487,25 @@ int board_eth_init(bd_t *bis)  }  #if defined(CONFIG_OF_BOARD_SETUP) +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, +                        struct pci_controller *hose); -void -ft_board_setup(void *blob, bd_t *bd) +void ft_board_setup(void *blob, bd_t *bd)  { -	int node, tmp[2]; -	const char *path; -  	ft_cpu_setup(blob, bd); -	node = fdt_path_offset(blob, "/aliases"); -	tmp[0] = 0; -	if (node >= 0) { +  #ifdef CONFIG_PCI1 -		path = fdt_getprop(blob, node, "pci0", NULL); -		if (path) { -			tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci0", &pci1_hose);  #endif  #ifdef CONFIG_PCIE2 -		path = fdt_getprop(blob, node, "pci1", NULL); -		if (path) { -			tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);  #endif  #ifdef CONFIG_PCIE1 -		path = fdt_getprop(blob, node, "pci2", NULL); -		if (path) { -			tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci2", &pcie3_hose);  #endif  #ifdef CONFIG_PCIE3 -		path = fdt_getprop(blob, node, "pci3", NULL); -		if (path) { -			tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci3", &pcie2_hose);  #endif -	}  }  #endif diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 875628dc9..6eb62eab3 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -285,6 +285,9 @@ static struct pci_controller pci2_hose;  static struct pci_controller pcie1_hose;  #endif	/* CONFIG_PCIE1 */ +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); +  int first_free_busno=0;  void @@ -298,9 +301,9 @@ pci_init_board(void)  #ifdef CONFIG_PCI1  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pci1_hose;  	struct pci_config_table *table; +	struct pci_region *r = hose->regions;  	uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32;	/* PORDEVSR[15] */  	uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;	/* PORDEVSR[14] */ @@ -322,27 +325,22 @@ pci_init_board(void)  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); - +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_MEM_BASE,  			       CONFIG_SYS_PCI1_MEM_PHYS,  			       CONFIG_SYS_PCI1_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCI1_IO_BASE,  			       CONFIG_SYS_PCI1_IO_PHYS,  			       CONFIG_SYS_PCI1_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3; +		hose->region_count = r - hose->regions;  		/* relocate config table pointers */  		hose->config_table = \ @@ -393,9 +391,9 @@ pci_init_board(void)  #ifdef CONFIG_PCIE1  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie1_hose;  	int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3); +	struct pci_region *r = hose->regions;  	int pcie_configured  = io_sel >= 1; @@ -411,27 +409,23 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -			       CONFIG_SYS_PCI_MEMORY_BUS, -			       CONFIG_SYS_PCI_MEMORY_PHYS, -			       CONFIG_SYS_PCI_MEMORY_SIZE, -			       PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_MEM_BASE,  			       CONFIG_SYS_PCIE1_MEM_PHYS,  			       CONFIG_SYS_PCIE1_MEM_SIZE,  			       PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  			       CONFIG_SYS_PCIE1_IO_BASE,  			       CONFIG_SYS_PCIE1_IO_PHYS,  			       CONFIG_SYS_PCIE1_IO_SIZE,  			       PCI_REGION_IO); -		hose->region_count = 3; +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -484,29 +478,16 @@ int last_stage_init(void)  #if defined(CONFIG_OF_BOARD_SETUP) -void -ft_pci_setup(void *blob, bd_t *bd) -{ -	int node, tmp[2]; -	const char *path; +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, +                        struct pci_controller *hose); -	node = fdt_path_offset(blob, "/aliases"); -	tmp[0] = 0; -	if (node >= 0) { +void ft_pci_setup(void *blob, bd_t *bd) +{  #ifdef CONFIG_PCI1 -		path = fdt_getprop(blob, node, "pci0", NULL); -		if (path) { -			tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci0", &pci1_hose);  #endif  #ifdef CONFIG_PCIE1 -		path = fdt_getprop(blob, node, "pci1", NULL); -		if (path) { -			tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);  #endif -	}  }  #endif diff --git a/board/freescale/mpc8568mds/mpc8568mds.c b/board/freescale/mpc8568mds/mpc8568mds.c index eab1900e5..28e3892e3 100644 --- a/board/freescale/mpc8568mds/mpc8568mds.c +++ b/board/freescale/mpc8568mds/mpc8568mds.c @@ -323,6 +323,9 @@ static struct pci_controller pci1_hose = {  static struct pci_controller pcie1_hose;  #endif  /* CONFIG_PCIE1 */ +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); +  int first_free_busno = 0;  /* @@ -380,8 +383,8 @@ pci_init_board(void)  	pib_init();  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCI1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pci1_hose; +	struct pci_region *r = hose->regions;  	uint pci_32 = 1;      /* PORDEVSR[15] */  	uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB;       /* PORDEVSR[14] */ @@ -402,27 +405,23 @@ pci_init_board(void)  			);  		/* inbound */ -		pci_set_region(hose->regions + 0, -				CONFIG_SYS_PCI_MEMORY_BUS, -				CONFIG_SYS_PCI_MEMORY_PHYS, -				CONFIG_SYS_PCI_MEMORY_SIZE, -				PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  				CONFIG_SYS_PCI1_MEM_BASE,  				CONFIG_SYS_PCI1_MEM_PHYS,  				CONFIG_SYS_PCI1_MEM_SIZE,  				PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  				CONFIG_SYS_PCI1_IO_BASE,  				CONFIG_SYS_PCI1_IO_PHYS,  				CONFIG_SYS_PCI1_IO_SIZE,  				PCI_REGION_IO); -		hose->region_count = 3; +		hose->region_count = r - hose->regions;  		hose->first_busno = first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -441,9 +440,9 @@ pci_init_board(void)  #ifdef CONFIG_PCIE1  {  	volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -	extern void fsl_pci_init(struct pci_controller *hose);  	struct pci_controller *hose = &pcie1_hose;  	int pcie_ep =  (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3); +	struct pci_region *r = hose->regions;  	int pcie_configured  = io_sel >= 1; @@ -459,27 +458,23 @@ pci_init_board(void)  		printf ("\n");  		/* inbound */ -		pci_set_region(hose->regions + 0, -				CONFIG_SYS_PCI_MEMORY_BUS, -				CONFIG_SYS_PCI_MEMORY_PHYS, -				CONFIG_SYS_PCI_MEMORY_SIZE, -				PCI_REGION_MEM | PCI_REGION_MEMORY); +		r += fsl_pci_setup_inbound_windows(r);  		/* outbound memory */ -		pci_set_region(hose->regions + 1, +		pci_set_region(r++,  				CONFIG_SYS_PCIE1_MEM_BASE,  				CONFIG_SYS_PCIE1_MEM_PHYS,  				CONFIG_SYS_PCIE1_MEM_SIZE,  				PCI_REGION_MEM);  		/* outbound io */ -		pci_set_region(hose->regions + 2, +		pci_set_region(r++,  				CONFIG_SYS_PCIE1_IO_BASE,  				CONFIG_SYS_PCIE1_IO_PHYS,  				CONFIG_SYS_PCIE1_IO_SIZE,  				PCI_REGION_IO); -		hose->region_count = 3; +		hose->region_count = r - hose->regions;  		hose->first_busno=first_free_busno;  		pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -500,31 +495,18 @@ pci_init_board(void)  #endif /* CONFIG_PCI */  #if defined(CONFIG_OF_BOARD_SETUP) -void -ft_board_setup(void *blob, bd_t *bd) -{ -	int node, tmp[2]; -	const char *path; +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, +                        struct pci_controller *hose); +void ft_board_setup(void *blob, bd_t *bd) +{  	ft_cpu_setup(blob, bd); -	node = fdt_path_offset(blob, "/aliases"); -	tmp[0] = 0; -	if (node >= 0) {  #ifdef CONFIG_PCI1 -		path = fdt_getprop(blob, node, "pci0", NULL); -		if (path) { -			tmp[1] = pci1_hose.last_busno - pci1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci0", &pci1_hose);  #endif  #ifdef CONFIG_PCIE1 -		path = fdt_getprop(blob, node, "pci1", NULL); -		if (path) { -			tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci1", &pcie1_hose);  #endif -	}  }  #endif diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c index b2402dcc9..d1528a78e 100644 --- a/board/freescale/mpc8572ds/mpc8572ds.c +++ b/board/freescale/mpc8572ds/mpc8572ds.c @@ -147,6 +147,9 @@ static struct pci_controller pcie2_hose;  static struct pci_controller pcie3_hose;  #endif +extern int fsl_pci_setup_inbound_windows(struct pci_region *r); +extern void fsl_pci_init(struct pci_controller *hose); +  int first_free_busno=0;  #ifdef CONFIG_PCI  void pci_init_board(void) @@ -172,11 +175,11 @@ void pci_init_board(void)  #ifdef CONFIG_PCIE3  	{  		volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE3_ADDR; -		extern void fsl_pci_init(struct pci_controller *hose);  		struct pci_controller *hose = &pcie3_hose;  		int pcie_ep = (host_agent == 0) || (host_agent == 3) ||  			(host_agent == 5) || (host_agent == 6);  		int pcie_configured  = io_sel >= 1; +		struct pci_region *r = hose->regions;  		u32 temp32;  		if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){ @@ -190,27 +193,23 @@ void pci_init_board(void)  			printf ("\n");  			/* inbound */ -			pci_set_region(hose->regions + 0, -					CONFIG_SYS_PCI_MEMORY_BUS, -					CONFIG_SYS_PCI_MEMORY_PHYS, -					CONFIG_SYS_PCI_MEMORY_SIZE, -					PCI_REGION_MEM | PCI_REGION_MEMORY); +			r += fsl_pci_setup_inbound_windows(r);  			/* outbound memory */ -			pci_set_region(hose->regions + 1, +			pci_set_region(r++,  					CONFIG_SYS_PCIE3_MEM_BASE,  					CONFIG_SYS_PCIE3_MEM_PHYS,  					CONFIG_SYS_PCIE3_MEM_SIZE,  					PCI_REGION_MEM);  			/* outbound io */ -			pci_set_region(hose->regions + 2, +			pci_set_region(r++,  					CONFIG_SYS_PCIE3_IO_BASE,  					CONFIG_SYS_PCIE3_IO_PHYS,  					CONFIG_SYS_PCIE3_IO_SIZE,  					PCI_REGION_IO); -			hose->region_count = 3; +			hose->region_count = r - hose->regions;  			hose->first_busno=first_free_busno;  			pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -244,11 +243,11 @@ void pci_init_board(void)  #ifdef CONFIG_PCIE2  	{  		volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE2_ADDR; -		extern void fsl_pci_init(struct pci_controller *hose);  		struct pci_controller *hose = &pcie2_hose;  		int pcie_ep = (host_agent == 2) || (host_agent == 4) ||  			(host_agent == 6) || (host_agent == 0);  		int pcie_configured  = io_sel & 4; +		struct pci_region *r = hose->regions;  		if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  			printf ("\n    PCIE2 connected to Slot 1 as %s (base address %x)", @@ -261,27 +260,23 @@ void pci_init_board(void)  			printf ("\n");  			/* inbound */ -			pci_set_region(hose->regions + 0, -					CONFIG_SYS_PCI_MEMORY_BUS, -					CONFIG_SYS_PCI_MEMORY_PHYS, -					CONFIG_SYS_PCI_MEMORY_SIZE, -					PCI_REGION_MEM | PCI_REGION_MEMORY); +			r += fsl_pci_setup_inbound_windows(r);  			/* outbound memory */ -			pci_set_region(hose->regions + 1, +			pci_set_region(r++,  					CONFIG_SYS_PCIE2_MEM_BASE,  					CONFIG_SYS_PCIE2_MEM_PHYS,  					CONFIG_SYS_PCIE2_MEM_SIZE,  					PCI_REGION_MEM);  			/* outbound io */ -			pci_set_region(hose->regions + 2, +			pci_set_region(r++,  					CONFIG_SYS_PCIE2_IO_BASE,  					CONFIG_SYS_PCIE2_IO_PHYS,  					CONFIG_SYS_PCIE2_IO_SIZE,  					PCI_REGION_IO); -			hose->region_count = 3; +			hose->region_count = r - hose->regions;  			hose->first_busno=first_free_busno;  			pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -301,11 +296,11 @@ void pci_init_board(void)  #ifdef CONFIG_PCIE1  	{  		volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CONFIG_SYS_PCIE1_ADDR; -		extern void fsl_pci_init(struct pci_controller *hose);  		struct pci_controller *hose = &pcie1_hose;  		int pcie_ep = (host_agent <= 1) || (host_agent == 4) ||  			(host_agent == 5);  		int pcie_configured  = io_sel & 6; +		struct pci_region *r = hose->regions;  		if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){  			printf ("\n    PCIE1 connected to Slot 2 as %s (base address %x)", @@ -318,27 +313,23 @@ void pci_init_board(void)  			printf ("\n");  			/* inbound */ -			pci_set_region(hose->regions + 0, -					CONFIG_SYS_PCI_MEMORY_BUS, -					CONFIG_SYS_PCI_MEMORY_PHYS, -					CONFIG_SYS_PCI_MEMORY_SIZE, -					PCI_REGION_MEM | PCI_REGION_MEMORY); +			r += fsl_pci_setup_inbound_windows(r);  			/* outbound memory */ -			pci_set_region(hose->regions + 1, +			pci_set_region(r++,  					CONFIG_SYS_PCIE1_MEM_BASE,  					CONFIG_SYS_PCIE1_MEM_PHYS,  					CONFIG_SYS_PCIE1_MEM_SIZE,  					PCI_REGION_MEM);  			/* outbound io */ -			pci_set_region(hose->regions + 2, +			pci_set_region(r++,  					CONFIG_SYS_PCIE1_IO_BASE,  					CONFIG_SYS_PCIE1_IO_PHYS,  					CONFIG_SYS_PCIE1_IO_SIZE,  					PCI_REGION_IO); -			hose->region_count = 3; +			hose->region_count = r - hose->regions;  			hose->first_busno=first_free_busno;  			pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data); @@ -568,10 +559,11 @@ int board_eth_init(bd_t *bis)  #endif  #if defined(CONFIG_OF_BOARD_SETUP) +extern void ft_fsl_pci_setup(void *blob, const char *pci_alias, +                        struct pci_controller *hose); +  void ft_board_setup(void *blob, bd_t *bd)  { -	int node, tmp[2]; -	const char *path;  	ulong base, size;  	ft_cpu_setup(blob, bd); @@ -581,31 +573,15 @@ void ft_board_setup(void *blob, bd_t *bd)  	fdt_fixup_memory(blob, (u64)base, (u64)size); -	node = fdt_path_offset(blob, "/aliases"); -	tmp[0] = 0; -	if (node >= 0) {  #ifdef CONFIG_PCIE3 -		path = fdt_getprop(blob, node, "pci0", NULL); -		if (path) { -			tmp[1] = pcie3_hose.last_busno - pcie3_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci0", &pcie3_hose);  #endif  #ifdef CONFIG_PCIE2 -		path = fdt_getprop(blob, node, "pci1", NULL); -		if (path) { -			tmp[1] = pcie2_hose.last_busno - pcie2_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci1", &pcie2_hose);  #endif  #ifdef CONFIG_PCIE1 -		path = fdt_getprop(blob, node, "pci2", NULL); -		if (path) { -			tmp[1] = pcie1_hose.last_busno - pcie1_hose.first_busno; -			do_fixup_by_path(blob, path, "bus-range", &tmp, 8, 1); -		} +	ft_fsl_pci_setup(blob, "pci2", &pcie1_hose);  #endif -	}  }  #endif |