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| author | York Sun <yorksun@freescale.com> | 2007-10-29 13:58:39 -0500 | 
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2007-11-07 14:09:09 -0600 | 
| commit | a877880c6949e948bd63cd6ea4e216573d2f53dd (patch) | |
| tree | 08819be1551f93a152085e69d95d8f377418c3d7 /board/freescale/mpc8610hpcd/mpc8610hpcd.c | |
| parent | 52e5ddfecdda308f75782fae206b677b1810f5f9 (diff) | |
| download | olio-uboot-2014.01-a877880c6949e948bd63cd6ea4e216573d2f53dd.tar.xz olio-uboot-2014.01-a877880c6949e948bd63cd6ea4e216573d2f53dd.zip | |
8610: Add 8610 DIU display driver
1280x1024 and 1024x768 @ 32 bpp are supported now.
DVI, Single-link LVDS, Double-link LVDS are all supported.
Environmental variable "monitor" is used to specify monitor port.
A new command "diufb" is introduced to reinitialize monitor
and display a BMP file in the memory. So far, 1-bit, 4-bit,
8-bit and 24-bit BMP formats are supported.
    diufb init
        - initialize the diu driver
    Enable the port specified in the environmental variable "monitor"
    diufb addr
        - display bmp file in memory.
    The bmp image should be no bigger than the resolution, 1280x1024
    for DVI and double-link LVDS, 1024x768 for single-link LVDS.
Note, this driver allocate memory but doesn't free it after use
It is written on purpose -- to avoid a failure of reallocation
due to memory fragement.
ECC of DDR is disabled for DIU performance. L2 data cache is also disabled.
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Jon loeliger <jdl@freescale.com>
Diffstat (limited to 'board/freescale/mpc8610hpcd/mpc8610hpcd.c')
| -rw-r--r-- | board/freescale/mpc8610hpcd/mpc8610hpcd.c | 45 | 
1 files changed, 42 insertions, 3 deletions
| diff --git a/board/freescale/mpc8610hpcd/mpc8610hpcd.c b/board/freescale/mpc8610hpcd/mpc8610hpcd.c index 63790ca9b..617881ad0 100644 --- a/board/freescale/mpc8610hpcd/mpc8610hpcd.c +++ b/board/freescale/mpc8610hpcd/mpc8610hpcd.c @@ -54,7 +54,47 @@ int board_early_init_f(void)  	volatile immap_t *immap = (immap_t *)CFG_IMMR;  	volatile ccsr_gur_t *gur = &immap->im_gur; -	gur->gpiocr |= 0x888a5500; /* DIU16, IR1, UART0, UART2 */ +	gur->gpiocr |= 0x88aa5500; /* DIU16, IR1, UART0, UART2 */ + +	return 0; +} + +int misc_init_r(void) +{ +	u8 tmp_val, version; + +	/*Do not use 8259PIC*/ +	tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); +	out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val | 0x80); + +	/*For FPGA V7 or higher, set the IRQMAPSEL to 0 to use MAP0 interrupt*/ +	version = in8(PIXIS_BASE + PIXIS_PVER); +	if(version >= 0x07) { +		tmp_val = in8(PIXIS_BASE + PIXIS_BRDCFG0); +		out8(PIXIS_BASE + PIXIS_BRDCFG0, tmp_val & 0xbf); +	} + +	/* Using this for DIU init before the driver in linux takes over +	 *  Enable the TFP410 Encoder (I2C address 0x38) +	 */ + +	tmp_val = 0xBF; +	i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); +	/* Verify if enabled */ +	tmp_val = 0; +	i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val)); +	debug("DVI Encoder Read: 0x%02lx\n",tmp_val); + +	tmp_val = 0x10; +	i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); +	/* Verify if enabled */ +	tmp_val = 0; +	i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val)); +	debug("DVI Encoder Read: 0x%02lx\n",tmp_val); + +#ifdef CONFIG_FSL_DIU_FB +	mpc8610hpcd_diu_init(); +#endif  	return 0;  } @@ -62,7 +102,6 @@ int board_early_init_f(void)  int checkboard(void)  {  	volatile immap_t *immap = (immap_t *)CFG_IMMR; -	volatile ccsr_lbc_t *memctl = &immap->im_lbc;  	volatile ccsr_local_mcm_t *mcm = &immap->im_local_mcm;  	puts("Board: MPC8610HPCD\n"); @@ -468,7 +507,7 @@ ft_board_setup(void *blob, bd_t *bd)  unsigned long  get_board_sys_clk(ulong dummy)  { -	u8 i, go_bit, rd_clks; +	u8 i;  	ulong val = 0;  	ulong a; |