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| author | Jon Loeliger <jdl@freescale.com> | 2008-03-18 13:51:06 -0500 |
|---|---|---|
| committer | Kumar Gala <galak@kernel.crashing.org> | 2008-08-27 11:43:50 -0500 |
| commit | e31d2c1e2bc954dc32e33bb2076139f85b95f8e6 (patch) | |
| tree | 2bb35a5e0a26ce624c990f618da56193d2f1e124 /board/freescale/mpc8548cds/mpc8548cds.c | |
| parent | aa11d85cf318b961e029fe50d68ca47d004bce93 (diff) | |
| download | olio-uboot-2014.01-e31d2c1e2bc954dc32e33bb2076139f85b95f8e6.tar.xz olio-uboot-2014.01-e31d2c1e2bc954dc32e33bb2076139f85b95f8e6.zip | |
FSL DDR: Convert MPC8548CDS to new DDR code.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Diffstat (limited to 'board/freescale/mpc8548cds/mpc8548cds.c')
| -rw-r--r-- | board/freescale/mpc8548cds/mpc8548cds.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/board/freescale/mpc8548cds/mpc8548cds.c b/board/freescale/mpc8548cds/mpc8548cds.c index 0b037cc69..84d3850cc 100644 --- a/board/freescale/mpc8548cds/mpc8548cds.c +++ b/board/freescale/mpc8548cds/mpc8548cds.c @@ -25,8 +25,10 @@ #include <common.h> #include <pci.h> #include <asm/processor.h> +#include <asm/mmu.h> #include <asm/immap_85xx.h> #include <asm/immap_fsl_pci.h> +#include <asm/fsl_ddr_sdram.h> #include <spd_sdram.h> #include <miiphy.h> #include <libfdt.h> @@ -111,7 +113,10 @@ initdram(int board_type) udelay(200); } #endif - dram_size = spd_sdram(); + + dram_size = fsl_ddr_sdram(); + dram_size = setup_ddr_tlbs(dram_size / 0x100000); + dram_size *= 0x100000; #if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER) /* @@ -119,6 +124,7 @@ initdram(int board_type) */ ddr_enable_ecc(dram_size); #endif + /* * SDRAM Initialization */ |