diff options
| author | Dave Liu <r63238@freescale.com> | 2007-09-18 12:37:57 +0800 | 
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2008-01-08 09:55:39 -0600 | 
| commit | 19580e660cc8da49f16536a8bd78c047c7bc12e5 (patch) | |
| tree | 2b0d1681d4b61b0d7bbf5cf886d25fc3d2753ddc /board/freescale/mpc837xemds/pci.c | |
| parent | 555da61702771fe0f76f3de23b4e7590f3704161 (diff) | |
| download | olio-uboot-2014.01-19580e660cc8da49f16536a8bd78c047c7bc12e5.tar.xz olio-uboot-2014.01-19580e660cc8da49f16536a8bd78c047c7bc12e5.zip | |
mpc83xx: Add the support of MPC837xEMDS board
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
Diffstat (limited to 'board/freescale/mpc837xemds/pci.c')
| -rw-r--r-- | board/freescale/mpc837xemds/pci.c | 65 | 
1 files changed, 65 insertions, 0 deletions
| diff --git a/board/freescale/mpc837xemds/pci.c b/board/freescale/mpc837xemds/pci.c new file mode 100644 index 000000000..ab909790e --- /dev/null +++ b/board/freescale/mpc837xemds/pci.c @@ -0,0 +1,65 @@ +/* + * Copyright (C) 2007 Freescale Semiconductor, Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + */ + +#include <asm/mmu.h> +#include <asm/io.h> +#include <common.h> +#include <mpc83xx.h> +#include <pci.h> +#include <i2c.h> +#include <asm/fsl_i2c.h> + +#if defined(CONFIG_PCI) +static struct pci_region pci_regions[] = { +	{ +		bus_start: CFG_PCI_MEM_BASE, +		phys_start: CFG_PCI_MEM_PHYS, +		size: CFG_PCI_MEM_SIZE, +		flags: PCI_REGION_MEM | PCI_REGION_PREFETCH +	}, +	{ +		bus_start: CFG_PCI_MMIO_BASE, +		phys_start: CFG_PCI_MMIO_PHYS, +		size: CFG_PCI_MMIO_SIZE, +		flags: PCI_REGION_MEM +	}, +	{ +		bus_start: CFG_PCI_IO_BASE, +		phys_start: CFG_PCI_IO_PHYS, +		size: CFG_PCI_IO_SIZE, +		flags: PCI_REGION_IO +	} +}; + +void pci_init_board(void) +{ +	volatile immap_t *immr = (volatile immap_t *)CFG_IMMR; +	volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk; +	volatile law83xx_t *pci_law = immr->sysconf.pcilaw; +	struct pci_region *reg[] = { pci_regions }; + +	/* Enable all 5 PCI_CLK_OUTPUTS */ +	clk->occr |= 0xf8000000; +	udelay(2000); + +	/* Configure PCI Local Access Windows */ +	pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR; +	pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB; + +	pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR; +	pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB; + +	udelay(2000); + +	mpc83xx_pci_init(1, reg, 0); +} +#endif /* CONFIG_PCI */ |