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| author | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <haavard.skinnemoen@atmel.com> | 2008-12-17 16:53:07 +0100 |
| commit | cb5473205206c7f14cbb1e747f28ec75b48826e2 (patch) | |
| tree | 8f4808d60917100b18a10b05230f7638a0a9bbcc /board/freescale/m5373evb/nand.c | |
| parent | baf449fc5ff96f071bb0e3789fd3265f6d4fd9a0 (diff) | |
| parent | 92c78a3bbcb2ce508b4bf1c4a1e0940406a024bb (diff) | |
| download | olio-uboot-2014.01-cb5473205206c7f14cbb1e747f28ec75b48826e2.tar.xz olio-uboot-2014.01-cb5473205206c7f14cbb1e747f28ec75b48826e2.zip | |
Merge branch 'fixes' into cleanups
Conflicts:
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
cpu/at32ap/at32ap700x/gpio.c
include/asm-avr32/arch-at32ap700x/clk.h
include/configs/atngw100.h
include/configs/atstk1002.h
include/configs/atstk1003.h
include/configs/atstk1004.h
include/configs/atstk1006.h
include/configs/favr-32-ezkit.h
include/configs/hammerhead.h
include/configs/mimc200.h
Diffstat (limited to 'board/freescale/m5373evb/nand.c')
| -rw-r--r-- | board/freescale/m5373evb/nand.c | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/board/freescale/m5373evb/nand.c b/board/freescale/m5373evb/nand.c index 404a9c386..3ebef059e 100644 --- a/board/freescale/m5373evb/nand.c +++ b/board/freescale/m5373evb/nand.c @@ -41,19 +41,21 @@ DECLARE_GLOBAL_DATA_PTR; static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd, unsigned int ctrl) { struct nand_chip *this = mtdinfo->priv; - volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; - u32 nand_baseaddr = (u32) this->IO_ADDR_W; + volatile u16 *nCE = (u16 *) CONFIG_SYS_LATCH_ADDR; if (ctrl & NAND_CTRL_CHANGE) { ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; - IO_ADDR_W &= ~(SET_ALE | SE_CLE); + IO_ADDR_W &= ~(SET_ALE | SET_CLE); + *nCE &= 0xFFFB; + + if (ctrl & NAND_NCE) + *nCE |= 0x0004; if (ctrl & NAND_CLE) IO_ADDR_W |= SET_CLE; if (ctrl & NAND_ALE) IO_ADDR_W |= SET_ALE; - at91_set_gpio_value(AT91_PIN_PD15, !(ctrl & NAND_NCE)); this->IO_ADDR_W = (void *)IO_ADDR_W; } @@ -67,10 +69,13 @@ int board_nand_init(struct nand_chip *nand) volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO; volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; - *((volatile u16 *)CFG_LATCH_ADDR) |= 0x0004; fbcs->csmr2 &= ~FBCS_CSMR_WP; - /* set up pin configuration */ + /* + * set up pin configuration - enabled 2nd output buffer's signals + * (nand_ngpio - nCE USB1/2_PWR_EN, LATCH_GPIOs, LCD_VEEEN, etc) + * to use nCE signal + */ gpio->par_timer &= ~GPIO_PAR_TIN3_TIN3; gpio->pddr_timer |= 0x08; gpio->ppd_timer |= 0x08; |