diff options
| author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:55 +0000 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-02-04 09:05:43 -0500 |
| commit | 1c356135fa1fd2c2f6d775ba1b2f86e4823d8338 (patch) | |
| tree | 1db304e06ecf9703b4cd3a94237a296f22a45c19 /arch/powerpc/lib | |
| parent | fefb098b187caab34edc72df141125925c9bba62 (diff) | |
| download | olio-uboot-2014.01-1c356135fa1fd2c2f6d775ba1b2f86e4823d8338.tar.xz olio-uboot-2014.01-1c356135fa1fd2c2f6d775ba1b2f86e4823d8338.zip | |
ppc: Move mpc8220 clocks to arch_global_data
Move these fields into arch_global_data and tidy up. The bExtUart field
does not appear to be used, so punt it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/powerpc/lib')
| -rw-r--r-- | arch/powerpc/lib/board.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/powerpc/lib/board.c b/arch/powerpc/lib/board.c index 31904686b..12270a453 100644 --- a/arch/powerpc/lib/board.c +++ b/arch/powerpc/lib/board.c @@ -556,11 +556,11 @@ void board_init_f(ulong bootflag) #endif #if defined(CONFIG_MPC8220) bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */ - bd->bi_inpfreq = gd->inp_clk; + bd->bi_inpfreq = gd->arch.inp_clk; bd->bi_pcifreq = gd->pci_clk; - bd->bi_vcofreq = gd->vco_clk; - bd->bi_pevfreq = gd->pev_clk; - bd->bi_flbfreq = gd->flb_clk; + bd->bi_vcofreq = gd->arch.vco_clk; + bd->bi_pevfreq = gd->arch.pev_clk; + bd->bi_flbfreq = gd->arch.flb_clk; /* store bootparam to sram (backward compatible), here? */ { @@ -568,10 +568,10 @@ void board_init_f(ulong bootflag) *sram++ = gd->ram_size; *sram++ = gd->bus_clk; - *sram++ = gd->inp_clk; + *sram++ = gd->arch.inp_clk; *sram++ = gd->cpu_clk; - *sram++ = gd->vco_clk; - *sram++ = gd->flb_clk; + *sram++ = gd->arch.vco_clk; + *sram++ = gd->arch.flb_clk; *sram++ = 0xb8c3ba11; /* boot signature */ } #endif |