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| author | Tom Rini <trini@ti.com> | 2013-04-15 07:46:11 -0400 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-04-15 07:46:11 -0400 |
| commit | 17059f972fa6768ebf15a575c00083b3a431b79a (patch) | |
| tree | 30df6b88fa1dc57dada54f9a16ab1619cc4f3c52 /arch/arm/include/asm/arch-exynos/cpu.h | |
| parent | 277f037074fbb73be10a7bff27079b6eb0a3bfbb (diff) | |
| parent | 8960af8ba9488fc54e2e4733cbada26d3cece225 (diff) | |
| download | olio-uboot-2014.01-17059f972fa6768ebf15a575c00083b3a431b79a.tar.xz olio-uboot-2014.01-17059f972fa6768ebf15a575c00083b3a431b79a.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/include/asm/arch-exynos/cpu.h')
| -rw-r--r-- | arch/arm/include/asm/arch-exynos/cpu.h | 10 |
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h index eb3442235..f76e4897e 100644 --- a/arch/arm/include/asm/arch-exynos/cpu.h +++ b/arch/arm/include/asm/arch-exynos/cpu.h @@ -62,6 +62,7 @@ #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4_ACE_SFR_BASE DEVICE_NOT_AVAILABLE /* EXYNOS4X12 */ #define EXYNOS4X12_GPIO_PART3_BASE 0x03860000 @@ -92,9 +93,10 @@ #define EXYNOS4X12_ADC_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_DP_BASE DEVICE_NOT_AVAILABLE #define EXYNOS4X12_MODEM_BASE DEVICE_NOT_AVAILABLE -#define EXYNOS4X12_I2S_BASE DEVICE_NOT_AVAILABLE -#define EXYNOS4X12_SPI_BASE DEVICE_NOT_AVAILABLE -#define EXYNOS4X12_SPI_ISP_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_I2S_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_SPI_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_SPI_ISP_BASE DEVICE_NOT_AVAILABLE +#define EXYNOS4X12_ACE_SFR_BASE DEVICE_NOT_AVAILABLE /* EXYNOS5 Common*/ #define EXYNOS5_I2C_SPACING 0x10000 @@ -106,6 +108,7 @@ #define EXYNOS5_SWRESET 0x10040400 #define EXYNOS5_SYSREG_BASE 0x10050000 #define EXYNOS5_WATCHDOG_BASE 0x101D0000 +#define EXYNOS5_ACE_SFR_BASE 0x10830000 #define EXYNOS5_DMC_PHY0_BASE 0x10C00000 #define EXYNOS5_DMC_PHY1_BASE 0x10C10000 #define EXYNOS5_GPIO_PART3_BASE 0x10D10000 @@ -205,6 +208,7 @@ static inline unsigned int samsung_get_base_##device(void) \ SAMSUNG_BASE(adc, ADC_BASE) SAMSUNG_BASE(clock, CLOCK_BASE) +SAMSUNG_BASE(ace_sfr, ACE_SFR_BASE) SAMSUNG_BASE(dp, DP_BASE) SAMSUNG_BASE(sysreg, SYSREG_BASE) SAMSUNG_BASE(fimd, FIMD_BASE) |