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| author | Heiko Schocher <hs@denx.de> | 2011-11-15 10:00:02 -0500 | 
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-11-15 22:25:51 +0100 | 
| commit | f3c149d6c6e5ba8dd72baa86fe527837e4fb0e9a (patch) | |
| tree | 364a65280b22137f6886a165f4a6a61e8869e10c /arch/arm/include/asm/arch-davinci/hardware.h | |
| parent | a9c1c04243154e48ba8905a5132a1191895fb1b2 (diff) | |
| download | olio-uboot-2014.01-f3c149d6c6e5ba8dd72baa86fe527837e4fb0e9a.tar.xz olio-uboot-2014.01-f3c149d6c6e5ba8dd72baa86fe527837e4fb0e9a.zip | |
arm, davinci: da850/dm365 lowlevel cleanup
- Cleanup a lot of fix values, and use defines instead.
- Also make some values configurable through the board config
  file.
- delete the NAND_SPL code for da850, as it is not used actually
- remove the asm code
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Tom Rini <tom.rini@gmail.com>
Cc: Christian Riesch <christian.riesch@omicron.at>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-davinci/hardware.h')
| -rw-r--r-- | arch/arm/include/asm/arch-davinci/hardware.h | 20 | 
1 files changed, 20 insertions, 0 deletions
| diff --git a/arch/arm/include/asm/arch-davinci/hardware.h b/arch/arm/include/asm/arch-davinci/hardware.h index ee8fd43c1..f80f31244 100644 --- a/arch/arm/include/asm/arch-davinci/hardware.h +++ b/arch/arm/include/asm/arch-davinci/hardware.h @@ -230,6 +230,9 @@ typedef volatile unsigned int *	dv_reg_p;  #define DAVINCI_LPSC_CFG5		38  #define DAVINCI_LPSC_GEM		39  #define DAVINCI_LPSC_IMCOP		40 +#define DAVINCI_LPSC_VPSSMASTER		47 +#define DAVINCI_LPSC_MJCP		50 +#define DAVINCI_LPSC_HDVICP		51  #define DAVINCI_DM646X_LPSC_EMAC	14  #define DAVINCI_DM646X_LPSC_UART0	26 @@ -385,6 +388,20 @@ struct davinci_psc_regs {  #define PINMUX3				0x01c4000c  #define PINMUX4				0x01c40010 +struct davinci_uart_ctrl_regs { +	dv_reg	revid1; +	dv_reg	res; +	dv_reg	pwremu_mgmt; +	dv_reg	mdr; +}; + +#define DAVINCI_UART_CTRL_BASE 0x28 + +/* UART PWREMU_MGMT definitions */ +#define DAVINCI_UART_PWREMU_MGMT_FREE	(1 << 0) +#define DAVINCI_UART_PWREMU_MGMT_URRST	(1 << 13) +#define DAVINCI_UART_PWREMU_MGMT_UTRST	(1 << 14) +  #else /* CONFIG_SOC_DA8XX */  struct davinci_pllc_regs { @@ -492,6 +509,9 @@ struct davinci_syscfg1_regs {  #define VTP_READY		(1 << 15)  #define VTP_IOPWRDWN		(1 << 14) +#define DV_SYSCFG_KICK0_UNLOCK	0x83e70b13 +#define DV_SYSCFG_KICK1_UNLOCK	0x95a4f1e0 +  /* Interrupt controller */  struct davinci_aintc_regs {  	dv_reg	revid; |