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| author | Wolfgang Denk <wd@denx.de> | 2011-05-18 14:31:56 +0200 |
|---|---|---|
| committer | Wolfgang Denk <wd@denx.de> | 2011-05-18 14:31:56 +0200 |
| commit | 0ea91423f47461bf7eaed2d4aff198076dd07fd5 (patch) | |
| tree | b5201f976fe3f7f5ed6f485f7ef81d8d8c9ec033 /arch/arm/include/asm/arch-at91/at91_mc.h | |
| parent | ce6400a0f88f9648d6def519244ea8c33c7612b2 (diff) | |
| parent | 24890f11980eb70d835ca7e0b00d32284d8f546c (diff) | |
| download | olio-uboot-2014.01-0ea91423f47461bf7eaed2d4aff198076dd07fd5.tar.xz olio-uboot-2014.01-0ea91423f47461bf7eaed2d4aff198076dd07fd5.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-arm
* 'master' of git://git.denx.de/u-boot-arm: (40 commits)
avr32: add ATAG_BOARDINFO
at91: reworked support for otc570 board
at91: reworked support for meesc board
hammerhead: move CONFIG_SYS_TEXT_BASE to header
mimc200: move CONFIG_SYS_TEXT_BASE to header
favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header
atstk100x: move CONFIG_SYS_TEXT_BASE to header
atngw100: move CONFIG_SYS_TEXT_BASE to header
mimc200: fix "#define XXXX 1"
hammerhead: fix "#define XXXX 1"
favr-32-ezkit: fix "#define XXXX 1"
atstk1006: fix "#define XXXX 1"
atstk1004: fix "#define XXXX 1"
atstk1003: fix "#define XXXX 1"
atstk1002: fix "#define XXXX 1"
atngw100: fix "#define XXXX 1"
avr32: use single linker script
avr32/config.mk: simplify PLATFORM_RELFLAGS
avr32: fix linking
Add support for Bluewater Systems Snapper 9260 and 9G20 modules
...
Diffstat (limited to 'arch/arm/include/asm/arch-at91/at91_mc.h')
| -rw-r--r-- | arch/arm/include/asm/arch-at91/at91_mc.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/include/asm/arch-at91/at91_mc.h b/arch/arm/include/asm/arch-at91/at91_mc.h index acfbd10c5..09453a945 100644 --- a/arch/arm/include/asm/arch-at91/at91_mc.h +++ b/arch/arm/include/asm/arch-at91/at91_mc.h @@ -36,7 +36,7 @@ typedef struct at91_ebi { u32 csa; /* 0x00 Chip Select Assignment Register */ u32 cfgr; /* 0x04 Configuration Register */ u32 reserved[2]; -} __attribute__ ((packed)) at91_ebi_t; +} at91_ebi_t; #define AT91_EBI_CSA_CS0A 0x0001 #define AT91_EBI_CSA_CS1A 0x0002 @@ -55,11 +55,11 @@ typedef struct at91_sdramc { u32 imr; /* 0x1C SDRAMC Interrupt Mask Register */ u32 icr; /* 0x20 SDRAMC Interrupt Status Register */ u32 reserved[3]; -} __attribute__ ((packed)) at91_sdramc_t; +} at91_sdramc_t; typedef struct at91_smc { u32 csr[8]; /* 0x00 SDRAMC Mode Register */ -} __attribute__ ((packed)) at91_smc_t; +} at91_smc_t; #define AT91_SMC_CSR_RWHOLD(x) ((x & 0x7) << 28) #define AT91_SMC_CSR_RWSETUP(x) ((x & 0x7) << 24) @@ -78,7 +78,7 @@ typedef struct at91_smc { typedef struct at91_bfc { u32 mr; /* 0x00 SDRAMC Mode Register */ -} __attribute__ ((packed)) at91_bfc_t; +} at91_bfc_t; typedef struct at91_mc { u32 rcr; /* 0x00 MC Remap Control Register */ @@ -91,7 +91,7 @@ typedef struct at91_mc { at91_sdramc_t sdramc; /* 0x90 - 0xBC SDRAMC User Interface */ at91_bfc_t bfc; /* 0xC0 BFC User Interface */ u32 reserved2[15]; -} __attribute__ ((packed)) at91_mc_t; +} at91_mc_t; #endif #endif |