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| author | Tom Warren <twarren@nvidia.com> | 2013-04-10 10:32:32 -0700 |
|---|---|---|
| committer | Tom Warren <twarren@nvidia.com> | 2013-04-15 11:01:38 -0700 |
| commit | 49493cb7144f0c51a5aaecc75fcd1b3f157633ba (patch) | |
| tree | f83f228d8367c5920f93af85ebedfb7697355144 /arch/arm/cpu/tegra-common/ap.c | |
| parent | d94c2dbd0a55d742ab6ed9bd0c51b27ceed4084e (diff) | |
| download | olio-uboot-2014.01-49493cb7144f0c51a5aaecc75fcd1b3f157633ba.tar.xz olio-uboot-2014.01-49493cb7144f0c51a5aaecc75fcd1b3f157633ba.zip | |
Tegra: Split tegra_get_chip_type() into soc & sku funcs
As suggested by Stephen Warren, use tegra_get_chip() to return
the pure CHIPID for a Tegra SoC (i.e. 0x20 for Tegra20, 0x30 for
Tegra30, etc.) and rename tegra_get_chip_type() to reflect its true
function, i.e. tegra_get_chip_sku(), which returns an ID like
TEGRA_SOC_T25, TEGRA_SOC_T33, etc.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/tegra-common/ap.c')
| -rw-r--r-- | arch/arm/cpu/tegra-common/ap.c | 43 |
1 files changed, 32 insertions, 11 deletions
diff --git a/arch/arm/cpu/tegra-common/ap.c b/arch/arm/cpu/tegra-common/ap.c index a739fe2b5..9b77b2b82 100644 --- a/arch/arm/cpu/tegra-common/ap.c +++ b/arch/arm/cpu/tegra-common/ap.c @@ -34,25 +34,44 @@ #include <asm/arch-tegra/tegra.h> #include <asm/arch-tegra/warmboot.h> -int tegra_get_chip_type(void) +int tegra_get_chip(void) { - struct apb_misc_gp_ctlr *gp; - struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE; - uint tegra_sku_id, rev; + int rev; + struct apb_misc_gp_ctlr *gp = + (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE; /* * This is undocumented, Chip ID is bits 15:8 of the register * APB_MISC + 0x804, and has value 0x20 for Tegra20, 0x30 for * Tegra30, and 0x35 for T114. */ - gp = (struct apb_misc_gp_ctlr *)NV_PA_APB_MISC_GP_BASE; rev = (readl(&gp->hidrev) & HIDREV_CHIPID_MASK) >> HIDREV_CHIPID_SHIFT; + debug("%s: CHIPID is 0x%02X\n", __func__, rev); + + return rev; +} + +int tegra_get_sku_info(void) +{ + int sku_id; + struct fuse_regs *fuse = (struct fuse_regs *)NV_PA_FUSE_BASE; + + sku_id = readl(&fuse->sku_info) & 0xff; + debug("%s: SKU info byte is 0x%02X\n", __func__, sku_id); + + return sku_id; +} + +int tegra_get_chip_sku(void) +{ + uint sku_id, chip_id; - tegra_sku_id = readl(&fuse->sku_info) & 0xff; + chip_id = tegra_get_chip(); + sku_id = tegra_get_sku_info(); - switch (rev) { + switch (chip_id) { case CHIPID_TEGRA20: - switch (tegra_sku_id) { + switch (sku_id) { case SKU_ID_T20: return TEGRA_SOC_T20; case SKU_ID_T25SE: @@ -64,20 +83,22 @@ int tegra_get_chip_type(void) } break; case CHIPID_TEGRA30: - switch (tegra_sku_id) { + switch (sku_id) { case SKU_ID_T33: case SKU_ID_T30: return TEGRA_SOC_T30; } break; case CHIPID_TEGRA114: - switch (tegra_sku_id) { + switch (sku_id) { case SKU_ID_T114_ENG: return TEGRA_SOC_T114; } break; } - /* unknown sku id */ + /* unknown chip/sku id */ + printf("%s: ERROR: UNKNOWN CHIP/SKU ID COMBO (0x%02X/0x%02X)\n", + __func__, chip_id, sku_id); return TEGRA_SOC_UNKNOWN; } |