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| author | Mike Frysinger <vapier@gentoo.org> | 2008-02-04 19:26:56 -0500 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2008-02-04 19:26:56 -0500 |
| commit | 97c26e006d2fa6d4e1560933ee6f385d8b8908b9 (patch) | |
| tree | cf7b2be158c30a57bdf8ad60a686d64002908e33 | |
| parent | 0858b835e7ea501ea084d34cef75932f098342bb (diff) | |
| download | olio-uboot-2014.01-97c26e006d2fa6d4e1560933ee6f385d8b8908b9.tar.xz olio-uboot-2014.01-97c26e006d2fa6d4e1560933ee6f385d8b8908b9.zip | |
add Blackfin-specific reginfo command
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| -rw-r--r-- | common/cmd_reginfo.c | 45 |
1 files changed, 41 insertions, 4 deletions
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c index bb6aa30d1..980664d14 100644 --- a/common/cmd_reginfo.c +++ b/common/cmd_reginfo.c @@ -329,16 +329,53 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) *(volatile ulong*)MPC5XXX_SDRAM_CS0CFG); printf ("\tSDRAMCS1: %08X\n", *(volatile ulong*)MPC5XXX_SDRAM_CS1CFG); + +#elif defined(CONFIG_BLACKFIN) + puts("\nSystem Configuration registers\n"); + + puts("\nPLL Registers\n"); + printf("\tPLL_DIV: 0x%04x PLL_CTL: 0x%04x\n", + bfin_read_PLL_DIV(), bfin_read_PLL_CTL()); + printf("\tPLL_STAT: 0x%04x PLL_LOCKCNT: 0x%04x\n", + bfin_read_PLL_STAT(), bfin_read_PLL_LOCKCNT()); + printf("\tVR_CTL: 0x%04x\n", bfin_read_VR_CTL()); + + puts("\nEBIU AMC Registers\n"); + printf("\tEBIU_AMGCTL: 0x%04x\n", bfin_read_EBIU_AMGCTL()); + printf("\tEBIU_AMBCTL0: 0x%08x EBIU_AMBCTL1: 0x%08x\n", + bfin_read_EBIU_AMBCTL0(), bfin_read_EBIU_AMBCTL1()); +# ifdef EBIU_MODE + printf("\tEBIU_MBSCTL: 0x%08x EBIU_ARBSTAT: 0x%08x\n", + bfin_read_EBIU_MBSCTL(), bfin_read_EBIU_ARBSTAT()); + printf("\tEBIU_MODE: 0x%08x EBIU_FCTL: 0x%08x\n", + bfin_read_EBIU_MODE(), bfin_read_EBIU_FCTL()); +# endif + +# ifdef EBIU_RSTCTL + puts("\nEBIU DDR Registers\n"); + printf("\tEBIU_DDRCTL0: 0x%08x EBIU_DDRCTL1: 0x%08x\n", + bfin_read_EBIU_DDRCTL0(), bfin_read_EBIU_DDRCTL1()); + printf("\tEBIU_DDRCTL2: 0x%08x EBIU_DDRCTL3: 0x%08x\n", + bfin_read_EBIU_DDRCTL2(), bfin_read_EBIU_DDRCTL3()); + printf("\tEBIU_DDRQUE: 0x%08x EBIU_RSTCTL 0x%04x\n", + bfin_read_EBIU_DDRQUE(), bfin_read_EBIU_RSTCTL()); + printf("\tEBIU_ERRADD: 0x%08x EBIU_ERRMST: 0x%04x\n", + bfin_read_EBIU_ERRADD(), bfin_read_EBIU_ERRMST()); +# else + puts("\nEBIU SDC Registers\n"); + printf("\tEBIU_SDRRC: 0x%04x EBIU_SDBCTL: 0x%04x\n", + bfin_read_EBIU_SDRRC(), bfin_read_EBIU_SDBCTL()); + printf("\tEBIU_SDSTAT: 0x%04x EBIU_SDGCTL: 0x%08x\n", + bfin_read_EBIU_SDSTAT(), bfin_read_EBIU_SDGCTL()); +# endif + #endif /* CONFIG_MPC5200 */ return 0; } /**************************************************/ -#if ( defined(CONFIG_8xx) || defined(CONFIG_405GP) || \ - defined(CONFIG_405EP) || defined(CONFIG_MPC5200) ) && \ - defined(CONFIG_CMD_REGINFO) - +#if defined(CONFIG_CMD_REGINFO) U_BOOT_CMD( reginfo, 2, 1, do_reginfo, "reginfo - print register information\n", |