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| author | Tom Rini <trini@ti.com> | 2011-11-18 12:48:05 +0000 | 
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-06 23:59:38 +0100 | 
| commit | fc41ba1e2b4271bef197bfbf89d49458368319ce (patch) | |
| tree | 05bd98915bd603e76e43b36c703e2f7936421f4b | |
| parent | 1be1433b834aaf7aef7c92275f92d4729f6bd62e (diff) | |
| download | olio-uboot-2014.01-fc41ba1e2b4271bef197bfbf89d49458368319ce.tar.xz olio-uboot-2014.01-fc41ba1e2b4271bef197bfbf89d49458368319ce.zip | |
OMAP3: Suffix all Micron memory timing parts with their speed
Signed-off-by: Tom Rini <trini@ti.com>
| -rw-r--r-- | arch/arm/include/asm/arch-omap3/mem.h | 21 | 
1 files changed, 11 insertions, 10 deletions
| diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h index 912c73765..4f996d9eb 100644 --- a/arch/arm/include/asm/arch-omap3/mem.h +++ b/arch/arm/include/asm/arch-omap3/mem.h @@ -175,15 +175,16 @@ enum {  		ACTIM_CTRLB(MICRON_TWTR_165, MICRON_TCKE_165,	\  				MICRON_TXP_165,	MICRON_XSR_165) -#define MICRON_RASWIDTH		0x2 -#define MICRON_V_MCFG(size)	MCFG((size), MICRON_RASWIDTH) +#define MICRON_RASWIDTH_165	0x2 +#define MICRON_V_MCFG_165(size)	MCFG((size), MICRON_RASWIDTH_165) -#define MICRON_BL				0x2 -#define MICRON_SIL				0x0 -#define MICRON_CASL				0x3 -#define MICRON_WBST				0x0 -#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \ -	(MICRON_SIL << 3) | (MICRON_BL)) +#define MICRON_BL_165			0x2 +#define MICRON_SIL_165			0x0 +#define MICRON_CASL_165			0x3 +#define MICRON_WBST_165			0x0 +#define MICRON_V_MR_165			((MICRON_WBST_165 << 9) | \ +		(MICRON_CASL_165 << 4) | (MICRON_SIL_165 << 3) | \ +		(MICRON_BL_165))  /* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns */  #define NUMONYX_TDAL_165	6	/* Twr/Tck + Trp/tck		*/ @@ -219,9 +220,9 @@ enum {  #ifdef CONFIG_OMAP3_MICRON_DDR  #define V_ACTIMA_165		MICRON_V_ACTIMA_165  #define V_ACTIMB_165		MICRON_V_ACTIMB_165 -#define V_MCFG			MICRON_V_MCFG(PHYS_SDRAM_1_SIZE) +#define V_MCFG			MICRON_V_MCFG_165(PHYS_SDRAM_1_SIZE)  #define V_RFR_CTRL		SDP_3430_SDRC_RFR_CTRL_165MHz -#define V_MR			MICRON_V_MR +#define V_MR			MICRON_V_MR_165  #endif  #ifdef CONFIG_OMAP3_NUMONYX_DDR |