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| author | Markus Klotzbuecher <mk@denx.de> | 2006-03-27 16:01:03 +0200 |
|---|---|---|
| committer | Markus Klotzbücher <mk@pollux.denx.de> | 2006-03-27 16:01:03 +0200 |
| commit | c855ef6768cf9cb0bc12f4965592dcd5f353686a (patch) | |
| tree | 7c27d9cb1b1c1821bf0bf1146309457a0e7d17e5 | |
| parent | 2770bcb21c82835a5351176e5b2a9221d7fc8ef9 (diff) | |
| download | olio-uboot-2014.01-c855ef6768cf9cb0bc12f4965592dcd5f353686a.tar.xz olio-uboot-2014.01-c855ef6768cf9cb0bc12f4965592dcd5f353686a.zip | |
delta board: fix DA9030 reset procedure.
| -rw-r--r-- | board/delta/delta.c | 13 | ||||
| -rw-r--r-- | include/configs/delta.h | 5 |
2 files changed, 12 insertions, 6 deletions
diff --git a/board/delta/delta.c b/board/delta/delta.c index 6ef7e2fc2..96928a53c 100644 --- a/board/delta/delta.c +++ b/board/delta/delta.c @@ -89,10 +89,17 @@ static void init_DA9030() GPIO33 = 0x801; /* SDA = Alt. Fkt. 1 */ /* rising Edge on EXTON */ - GPIO17 = 0x8800; + GPIO17 = 0xc800; /* enable pullup */ + GPDR0 |= (1<<17); /* GPIO17 is output */ + GSDR0 = (1<<17); + GPCR0 = (1<<17); /* drive GPIO17 low */ udelay(5); - GPIO17 = 0xc800; - udelay(100000); /* wait for DA9030 */ + GPSR0 = (1<<17); /* drive GPIO17 high */ +#if CFG_DA9030_EXTON_DELAY + udelay((unsigned long) CFG_DA9030_EXTON_DELAY); /* wait for DA9030 */ +#endif + GPCR0 = (1<<17); /* drive GPIO17 low */ + GPIO17 = 0x8800; /* disable pullup */ /* reset the watchdog and go active (0xec) */ val = (SYS_CONTROL_A_HWRES_ENABLE | diff --git a/include/configs/delta.h b/include/configs/delta.h index 776ee15d1..6329c256b 100644 --- a/include/configs/delta.h +++ b/include/configs/delta.h @@ -62,6 +62,7 @@ #define CFG_I2C_SPEED 400000 /* I2C speed */ #define CFG_I2C_SLAVE 1 /* I2C controllers address */ #define DA9030_I2C_ADDR 0x49 /* I2C address of DA9030 */ +#define CFG_DA9030_EXTON_DELAY 0 /* wait x us after DA9030 reset via EXTON */ /* #define CONFIG_HW_WATCHDOG 1 /\* Required for hitting the DA9030 WD *\/ */ /* @@ -133,9 +134,7 @@ #define CFG_HZ 3250000 /* incrementer freq: 3.25 MHz */ -/* Monahans Core Frequency = - * - */ +/* Monahans Core Frequency */ #define CFG_MONAHANS_RUN_MODE_OSC_RATIO 16 /* valid values: 8, 16, 24, 31 */ #define CFG_MONAHANS_TURBO_RUN_MODE_RATIO 1 /* valid values: 1, 2 */ |