diff options
| author | Simon Glass <sjg@chromium.org> | 2012-12-13 20:48:47 +0000 | 
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-02-01 15:42:45 -0500 | 
| commit | c6731fe22ab1cc2f5c2b8be9b1db276d777f12c3 (patch) | |
| tree | 00ac46c4d272af113b8abac3813f89ab985a57da | |
| parent | 748cd0591a9fe9eb23f20748bcb23035cd5ff517 (diff) | |
| download | olio-uboot-2014.01-c6731fe22ab1cc2f5c2b8be9b1db276d777f12c3.tar.xz olio-uboot-2014.01-c6731fe22ab1cc2f5c2b8be9b1db276d777f12c3.zip | |
ppc: Move mpc83xx clock fields to arch_global_data
Move al mpc83xx fields into arch_global_data and tidy up. Also indent
the nested #ifdef for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/cpu.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/fdt.c | 2 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/pcie.c | 4 | ||||
| -rw-r--r-- | arch/powerpc/cpu/mpc83xx/speed.c | 81 | ||||
| -rw-r--r-- | arch/powerpc/include/asm/global_data.h | 73 | 
5 files changed, 86 insertions, 76 deletions
| diff --git a/arch/powerpc/cpu/mpc83xx/cpu.c b/arch/powerpc/cpu/mpc83xx/cpu.c index e64b0c341..cc2023429 100644 --- a/arch/powerpc/cpu/mpc83xx/cpu.c +++ b/arch/powerpc/cpu/mpc83xx/cpu.c @@ -122,7 +122,7 @@ int checkcpu(void)  	printf(" at %s MHz, ", strmhz(buf, clock)); -	printf("CSB: %s MHz\n", strmhz(buf, gd->csb_clk)); +	printf("CSB: %s MHz\n", strmhz(buf, gd->arch.csb_clk));  	return 0;  } diff --git a/arch/powerpc/cpu/mpc83xx/fdt.c b/arch/powerpc/cpu/mpc83xx/fdt.c index 1f54781b7..fe553a74f 100644 --- a/arch/powerpc/cpu/mpc83xx/fdt.c +++ b/arch/powerpc/cpu/mpc83xx/fdt.c @@ -118,7 +118,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)  	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,  		"bus-frequency", bd->bi_busfreq, 1);  	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4, -		"clock-frequency", gd->core_clk, 1); +		"clock-frequency", gd->arch.core_clk, 1);  	do_fixup_by_prop_u32(blob, "device_type", "soc", 4,  		"bus-frequency", bd->bi_busfreq, 1);  	do_fixup_by_compat_u32(blob, "fsl,soc", diff --git a/arch/powerpc/cpu/mpc83xx/pcie.c b/arch/powerpc/cpu/mpc83xx/pcie.c index 52d446175..609b13321 100644 --- a/arch/powerpc/cpu/mpc83xx/pcie.c +++ b/arch/powerpc/cpu/mpc83xx/pcie.c @@ -286,8 +286,8 @@ static void mpc83xx_pcie_init_bus(int bus, struct pci_region *reg)  	get_clocks();  	/* Configure the PCIE controller core clock ratio */  	out_le32(hose_cfg_base + PEX_GCLK_RATIO, -		(((bus ? gd->pciexp2_clk : gd->pciexp1_clk) / 1000000) * 16) -		/ 333); +		(((bus ? gd->arch.pciexp2_clk : gd->arch.pciexp1_clk) +			/ 1000000) * 16) / 333);  	udelay(1000000);  	/* Do Type 1 bridge configuration */ diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c index 21e8b0ab5..7f98ee855 100644 --- a/arch/powerpc/cpu/mpc83xx/speed.c +++ b/arch/powerpc/cpu/mpc83xx/speed.c @@ -462,37 +462,37 @@ int get_clocks(void)  	brg_clk = qe_clk / 2;  #endif -	gd->csb_clk = csb_clk; +	gd->arch.csb_clk = csb_clk;  #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \  	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) -	gd->tsec1_clk = tsec1_clk; -	gd->tsec2_clk = tsec2_clk; -	gd->usbdr_clk = usbdr_clk; +	gd->arch.tsec1_clk = tsec1_clk; +	gd->arch.tsec2_clk = tsec2_clk; +	gd->arch.usbdr_clk = usbdr_clk;  #elif defined(CONFIG_MPC8309) -	gd->usbdr_clk = usbdr_clk; +	gd->arch.usbdr_clk = usbdr_clk;  #endif  #if defined(CONFIG_MPC834x) -	gd->usbmph_clk = usbmph_clk; +	gd->arch.usbmph_clk = usbmph_clk;  #endif  #if defined(CONFIG_MPC8315) -	gd->tdm_clk = tdm_clk; +	gd->arch.tdm_clk = tdm_clk;  #endif  #if defined(CONFIG_FSL_ESDHC)  	gd->sdhc_clk = sdhc_clk;  #endif -	gd->core_clk = core_clk; +	gd->arch.core_clk = core_clk;  	gd->i2c1_clk = i2c1_clk;  #if !defined(CONFIG_MPC832x)  	gd->i2c2_clk = i2c2_clk;  #endif  #if !defined(CONFIG_MPC8309) -	gd->enc_clk = enc_clk; +	gd->arch.enc_clk = enc_clk;  #endif -	gd->lbiu_clk = lbiu_clk; -	gd->lclk_clk = lclk_clk; +	gd->arch.lbiu_clk = lbiu_clk; +	gd->arch.lclk_clk = lclk_clk;  	gd->mem_clk = mem_clk;  #if defined(CONFIG_MPC8360) -	gd->mem_sec_clk = mem_sec_clk; +	gd->arch.mem_sec_clk = mem_sec_clk;  #endif  #if defined(CONFIG_QE)  	gd->qe_clk = qe_clk; @@ -500,15 +500,15 @@ int get_clocks(void)  #endif  #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \  	defined(CONFIG_MPC837x) -	gd->pciexp1_clk = pciexp1_clk; -	gd->pciexp2_clk = pciexp2_clk; +	gd->arch.pciexp1_clk = pciexp1_clk; +	gd->arch.pciexp2_clk = pciexp2_clk;  #endif  #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) -	gd->sata_clk = sata_clk; +	gd->arch.sata_clk = sata_clk;  #endif  	gd->pci_clk = pci_sync_in; -	gd->cpu_clk = gd->core_clk; -	gd->bus_clk = gd->csb_clk; +	gd->cpu_clk = gd->arch.core_clk; +	gd->bus_clk = gd->arch.csb_clk;  	return 0;  } @@ -519,7 +519,7 @@ int get_clocks(void)   *********************************************/  ulong get_bus_freq(ulong dummy)  { -	return gd->csb_clk; +	return gd->arch.csb_clk;  }  /******************************************** @@ -536,50 +536,65 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])  	char buf[32];  	printf("Clock configuration:\n"); -	printf("  Core:                %-4s MHz\n", strmhz(buf, gd->core_clk)); -	printf("  Coherent System Bus: %-4s MHz\n", strmhz(buf, gd->csb_clk)); +	printf("  Core:                %-4s MHz\n", +	       strmhz(buf, gd->arch.core_clk)); +	printf("  Coherent System Bus: %-4s MHz\n", +	       strmhz(buf, gd->arch.csb_clk));  #if defined(CONFIG_QE)  	printf("  QE:                  %-4s MHz\n", strmhz(buf, gd->qe_clk));  	printf("  BRG:                 %-4s MHz\n",  	       strmhz(buf, gd->arch.brg_clk));  #endif -	printf("  Local Bus Controller:%-4s MHz\n", strmhz(buf, gd->lbiu_clk)); -	printf("  Local Bus:           %-4s MHz\n", strmhz(buf, gd->lclk_clk)); +	printf("  Local Bus Controller:%-4s MHz\n", +	       strmhz(buf, gd->arch.lbiu_clk)); +	printf("  Local Bus:           %-4s MHz\n", +	       strmhz(buf, gd->arch.lclk_clk));  	printf("  DDR:                 %-4s MHz\n", strmhz(buf, gd->mem_clk));  #if defined(CONFIG_MPC8360) -	printf("  DDR Secondary:       %-4s MHz\n", strmhz(buf, gd->mem_sec_clk)); +	printf("  DDR Secondary:       %-4s MHz\n", +	       strmhz(buf, gd->arch.mem_sec_clk));  #endif  #if !defined(CONFIG_MPC8309) -	printf("  SEC:                 %-4s MHz\n", strmhz(buf, gd->enc_clk)); +	printf("  SEC:                 %-4s MHz\n", +	       strmhz(buf, gd->arch.enc_clk));  #endif  	printf("  I2C1:                %-4s MHz\n", strmhz(buf, gd->i2c1_clk));  #if !defined(CONFIG_MPC832x)  	printf("  I2C2:                %-4s MHz\n", strmhz(buf, gd->i2c2_clk));  #endif  #if defined(CONFIG_MPC8315) -	printf("  TDM:                 %-4s MHz\n", strmhz(buf, gd->tdm_clk)); +	printf("  TDM:                 %-4s MHz\n", +	       strmhz(buf, gd->arch.tdm_clk));  #endif  #if defined(CONFIG_FSL_ESDHC)  	printf("  SDHC:                %-4s MHz\n", strmhz(buf, gd->sdhc_clk));  #endif  #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \  	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x) -	printf("  TSEC1:               %-4s MHz\n", strmhz(buf, gd->tsec1_clk)); -	printf("  TSEC2:               %-4s MHz\n", strmhz(buf, gd->tsec2_clk)); -	printf("  USB DR:              %-4s MHz\n", strmhz(buf, gd->usbdr_clk)); +	printf("  TSEC1:               %-4s MHz\n", +	       strmhz(buf, gd->arch.tsec1_clk)); +	printf("  TSEC2:               %-4s MHz\n", +	       strmhz(buf, gd->arch.tsec2_clk)); +	printf("  USB DR:              %-4s MHz\n", +	       strmhz(buf, gd->arch.usbdr_clk));  #elif defined(CONFIG_MPC8309) -	printf("  USB DR:              %-4s MHz\n", strmhz(buf, gd->usbdr_clk)); +	printf("  USB DR:              %-4s MHz\n", +	       strmhz(buf, gd->arch.usbdr_clk));  #endif  #if defined(CONFIG_MPC834x) -	printf("  USB MPH:             %-4s MHz\n", strmhz(buf, gd->usbmph_clk)); +	printf("  USB MPH:             %-4s MHz\n", +	       strmhz(buf, gd->arch.usbmph_clk));  #endif  #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \  	defined(CONFIG_MPC837x) -	printf("  PCIEXP1:             %-4s MHz\n", strmhz(buf, gd->pciexp1_clk)); -	printf("  PCIEXP2:             %-4s MHz\n", strmhz(buf, gd->pciexp2_clk)); +	printf("  PCIEXP1:             %-4s MHz\n", +	       strmhz(buf, gd->arch.pciexp1_clk)); +	printf("  PCIEXP2:             %-4s MHz\n", +	       strmhz(buf, gd->arch.pciexp2_clk));  #endif  #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) -	printf("  SATA:                %-4s MHz\n", strmhz(buf, gd->sata_clk)); +	printf("  SATA:                %-4s MHz\n", +	       strmhz(buf, gd->arch.sata_clk));  #endif  	return 0;  } diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h index 7d0115d28..b7bb035ba 100644 --- a/arch/powerpc/include/asm/global_data.h +++ b/arch/powerpc/include/asm/global_data.h @@ -42,64 +42,59 @@ struct arch_global_data {  #if defined(CONFIG_QE)  	u32 brg_clk;  #endif -}; - -/* - * The following data structure is placed in some memory wich is - * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or - * some locked parts of the data cache) to allow for a minimum set of - * global variables during system initialization (until we have set - * up the memory controller so that we can use RAM). - */ - -typedef	struct	global_data { -	bd_t		*bd; -	unsigned long	flags; -	unsigned int	baudrate; -	unsigned long	cpu_clk;	/* CPU clock in Hz! */ -	unsigned long	bus_clk; -	/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ -	unsigned long	pci_clk; -#if defined(CONFIG_CPM2) -	/* There are many clocks on the MPC8260 - see page 9-5 */ -	unsigned long	vco_out; -	unsigned long	cpm_clk; -	unsigned long	scc_clk; -#endif -	unsigned long   mem_clk; +	/* TODO: sjg@chromium.org: Should these be unslgned long? */  #if defined(CONFIG_MPC83xx)  	/* There are other clocks in the MPC83XX */  	u32 csb_clk; -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \  	defined(CONFIG_MPC834x) || defined(CONFIG_MPC837x)  	u32 tsec1_clk;  	u32 tsec2_clk;  	u32 usbdr_clk; -#elif defined(CONFIG_MPC8309) +# elif defined(CONFIG_MPC8309)  	u32 usbdr_clk; -#endif -#if defined (CONFIG_MPC834x) +# endif +# if defined(CONFIG_MPC834x)  	u32 usbmph_clk; -#endif /* CONFIG_MPC834x */ -#if defined(CONFIG_MPC8315) +# endif /* CONFIG_MPC834x */ +# if defined(CONFIG_MPC8315)  	u32 tdm_clk; -#endif +# endif  	u32 core_clk;  	u32 enc_clk;  	u32 lbiu_clk;  	u32 lclk_clk; -#if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \ +# if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \  	defined(CONFIG_MPC837x)  	u32 pciexp1_clk;  	u32 pciexp2_clk; -#endif -#if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) +# endif +# if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315)  	u32 sata_clk; +# endif +# if defined(CONFIG_MPC8360) +	u32 mem_sec_clk; +# endif /* CONFIG_MPC8360 */  #endif -#if defined(CONFIG_MPC8360) -	u32  mem_sec_clk; -#endif /* CONFIG_MPC8360 */ -#endif +}; + +/* + * The following data structure is placed in some memory wich is + * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or + * some locked parts of the data cache) to allow for a minimum set of + * global variables during system initialization (until we have set + * up the memory controller so that we can use RAM). + */ + +typedef	struct	global_data { +	bd_t		*bd; +	unsigned long	flags; +	unsigned int	baudrate; +	unsigned long	cpu_clk;	/* CPU clock in Hz! */ +	unsigned long	bus_clk; +	/* We cannot bracket this with CONFIG_PCI due to mpc5xxx */ +	unsigned long pci_clk; +	unsigned long   mem_clk;  #if defined(CONFIG_FSL_ESDHC)  	u32 sdhc_clk;  #endif |